skip navigationU S P T O SealUnited States Patent and Trademark Office AOTW logo
Home|Site Index|Search|Guides|Contacts|eBusiness|eBiz alerts|News|Help
Assignments on the Web > Patent Query
Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:038954/0001   Pages: 961
Recorded: 06/02/2016
Attorney Dkt #:065664/0012
Conveyance: PATENT SECURITY AGREEMENT
1
Patent #:
Issue Dt:
08/11/2009
Application #:
11882827
Filing Dt:
08/06/2007
Publication #:
Pub Dt:
02/14/2008
Title:
SEMICONDUCTOR MEMORY DEVICE
2
Patent #:
Issue Dt:
11/02/2010
Application #:
11882991
Filing Dt:
08/08/2007
Publication #:
Pub Dt:
02/28/2008
Title:
METHOD OF PRODUCING SEMICONDUCTOR DEVICE
3
Patent #:
Issue Dt:
04/20/2010
Application #:
11885824
Filing Dt:
09/06/2007
Publication #:
Pub Dt:
10/22/2009
Title:
VOLTAGE PROTECTION CIRCUIT FOR THIN OXIDE TRANSISTORS, AND MEMORY DEVICE AND PROCESSOR-BASED SYSTEM USING SAME
4
Patent #:
NONE
Issue Dt:
Application #:
11888122
Filing Dt:
07/31/2007
Publication #:
Pub Dt:
02/05/2009
Title:
System and method for providing semiconductor device features using a protective layer
5
Patent #:
Issue Dt:
09/06/2011
Application #:
11888829
Filing Dt:
08/02/2007
Publication #:
Pub Dt:
02/05/2009
Title:
VOLTAGE TRIMMING
6
Patent #:
Issue Dt:
12/29/2009
Application #:
11888954
Filing Dt:
08/03/2007
Publication #:
Pub Dt:
03/13/2008
Title:
NANOCRYSTAL WRITE ONCE READ ONLY MEMORY FOR ARCHIVAL STORAGE
7
Patent #:
Issue Dt:
06/11/2013
Application #:
11889214
Filing Dt:
08/09/2007
Publication #:
Pub Dt:
02/12/2009
Title:
METHODS, SYSTEMS AND APPARATUSES FOR PIXEL VALUE CORRECTION USING MULTIPLE VERTICAL AND/OR HORIZONTAL CORRECTION CURVES
8
Patent #:
Issue Dt:
06/07/2011
Application #:
11890507
Filing Dt:
08/07/2007
Publication #:
Pub Dt:
02/12/2009
Title:
IMAGER METHODS, APPARATUSES, AND SYSTEMS PROVIDING A SKIP MODE WITH A WIDE DYNAMIC RANGE OPERATION
9
Patent #:
Issue Dt:
09/01/2009
Application #:
11891078
Filing Dt:
08/09/2007
Publication #:
Pub Dt:
12/06/2007
Title:
ZERO POWER START-UP CIRCUIT FOR SELF-BIAS CIRCUIT
10
Patent #:
Issue Dt:
06/30/2009
Application #:
11891506
Filing Dt:
08/10/2007
Publication #:
Pub Dt:
02/12/2009
Title:
SYSTEM AND METHOD FOR REDUCING PIN-COUNT OF MEMORY DEVICES, AND MEMORY DEVICE TESTERS FOR SAME
11
Patent #:
Issue Dt:
04/19/2011
Application #:
11891575
Filing Dt:
08/10/2007
Publication #:
Pub Dt:
02/12/2009
Title:
SEMICONDUCTOR PROCESSING
12
Patent #:
Issue Dt:
12/08/2009
Application #:
11891949
Filing Dt:
08/14/2007
Publication #:
Pub Dt:
06/19/2008
Title:
ON-CHIP TEMPERATURE SENSOR
13
Patent #:
Issue Dt:
10/07/2008
Application #:
11892003
Filing Dt:
08/17/2007
Publication #:
Pub Dt:
12/13/2007
Title:
RESISTANCE VARIABLE MEMORY DEVICE WITH SPUTTERED METAL-CHALCOGENIDE REGION AND METHOD OF FABRICATION
14
Patent #:
Issue Dt:
06/30/2009
Application #:
11892380
Filing Dt:
08/22/2007
Publication #:
Pub Dt:
12/20/2007
Title:
ULTRASHALLOW PHOTODIODE USING INDIUM
15
Patent #:
Issue Dt:
12/08/2009
Application #:
11893035
Filing Dt:
08/14/2007
Publication #:
Pub Dt:
06/12/2008
Title:
TEMPERATURE COMPENSATION OF MEMORY SIGNALS USING DIGITAL SIGNALS
16
Patent #:
Issue Dt:
10/16/2012
Application #:
11893590
Filing Dt:
08/15/2007
Publication #:
Pub Dt:
02/19/2009
Title:
MEMORY DEVICE AND METHOD HAVING ON-BOARD ADDRESS PROTECTION SYSTEM FOR FACILITATING INTERFACE WITH MULTIPLE PROCESSORS, AND COMPUTER SYSTEM USING SAME
17
Patent #:
Issue Dt:
11/08/2011
Application #:
11893593
Filing Dt:
08/15/2007
Publication #:
Pub Dt:
02/19/2009
Title:
MEMORY DEVICE AND METHOD HAVING ON-BOARD PROCESSING LOGIC FOR FACILITATING INTERFACE WITH MULTIPLE PROCESSORS, AND COMPUTER SYSTEM USING SAME
18
Patent #:
Issue Dt:
10/26/2010
Application #:
11893604
Filing Dt:
08/15/2007
Publication #:
Pub Dt:
02/19/2009
Title:
MEMORY DEVICE AND METHOD WITH ON-BOARD CACHE SYSTEM FOR FACILITATING INTERFACE WITH MULTIPLE PROCESSORS, AND COMPUTER SYSTEM USING SAME
19
Patent #:
Issue Dt:
12/28/2010
Application #:
11894308
Filing Dt:
08/21/2007
Publication #:
Pub Dt:
02/21/2008
Title:
BALLISTIC DIRECT INJECTION NROM CELL ON STRAINED SILICON STRUCTURES
20
Patent #:
Issue Dt:
06/28/2011
Application #:
11894377
Filing Dt:
08/21/2007
Publication #:
Pub Dt:
02/26/2009
Title:
CHARGE LOSS COMPENSATION METHODS AND APPARATUS
21
Patent #:
Issue Dt:
08/02/2016
Application #:
11895072
Filing Dt:
08/22/2007
Publication #:
Pub Dt:
02/26/2009
Title:
Column redundancy system for a memory array
22
Patent #:
Issue Dt:
04/15/2008
Application #:
11895155
Filing Dt:
08/23/2007
Publication #:
Pub Dt:
12/20/2007
Title:
SOURCE LINES FOR NAND MEMORY DEVICES
23
Patent #:
Issue Dt:
11/30/2010
Application #:
11895156
Filing Dt:
08/23/2007
Publication #:
Pub Dt:
12/20/2007
Title:
USING CHIP SELECT TO SPECIFY BOOT MEMORY
24
Patent #:
Issue Dt:
11/25/2008
Application #:
11895185
Filing Dt:
08/23/2007
Publication #:
Pub Dt:
12/20/2007
Title:
RUNTIME FLASH DEVICE DETECTION AND CONFIGURATION FOR FLASH DATA MANAGEMENT SOFTWARE
25
Patent #:
Issue Dt:
11/11/2008
Application #:
11895419
Filing Dt:
08/24/2007
Publication #:
Pub Dt:
02/21/2008
Title:
BIAS GENERATOR WITH FEEDBACK CONTROL
26
Patent #:
Issue Dt:
09/10/2013
Application #:
11895505
Filing Dt:
08/23/2007
Publication #:
Pub Dt:
02/26/2009
Title:
SYSTEMS, METHODS AND DEVICES FOR A MEMORY HAVING A BURIED SELECT LINE
27
Patent #:
Issue Dt:
08/10/2010
Application #:
11895894
Filing Dt:
08/27/2007
Publication #:
Pub Dt:
12/27/2007
Title:
METHOD AND SYSTEM FOR TERMINATING WRITE COMMANDS IN A HUB-BASED MEMORY SYSTEM
28
Patent #:
Issue Dt:
03/23/2010
Application #:
11896050
Filing Dt:
08/29/2007
Publication #:
Pub Dt:
03/06/2008
Title:
SEMICONDUCTOR DEVICE HAVING FIN FIELD EFFECT TRANSISTOR AND MANUFACTURING METHOD THEREOF
29
Patent #:
Issue Dt:
01/27/2009
Application #:
11897244
Filing Dt:
08/29/2007
Publication #:
Pub Dt:
03/13/2008
Title:
CIRCUIT AND METHOD FOR STABLE FUSE DETECTION
30
Patent #:
Issue Dt:
06/08/2010
Application #:
11897593
Filing Dt:
08/31/2007
Publication #:
Pub Dt:
03/05/2009
Title:
ZWITTERIONIC BLOCK COPOLYMERS AND METHODS
31
Patent #:
Issue Dt:
07/14/2009
Application #:
11897842
Filing Dt:
08/31/2007
Publication #:
Pub Dt:
12/27/2007
Title:
SMALL GRAIN SIZE, CONFORMAL ALUMINUM INTERCONNECTS AND METHOD FOR THEIR FORMATION
32
Patent #:
Issue Dt:
07/22/2008
Application #:
11897889
Filing Dt:
08/31/2007
Publication #:
Pub Dt:
03/13/2008
Title:
MOS LINEAR REGION IMPEDANCE CURVATURE CORRECTION
33
Patent #:
Issue Dt:
07/06/2010
Application #:
11898551
Filing Dt:
09/13/2007
Publication #:
Pub Dt:
03/20/2008
Title:
SEMICONDUCTOR DEVICE, METHOD FOR MEASURING CHARACTERISTICS OF ELEMENT TO BE MEASURED, AND CHARACTERISTIC MANAGEMENT SYSTEM OF SEMICONDUCTOR DEVICE
34
Patent #:
Issue Dt:
11/10/2009
Application #:
11898890
Filing Dt:
09/17/2007
Publication #:
Pub Dt:
04/17/2008
Title:
OFFSET COMPENSATED SENSING FOR MAGNETIC RANDOM ACCESS MEMORY
35
Patent #:
Issue Dt:
11/24/2009
Application #:
11899643
Filing Dt:
09/06/2007
Publication #:
Pub Dt:
01/03/2008
Title:
METHOD AND SYSTEM FOR CONTROLLING REFRESH TO AVOID MEMORY CELL DATA LOSSES
36
Patent #:
Issue Dt:
06/01/2010
Application #:
11899738
Filing Dt:
09/06/2007
Publication #:
Pub Dt:
03/12/2009
Title:
MEMORY DEVICE COMMAND DECODING SYSTEM AND MEMORY DEVICE AND PROCESSOR-BASED SYSTEM USING SAME
37
Patent #:
Issue Dt:
11/04/2008
Application #:
11900273
Filing Dt:
09/11/2007
Publication #:
Pub Dt:
01/03/2008
Title:
LOW VOLTAGE CMOS DIFFERENTIAL AMPLIFIER
38
Patent #:
Issue Dt:
03/03/2009
Application #:
11900443
Filing Dt:
09/12/2007
Publication #:
Pub Dt:
01/10/2008
Title:
PROGRAMMING METHOD FOR NAND EEPROM
39
Patent #:
Issue Dt:
08/05/2008
Application #:
11900451
Filing Dt:
09/11/2007
Publication #:
Pub Dt:
02/07/2008
Title:
MEASURE CONTROL DELAY AND METHOD HAVING LATCHING CIRCUIT INTEGRAL WITH DELAY CIRCUIT
40
Patent #:
Issue Dt:
07/06/2010
Application #:
11900595
Filing Dt:
09/12/2007
Publication #:
Pub Dt:
01/10/2008
Title:
BAND-ENGINEERED MULTI-GATED NON-VOLATILE MEMORY DEVICE WITH ENHANCED ATTRIBUTES
41
Patent #:
Issue Dt:
12/08/2009
Application #:
11900812
Filing Dt:
09/13/2007
Publication #:
Pub Dt:
01/10/2008
Title:
TIME DELAY OSCILLATOR FOR INTEGRATED CIRCUITS
42
Patent #:
Issue Dt:
07/07/2009
Application #:
11901053
Filing Dt:
09/14/2007
Publication #:
Pub Dt:
01/31/2008
Title:
SYSTEM AND METHOD FOR CAPTURING DATA SIGNALS USING A DATA STROBE SIGNAL
43
Patent #:
Issue Dt:
05/19/2009
Application #:
11901719
Filing Dt:
09/18/2007
Publication #:
Pub Dt:
06/19/2008
Title:
REMOVABLE MEMORY MEDIA WITH INTEGRAL INDICATOR LIGHT
44
Patent #:
Issue Dt:
04/13/2010
Application #:
11902167
Filing Dt:
09/19/2007
Publication #:
Pub Dt:
03/27/2008
Title:
SEMICONDUCTOR DEVICE INCLUDING A TRENCH WITH A CURVED SURFACE PORTION AND METHOD OF MANUFACTURING THE SAME
45
Patent #:
Issue Dt:
02/16/2010
Application #:
11904182
Filing Dt:
09/26/2007
Publication #:
Pub Dt:
03/26/2009
Title:
LANTHANIDE DIELECTRIC WITH CONTROLLED INTERFACES
46
Patent #:
Issue Dt:
10/13/2009
Application #:
11905475
Filing Dt:
10/01/2007
Publication #:
Pub Dt:
02/14/2008
Title:
REVERSE METAL PROCESS FOR CREATING A METAL SILICIDE TRANSISTOR GATE STRUCTURE
47
Patent #:
Issue Dt:
11/24/2009
Application #:
11905752
Filing Dt:
10/03/2007
Title:
MULTI-ELEMENT RESISTIVE MEMORY
48
Patent #:
Issue Dt:
05/26/2009
Application #:
11905823
Filing Dt:
10/04/2007
Publication #:
Pub Dt:
02/07/2008
Title:
METHOD AND APPARATUS PROCESSING VARIABLE RESISTANCE MEMORY CELL WRITE OPERATION
49
Patent #:
Issue Dt:
01/13/2009
Application #:
11906036
Filing Dt:
09/28/2007
Publication #:
Pub Dt:
01/31/2008
Title:
BIPOLAR READING TECHNIQUE FOR A MEMORY CELL HAVING AN ELECTRICALLY FLOATING BODY TRANSISTOR
50
Patent #:
Issue Dt:
07/20/2010
Application #:
11906673
Filing Dt:
10/02/2007
Publication #:
Pub Dt:
04/02/2009
Title:
SYSTEMS, METHODS AND DEVICES FOR ARBITRATING DIE STACK POSITION IN A MULTI-BIT STACK DEVICE
51
Patent #:
Issue Dt:
04/06/2010
Application #:
11923062
Filing Dt:
10/24/2007
Publication #:
Pub Dt:
05/01/2008
Title:
SEMICONDUCTOR DEVICE HAVING A CAPACITANCE ELEMENT AND METHOD OF MANUFACTURING THE SAME
52
Patent #:
Issue Dt:
05/24/2011
Application #:
11923290
Filing Dt:
10/24/2007
Publication #:
Pub Dt:
02/19/2009
Title:
MICROELECTRONIC DIE PACKAGES WITH LEADFRAMES, INCLUDING LEADFRAME-BASED INTERPOSER FOR STACKED DIE PACKAGES, AND ASSOCIATED SYSTEMS AND METHODS
53
Patent #:
Issue Dt:
10/12/2010
Application #:
11923832
Filing Dt:
10/25/2007
Publication #:
Pub Dt:
02/28/2008
Title:
THIN FLIP-CHIP METHOD
54
Patent #:
Issue Dt:
03/01/2011
Application #:
11924103
Filing Dt:
10/25/2007
Publication #:
Pub Dt:
04/30/2009
Title:
MEMORY CELL HEIGHTS
55
Patent #:
Issue Dt:
03/09/2010
Application #:
11924793
Filing Dt:
10/26/2007
Publication #:
Pub Dt:
04/30/2009
Title:
MULTILEVEL MEMORY CELL OPERATION
56
Patent #:
Issue Dt:
09/07/2010
Application #:
11924801
Filing Dt:
10/26/2007
Publication #:
Pub Dt:
04/30/2009
Title:
NON-VOLATILE SRAM CELL
57
Patent #:
Issue Dt:
05/24/2011
Application #:
11925573
Filing Dt:
10/26/2007
Publication #:
Pub Dt:
04/30/2009
Title:
FLOATING BODY FIELD-EFFECT TRANSISTORS, AND METHODS OF FORMING FLOATING BODY FIELD-EFFECT TRANSISTORS
58
Patent #:
Issue Dt:
12/20/2011
Application #:
11926324
Filing Dt:
10/29/2007
Publication #:
Pub Dt:
04/30/2009
Title:
METHODS, SYSTEMS, AND DEVICES FOR MANAGEMENT OF A MEMORY SYSTEM
59
Patent #:
Issue Dt:
11/19/2013
Application #:
11926619
Filing Dt:
10/29/2007
Publication #:
Pub Dt:
04/30/2009
Title:
METHODS FOR FABRICATING SUB-RESOLUTION ALIGNMENT MARKS ON SEMICONDUCTOR STRUCTURES
60
Patent #:
Issue Dt:
10/04/2011
Application #:
11926682
Filing Dt:
10/29/2007
Publication #:
Pub Dt:
04/30/2009
Title:
TECHNIQUES FOR GENERATING AND SIMULATING A SIMULATABLE VECTOR HAVING AMPLITUDE NOISE AND/OR TIMING JITTER ADDED THERETO
61
Patent #:
Issue Dt:
12/14/2010
Application #:
11926713
Filing Dt:
10/29/2007
Publication #:
Pub Dt:
04/30/2009
Title:
MEMORY CELL PROGRAMMING
62
Patent #:
Issue Dt:
02/04/2014
Application #:
11926791
Filing Dt:
10/29/2007
Publication #:
Pub Dt:
04/30/2009
Title:
METHOD AND SYSTEM OF PERFORMING THREE-DIMENSIONAL IMAGING USING AN ELECTRON MICROSCOPE
63
Patent #:
Issue Dt:
08/03/2010
Application #:
11928640
Filing Dt:
10/30/2007
Publication #:
Pub Dt:
04/30/2009
Title:
OPERATING MEMORY CELLS
64
Patent #:
Issue Dt:
08/02/2011
Application #:
11930524
Filing Dt:
10/31/2007
Publication #:
Pub Dt:
04/30/2009
Title:
METHOD AND APPARATUS FOR TRAINING THE REFERENCE VOLTAGE LEVEL AND DATA SAMPLE TIMING IN A RECEIVER
65
Patent #:
Issue Dt:
11/30/2010
Application #:
11931763
Filing Dt:
10/31/2007
Publication #:
Pub Dt:
04/30/2009
Title:
SENSING MEMORY CELLS
66
Patent #:
Issue Dt:
06/22/2010
Application #:
11931912
Filing Dt:
10/31/2007
Publication #:
Pub Dt:
04/30/2009
Title:
NON-VOLATILE MULTILEVEL MEMORY CELLS
67
Patent #:
Issue Dt:
02/23/2010
Application #:
11932096
Filing Dt:
10/31/2007
Publication #:
Pub Dt:
04/30/2009
Title:
MEMORY CELL PROGRAMMING
68
Patent #:
Issue Dt:
06/28/2011
Application #:
11932209
Filing Dt:
10/31/2007
Publication #:
Pub Dt:
03/06/2008
Title:
THRESHOLD VOLTAGE ADJUSTMENT FOR LONG-CHANNEL TRANSISTORS
69
Patent #:
Issue Dt:
12/07/2010
Application #:
11932287
Filing Dt:
10/31/2007
Publication #:
Pub Dt:
04/30/2009
Title:
FRACTIONAL BITS IN MEMORY CELLS
70
Patent #:
Issue Dt:
06/25/2013
Application #:
11932512
Filing Dt:
10/31/2007
Publication #:
Pub Dt:
03/06/2008
Title:
LOW LEAKAGE MIM CAPACITOR
71
Patent #:
Issue Dt:
10/14/2008
Application #:
11932677
Filing Dt:
10/31/2007
Publication #:
Pub Dt:
03/13/2008
Title:
LOW LEAKAGE MIM CAPACITOR
72
Patent #:
Issue Dt:
08/03/2010
Application #:
11933051
Filing Dt:
10/31/2007
Publication #:
Pub Dt:
03/27/2008
Title:
MEMORY ARRAY BURIED DIGIT LINE
73
Patent #:
Issue Dt:
06/15/2010
Application #:
11933664
Filing Dt:
11/01/2007
Publication #:
Pub Dt:
05/07/2009
Title:
SPACER PROCESS FOR ON PITCH CONTACTS AND RELATED STRUCTURES
74
Patent #:
Issue Dt:
03/09/2010
Application #:
11933754
Filing Dt:
11/01/2007
Publication #:
Pub Dt:
03/05/2009
Title:
SEMICONDUCTOR ASSEMBLIES AND METHODS OF MANUFACTURING SUCH ASSEMBLIES INCLUDING FORMING TRENCHES IN A FIRST SIDE OF THE MOLDING MATERIAL
75
Patent #:
Issue Dt:
07/06/2010
Application #:
11933770
Filing Dt:
11/01/2007
Publication #:
Pub Dt:
05/07/2009
Title:
METHODS FOR TREATING SURFACES
76
Patent #:
Issue Dt:
09/29/2009
Application #:
11934144
Filing Dt:
11/02/2007
Publication #:
Pub Dt:
05/08/2008
Title:
MEMORY DEVICE EMPLOYING THREE-LEVEL CELLS AND RELATED METHODS OF MANAGING
77
Patent #:
Issue Dt:
12/15/2009
Application #:
11934195
Filing Dt:
11/02/2007
Publication #:
Pub Dt:
05/07/2009
Title:
METHOD OF AND APPARATUS FOR REDUCING SETTLING TIME OF A SWITCHED CAPACITOR AMPLIFIER
78
Patent #:
Issue Dt:
11/23/2010
Application #:
11935968
Filing Dt:
11/06/2007
Publication #:
Pub Dt:
03/06/2008
Title:
STUD CAPACITOR DEVICE AND FABRICATION METHOD
79
Patent #:
Issue Dt:
02/02/2010
Application #:
11936628
Filing Dt:
11/07/2007
Publication #:
Pub Dt:
05/07/2009
Title:
POWER-OFF APPARATUS, SYSTEMS, AND METHODS
80
Patent #:
Issue Dt:
12/08/2009
Application #:
11938097
Filing Dt:
11/09/2007
Publication #:
Pub Dt:
03/13/2008
Title:
METHOD AND APPARATUS FOR REMOVING MATERIAL FROM MICROFEATURE WORKPIECES
81
Patent #:
Issue Dt:
10/27/2009
Application #:
11938516
Filing Dt:
11/12/2007
Publication #:
Pub Dt:
05/14/2009
Title:
SELECTIVE EDGE PHASE MIXING
82
Patent #:
Issue Dt:
11/11/2014
Application #:
11938681
Filing Dt:
11/12/2007
Publication #:
Pub Dt:
05/14/2009
Title:
SMART STORAGE DEVICE
83
Patent #:
Issue Dt:
10/16/2012
Application #:
11938726
Filing Dt:
11/12/2007
Publication #:
Pub Dt:
05/14/2009
Title:
SYSTEM AND METHOD FOR UPDATING READ-ONLY MEMORY IN SMART CARD MEMORY MODULES
84
Patent #:
Issue Dt:
04/24/2012
Application #:
11938734
Filing Dt:
11/12/2007
Publication #:
Pub Dt:
05/14/2009
Title:
INTELLIGENT CONTROLLER SYSTEM AND METHOD FOR SMART CARD MEMORY MODULES
85
Patent #:
Issue Dt:
04/10/2012
Application #:
11938739
Filing Dt:
11/12/2007
Publication #:
Pub Dt:
01/28/2010
Title:
CRITICAL SECURITY PARAMETER GENERATION AND EXCHANGE SYSTEM AND METHOD FOR SMART-CARD MEMORY MODULES
86
Patent #:
Issue Dt:
01/11/2011
Application #:
11940745
Filing Dt:
11/15/2007
Publication #:
Pub Dt:
06/11/2009
Title:
SYSTEM, APPARATUS, AND METHOD FOR MODIFYING THE ORDER OF MEMORY ACCESSES
87
Patent #:
Issue Dt:
09/29/2009
Application #:
11941358
Filing Dt:
11/16/2007
Publication #:
Pub Dt:
03/13/2008
Title:
METHODS OF FABRICATING SUBSTRATES INCLUDING AT LEAST ONE CONDUCTIVE VIA
88
Patent #:
Issue Dt:
04/19/2011
Application #:
11942513
Filing Dt:
11/19/2007
Publication #:
Pub Dt:
05/21/2009
Title:
FIN-JFET
89
Patent #:
Issue Dt:
01/26/2010
Application #:
11942996
Filing Dt:
11/20/2007
Publication #:
Pub Dt:
03/20/2008
Title:
MICROELECTRONIC COMPONENT ASSEMBLIES AND MICROELECTRONIC COMPONENT LEAD FRAME STRUCTURES
90
Patent #:
Issue Dt:
04/12/2011
Application #:
11943103
Filing Dt:
11/20/2007
Publication #:
Pub Dt:
04/10/2008
Title:
MICROELECTRONIC COMPONENT ASSEMBLIES AND MICROELECTRONIC COMPONENT LEAD FRAME STRUCTURES
91
Patent #:
Issue Dt:
12/08/2009
Application #:
11943118
Filing Dt:
11/20/2007
Publication #:
Pub Dt:
05/21/2009
Title:
READ METHOD FOR MLC
92
Patent #:
Issue Dt:
10/27/2009
Application #:
11943136
Filing Dt:
11/20/2007
Publication #:
Pub Dt:
05/21/2009
Title:
SENSING OF MEMORY CELLS IN A SOLID STATE MEMORY DEVICE BY FIXED DISCHARGE OF A BIT LINE
93
Patent #:
Issue Dt:
01/24/2012
Application #:
11943339
Filing Dt:
11/20/2007
Publication #:
Pub Dt:
03/20/2008
Title:
SNSE-BASED LIMITED REPROGRAMMABLE CELL
94
Patent #:
Issue Dt:
06/09/2009
Application #:
11943688
Filing Dt:
11/21/2007
Publication #:
Pub Dt:
03/13/2008
Title:
SYSTEMS AND METHODS OF FORMING REFRACTORY METAL NITRIDE LAYERS USING ORGANIC AMINES
95
Patent #:
Issue Dt:
11/09/2010
Application #:
11943729
Filing Dt:
11/21/2007
Publication #:
Pub Dt:
05/21/2009
Title:
MITIGATION OF DATA CORRUPTION FROM BACK PATTERN AND PROGRAM DISTURB IN A NON-VOLATILE MEMORY DEVICE
96
Patent #:
Issue Dt:
12/15/2009
Application #:
11943916
Filing Dt:
11/21/2007
Publication #:
Pub Dt:
05/21/2009
Title:
M+N BIT PROGRAMMING AND M+L BIT READ FOR M BIT MEMORY CELLS
97
Patent #:
Issue Dt:
12/04/2012
Application #:
11943943
Filing Dt:
11/21/2007
Publication #:
Pub Dt:
05/21/2009
Title:
MEMORY CONTROLLER SUPPORTING RATE-COMPATIBLE PUNCTURED CODES
98
Patent #:
Issue Dt:
03/02/2010
Application #:
11943984
Filing Dt:
11/21/2007
Publication #:
Pub Dt:
05/29/2008
Title:
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
99
Patent #:
Issue Dt:
10/25/2011
Application #:
11944023
Filing Dt:
11/21/2007
Publication #:
Pub Dt:
05/21/2009
Title:
FAULT-TOLERANT NON-VOLATILE INTEGRATED CIRCUIT MEMORY
100
Patent #:
Issue Dt:
07/30/2013
Application #:
11944168
Filing Dt:
11/21/2007
Publication #:
Pub Dt:
05/21/2009
Title:
METHOD AND APPARATUS FOR READING DATA FROM FLASH MEMORY
Assignor
1
Exec Dt:
04/26/2016
Assignee
1
1300 THAMES STREET, 4TH FLOOR
BALTIMORE, MARYLAND 21231
Correspondence name and address
GENEVIEVE DORMENT, ESQ.
SIMPSON THACHER & BARTLETT LLP
425 LEXINGTON AVENUE
NEW YORK, NY 10017

Search Results as of: 05/15/2024 04:44 AM
If you have any comments or questions concerning the data displayed, contact PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified: August 25, 2017 v.2.6
| .HOME | INDEX| SEARCH | eBUSINESS | CONTACT US | PRIVACY STATEMENT