Patent Assignment Details
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For pending or abandoned applications please consult USPTO staff.
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| Reel/Frame: | 039330/0769 | |
| Pages: | 3 |
| | Recorded: | 08/03/2016 | | |
| Attorney Dkt #: | T&A-GENERAL/Z-1673(USMA) |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
3
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Patent #:
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Issue Dt:
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10/05/2004
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Application #:
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10299793
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Filing Dt:
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11/20/2002
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Publication #:
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Pub Dt:
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06/19/2003
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Title:
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MANUFACTURING SEMICONDUCTOR DEVICE INCLUDING FORMING A BURIED GATE COVERED BY AN INSULATIVE FILM AND A CHANNEL LAYER
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Patent #:
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Issue Dt:
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05/22/2012
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Application #:
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12756451
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Filing Dt:
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04/08/2010
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Publication #:
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Pub Dt:
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10/14/2010
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Title:
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SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
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02/04/2014
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Application #:
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13145108
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Filing Dt:
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10/10/2011
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Publication #:
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Pub Dt:
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01/26/2012
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Title:
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SEMICONDUCTOR DEVICE, METHOD FOR MANUFACTURING SAME, AND SEMICONDUCTOR STORAGE DEVICE
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Assignee
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| 2-24, TOYOSU 3-CHOME, KOUTOU-KU |
| TOKYO, JAPAN 135-0061 |
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Correspondence name and address
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MATTINGLY & MALUR, PC
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1800 DIAGONAL ROAD
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SUITE 210
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ALEXANDRIA, VA 22314
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