Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
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Reel/Frame: | 039439/0430 | |
| Pages: | 5 |
| | Recorded: | 07/22/2016 | | |
Attorney Dkt #: | 70027 |
Conveyance: | CHANGE OF NAME (SEE DOCUMENT FOR DETAILS). |
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Total properties:
6
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Patent #:
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Issue Dt:
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04/11/2017
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Application #:
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13930287
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Filing Dt:
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06/28/2013
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH UNPLATED LEADFRAME AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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02/27/2018
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Application #:
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14039938
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Filing Dt:
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09/27/2013
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Title:
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INTERPOSER SUBSTRATE DESIGNS FOR SEMICONDUCTOR PACKAGES
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Patent #:
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Issue Dt:
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06/06/2017
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Application #:
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14226711
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Filing Dt:
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03/26/2014
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH CORELESS SUBSTRATE AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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06/27/2017
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Application #:
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14227346
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Filing Dt:
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03/27/2014
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PLATED COPPER POSTS AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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11/22/2016
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Application #:
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14316190
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Filing Dt:
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06/26/2014
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH SUPPORT STRUCTURE AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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06/12/2018
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Application #:
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15091049
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Filing Dt:
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04/05/2016
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Publication #:
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Pub Dt:
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10/13/2016
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH SHIELDING AND METHOD OF MANUFACTURE THEREOF
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Assignee
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10 ANG MO KIO STREET 65 |
#04-08/09 TECHPOINT |
SINGAPORE, SINGAPORE 569059 |
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Correspondence name and address
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WONG & REES LLP
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4677 OLD IRONSIDES DRIVE
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SUITE 370
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SANTA CLARA, CA 95054
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