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Patent #:
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Issue Dt:
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11/28/1995
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08233174
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Filing Dt:
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04/25/1994
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Title:
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METHOD PROTECTING A STACKED GATE EDGE IN A SEMICONDUCTOR DEVICE FROM SELF ALIGNED SOURCE (SAS) ETCH
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Issue Dt:
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09/21/1999
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08265583
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Filing Dt:
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06/23/1994
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Title:
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Patent #:
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Issue Dt:
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01/09/1996
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08403460
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Filing Dt:
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03/14/1995
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Title:
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METHOD OF MAKING FLASH EEPROM MEMORY WITH REDUCED COLUMN LEAKAGE CURRENT
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Patent #:
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Issue Dt:
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07/09/1996
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Application #:
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08433267
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Filing Dt:
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05/02/1995
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Title:
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METHOD FOR PROTECTING A STACKED GATE EDGE IN A SEMICONDUCTOR DEVICE FROM SELF ALIGNED SOURCE (SAS) ETCH
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Patent #:
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Issue Dt:
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05/14/1996
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Application #:
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08460603
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Filing Dt:
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06/01/1995
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Title:
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METHOD AND SYSTEM FOR PROTECTING A STACKED GATE EDGE IN A SEMI- CONDUCTOR DEVICE FROM SELF ALIGNED SOURCE (SAS) ETCH IN A SEMI- CONDUCTOR DEVICE
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Patent #:
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Issue Dt:
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05/13/1997
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08634512
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Filing Dt:
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04/18/1996
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Title:
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SYSTEM FOR CONSTANT FIELD ERASURE IN A FLASH EPROM
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Patent #:
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Issue Dt:
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04/27/1999
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08649302
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05/17/1996
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Title:
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OUTPUT BUFFER CIRCUIT AND METHOD HAVING IMPROVED ACCESS
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Patent #:
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Issue Dt:
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06/23/1998
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08657718
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Filing Dt:
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05/30/1996
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Title:
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ANTI-SHEAR METHOD AND SYSTEM FOR SEMICONDUCTOR WAFER REMOVAL
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Patent #:
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04/07/1998
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08658671
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06/04/1996
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Title:
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METHOD AND CIRCUIT FOR RECONFIGURING A BUFFER
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Issue Dt:
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11/14/2000
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08662054
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Filing Dt:
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06/12/1996
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Title:
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TECHNIQUES AND CIRCUITS FOR HIGH YIELD IMPROVEMENTS IN PROGRAMMABLE DEVICES USING REDUNDANT LOGIC
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Patent #:
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Issue Dt:
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03/11/1997
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08664252
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Filing Dt:
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05/21/1996
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Title:
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METHOD OF PROVIDING A MARK FOR IDENTIFICATION ON A SILICON SURFACE
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Patent #:
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07/18/2000
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08666754
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Filing Dt:
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06/19/1996
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Title:
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SELF-ALIGNED TRENCH ISOLATED STRUCTURE AND METHOD FOR MAKING THE SAME
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Patent #:
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Issue Dt:
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03/03/1998
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Application #:
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08669116
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06/24/1996
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Title:
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MULTIPLE BITS-PER-CELL FLASH SHIFT REGISTER PAGE BUFFER
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Patent #:
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Issue Dt:
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08/24/1999
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08669713
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06/26/1996
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Title:
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METHOD AND APPARATUS TO GENERATE MASK PROGRAMMABLE DEVICE
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Patent #:
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Issue Dt:
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07/20/1999
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08669715
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Filing Dt:
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06/26/1996
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Title:
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METHOD AND APPARATUS TO GENERATE MASK PROGRAMMABLE DEVICE
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Patent #:
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Issue Dt:
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10/07/1997
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Application #:
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08671671
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06/28/1996
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Title:
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MEMORY BIT-LINE PULL-UP SCHEME
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Patent #:
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Issue Dt:
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12/21/1999
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08672050
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Filing Dt:
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06/26/1996
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Title:
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METHOD FOR FORMING AN INTERCONNECT
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Patent #:
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Issue Dt:
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08/04/1998
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Application #:
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08672723
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Filing Dt:
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06/28/1996
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Title:
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ASYNCHRONOUS ANTICONTENTION LOGIC FOR BI-DIRECTIONAL SIGNALS
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06/16/1998
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08672730
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Filing Dt:
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06/28/1996
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Title:
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SYNCHRONOUS CONTENTION PREVENTION LOGIC FOR BI-DIRECTIONAL SIGNALS
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Patent #:
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Issue Dt:
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07/14/1998
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08680288
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Filing Dt:
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07/11/1996
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Title:
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REDUCED OUTPUT SWING WITH P-CHANNEL PULLUP DIODE CONNECTED
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Patent #:
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07/29/1997
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08684920
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07/22/1996
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Title:
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A FLASH EEPROM MEMORY WITH REDUCED COLUMN LEAKAGE CURRENT AND METHOD THEREFOR
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Issue Dt:
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02/03/1998
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08686641
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07/24/1996
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Title:
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BIAS SCHEME OF PROGRAM INHIBIT FOR RANDOM PROGRAMMING IN A NAND FLASH MEMORY
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Patent #:
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Issue Dt:
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09/22/1998
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08691357
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08/02/1996
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Title:
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REDUNDANCY CIRCUIT AND METHOD FOR PROVIDING WORD LINES DRIVEN BY A SHIFT REGISTER
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Patent #:
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Issue Dt:
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10/27/1998
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08692571
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08/06/1996
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Title:
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MEMORY WITH ELECTRICALLY ERASABLE AND PROGRAMMABLE REDUNDANCY
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Patent #:
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Issue Dt:
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03/23/1999
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08693735
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Filing Dt:
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08/07/1996
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Title:
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ENABLLING CLOCK SIGNALS WITH A PHASE LOCKED LOOP (PLL) LOCK DETECT CIRCUIT
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Patent #:
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Issue Dt:
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10/30/2001
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08693978
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Filing Dt:
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08/01/1996
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Title:
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HOT METALLIZATION PROCESS
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Patent #:
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Issue Dt:
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07/06/1999
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Application #:
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08700076
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Filing Dt:
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08/20/1996
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Title:
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COMPLETELY ENCAPSULATED TOP ELECTRODE OF A FERROELECTRIC CAPACITOR
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Patent #:
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Issue Dt:
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06/09/1998
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Application #:
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08700249
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Filing Dt:
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08/20/1996
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Title:
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LATCHING INPUTS AND ENABLING OUTPUTS ON BIDIRECTIONAL PINS WITH A PHASE LOCKED LOOP (PLL) LOCK DETECT CIRCUIT
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Patent #:
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Issue Dt:
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10/07/1997
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Application #:
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08701288
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Filing Dt:
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08/22/1996
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Title:
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ERASE METHOD FOR PAGE MODE MULTIPLE BITS-PER-CELL FLASH EEPROM
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Patent #:
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Issue Dt:
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12/22/1998
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Application #:
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08702363
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Filing Dt:
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08/23/1996
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Title:
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BANDGAP REFERENCE BASED POWER-ON DETECT CIRCUIT INCLUDING A SUPRESSION CIRCUIT
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Patent #:
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Issue Dt:
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08/17/1999
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Application #:
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08708428
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Filing Dt:
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09/05/1996
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Title:
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AN IMPROVED ULTRATHIN OXYNITRIDE STRUCTURE AND PROCESS FOR VLSI APPLICTIONS
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Patent #:
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Issue Dt:
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01/08/2002
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Application #:
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08711419
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Filing Dt:
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08/30/1996
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Title:
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MICROCONTROLLER DEVELOPMENT SYSTEM AND APPLICATIONS THEREOF FOR DEVELOPMENT OF A UNIVERSAL SERIAL BUS MICROCONTROLLER
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Patent #:
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Issue Dt:
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02/08/2000
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Application #:
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08712372
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Filing Dt:
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09/11/1996
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Title:
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TESTING METHOD FOR DEVICES WITH STATUS FLAGS
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Patent #:
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Issue Dt:
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08/04/1998
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Application #:
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08715569
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Filing Dt:
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09/18/1996
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Title:
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SINGLE POLY MEMORY CELL AND ARRAY
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Patent #:
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Issue Dt:
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07/07/1998
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Application #:
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08720116
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Filing Dt:
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09/27/1996
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Title:
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CIRCUIT AND METHOD FOR INSTRUCTION CONTROLLABLE BIT LINE SLEW RATE
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Patent #:
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Issue Dt:
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04/13/1999
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Application #:
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08723076
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Filing Dt:
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09/30/1996
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Title:
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BOOTSTRAP AUGMENTATION CIRCUIT AND METHOD
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Patent #:
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Issue Dt:
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10/06/1998
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Application #:
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08723367
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Filing Dt:
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09/30/1996
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Title:
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SEMICONDUCTOR MEMORY DEVICE
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Patent #:
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Issue Dt:
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08/11/1998
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Application #:
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08723558
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Filing Dt:
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09/30/1996
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Title:
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SYSTEM FOR PROVIDING TIGHT PROGRAM/ERASE SPEEDS THAT ARE INSENSITIVE TO PROCESS VARIATIONS
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Patent #:
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Issue Dt:
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02/02/1999
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Application #:
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08728740
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Filing Dt:
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10/11/1996
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Title:
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PARTIALLY OR COMPLETELY ENCAPSULATED TOP ELECTRODE OF A FERROELECTRIC CAPACITOR
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Patent #:
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Issue Dt:
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12/21/1999
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Application #:
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08730824
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Filing Dt:
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10/17/1996
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Title:
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METHOD AND ARCHITECTURE FOR NON-SEQUENTIALLY PROGRAMMING ONE-TIME PROGRAMMABLE MEMORY TECHNOLOGY WITHOUT INITIALLY ERASING THE MEMORY
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Patent #:
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Issue Dt:
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12/05/2000
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Application #:
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08740290
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Filing Dt:
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10/25/1996
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Title:
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METHOD OF FORMING A METAL LAYER ON A SUBSTRATE, INCLUDING FORMATION OF WETTING LAYER AT A HIGH TEMPERATURE
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Patent #:
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Issue Dt:
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08/11/1998
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Application #:
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08742449
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Filing Dt:
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11/01/1996
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Title:
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CIRCUIT AND METHOD FOR DISABLING A BITLINE LOAD
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Patent #:
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Issue Dt:
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01/18/2000
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Application #:
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08744248
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Filing Dt:
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11/05/1996
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Title:
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THIN LINER LAYER PROVIDING REDUCED VIA RESISTANCE
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Patent #:
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Issue Dt:
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05/05/1998
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Application #:
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08744962
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Filing Dt:
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11/07/1996
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Title:
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DEVICE INCLUDING MEANS FOR PREVENTING TUNGSTEN SILICIDE LIFTING, AND METHOD OF FABRICATION THEREOF
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Patent #:
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Issue Dt:
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06/09/1998
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Application #:
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08745278
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Filing Dt:
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11/08/1996
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Title:
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BLOCK SELECT TRANSISTOR AND METHOD OF FABRICATION
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Patent #:
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Issue Dt:
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11/03/1998
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Application #:
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08745596
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Filing Dt:
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11/08/1996
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Title:
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METHOD OF PROGRAMMING A MEMORY CELL TO CONTAIN MULTIPLE VALUES
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Patent #:
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Issue Dt:
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04/07/1998
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Application #:
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08746320
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Filing Dt:
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11/12/1996
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Title:
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SENSE AMPLIFIER DESIGN
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Patent #:
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Issue Dt:
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01/05/1999
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Application #:
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08746645
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Filing Dt:
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11/13/1996
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Title:
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INTERFACE DEVICE FOR XT/AT SYSTEM DEVICES ON HIGH SPEED LOCAL BUS
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Patent #:
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Issue Dt:
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09/12/2000
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Application #:
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08749672
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Filing Dt:
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11/15/1996
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Title:
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SEMICONDUCTOR INTEGRATED CIRCUIT INCLUDING PLURALITY OF PHASE-LOCKED LOOPS
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Patent #:
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Issue Dt:
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05/05/1998
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Application #:
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08754177
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Filing Dt:
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11/21/1996
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Title:
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IMPROVED SENSE AMPLIFIER DESIGN WITH DYNAMIC RECOVERY
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Patent #:
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Issue Dt:
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11/02/1999
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Application #:
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08754521
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Filing Dt:
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11/21/1996
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Title:
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EDGE METAL FOR INTERCONNECT LAYERS
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Patent #:
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Issue Dt:
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05/12/1998
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Application #:
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08756634
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Filing Dt:
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11/26/1996
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Title:
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DATA TRANSITION DETECT WRITE CONTROL
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Patent #:
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Issue Dt:
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06/30/1998
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Application #:
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08757987
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Filing Dt:
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11/27/1996
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Title:
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ELECTRICALLY ERASABLE REFERENCE CELL FOR ACCURATELY DETERMINING THRESHOLD VOLTAGE OF A NON-VOLATILE MEMORY AT A PLURALITY OF THRESHOLD VOLTAGE LEVELS
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Patent #:
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Issue Dt:
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02/10/1998
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Application #:
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08757988
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Filing Dt:
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11/27/1996
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Title:
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APPARATUS AND METHOD FOR MULTIPLE-LEVEL STORAGE IN NON-VOLATILE MEMORIES
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Patent #:
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Issue Dt:
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01/19/1999
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Application #:
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08758223
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Filing Dt:
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11/27/1996
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Title:
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NOVEL METHOD OF FORMING ROBUST INTERCONNECT AND CONTACT STRUCTURES IN A SEMICONDUCTOR AND/OR INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
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12/15/1998
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Application #:
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08758890
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Filing Dt:
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12/02/1996
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Title:
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CHARGING APPARATUS AND CURRENT/VOLTAGE DETECTOR FOR USE THEREIN
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Patent #:
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Issue Dt:
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09/01/1998
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Application #:
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08762871
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Filing Dt:
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12/12/1996
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Title:
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CHARGE PUMP WITH REDUCED POWER CONSUMPTION
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Patent #:
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Issue Dt:
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10/13/1998
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Application #:
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08764027
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Filing Dt:
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12/11/1996
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Title:
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LOW VOLTAGE LEVEL SHIFTING CIRCUIT AND LOW VOLTAGE SENSE AMPLIFIER
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Patent #:
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Issue Dt:
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06/30/1998
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Application #:
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08764329
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Filing Dt:
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12/12/1996
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Title:
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SENSED WORDLINE DRIVER
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Patent #:
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Issue Dt:
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05/05/1998
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Application #:
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08766389
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Filing Dt:
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12/12/1996
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Title:
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VOLTAGE CONTROLLED OSCILLATOR (VCO) FREQUENCY GAIN COMPENSATION CIRCUIT
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Patent #:
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Issue Dt:
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06/09/1998
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Application #:
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08766608
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Filing Dt:
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12/13/1996
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Title:
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METHOD OF FORMING DIELECTRIC FILM
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Patent #:
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Issue Dt:
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01/12/1999
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Application #:
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08768407
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Filing Dt:
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12/18/1996
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Title:
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HIGH SPEED FIFO MARK AND RETRANSMIT SCHEME USING LATCHES AND PRECHARGE
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Patent #:
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Issue Dt:
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04/27/1999
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Application #:
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08768885
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Filing Dt:
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12/17/1996
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Title:
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METHOD OF FORMING A NON-VOLATILE MEMORY DEVICE WITH RAMPED TUNNEL DIELECTRIC LAYER
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Patent #:
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Issue Dt:
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12/02/1997
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Application #:
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08769178
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Filing Dt:
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12/18/1996
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Title:
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SEMICONDUCTOR DEVICE FROM SELF-ALIGNED SOURCE (SAS) ETCH IN A SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
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01/26/1999
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Application #:
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08769241
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Filing Dt:
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12/18/1996
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Title:
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DUAL LEVEL WORDLINE CLAMP FOR REDUCED MEMORY CELL CURRENT
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Patent #:
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Issue Dt:
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04/27/1999
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Application #:
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08769766
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Filing Dt:
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12/19/1996
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Title:
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ALIGNMENT PROCESS COMPATIBLE WITH CHEMICAL MECHANICAL POLISHING
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Patent #:
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Issue Dt:
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02/02/1999
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Application #:
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08772131
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Filing Dt:
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12/20/1996
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Title:
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BANK ARCHITECTURE FOR A NON-VOLATILE MEMORY ENABLING SIMULTANEOUS READING AND WRITING
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Patent #:
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Issue Dt:
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06/30/1998
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Application #:
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08772970
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Filing Dt:
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12/23/1996
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Title:
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NTRUCTURE AND METHOD TO PREVENT OVER ERASURE OF NONVOLATILE MEMORY TRANSISTORS
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Patent #:
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Issue Dt:
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08/10/1999
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Application #:
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08774293
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Filing Dt:
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12/23/1996
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Title:
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TEST MODE LATCHING SCHEME
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Patent #:
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Issue Dt:
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10/26/1999
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Application #:
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08774307
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Filing Dt:
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12/26/1996
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Title:
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LOW SUPPLY VOLTAGE NEGATIVE CHARGE PUMP
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Patent #:
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Issue Dt:
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09/07/1999
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Application #:
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08777304
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Filing Dt:
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12/27/1996
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|
Title:
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MINIMUM-LATENCY DATA MOVER WITH AUTO-SEGMENTATION AND REASSEMBLY
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Patent #:
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Issue Dt:
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08/11/1998
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Application #:
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08778781
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Filing Dt:
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01/06/1997
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Title:
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OSCILLATOR HAVING SWITCHING CAPACITORS AND PHASE-LOCKED LOOP EMPLOYING SAME
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Patent #:
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Issue Dt:
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12/15/1998
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Application #:
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08780167
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Filing Dt:
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12/26/1996
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Title:
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INTERRUPTIBLE STATE MACHINE
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Patent #:
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Issue Dt:
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12/21/1999
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Application #:
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08784207
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Filing Dt:
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01/15/1997
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Title:
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ULTRA-LOW PARTICLE SEMICONDUCTOR CLEANER FOR REMOVAL OF PARTICLE CONTAMINATION AND RESIDUES FROM SURFACE OXIDE FORMATION ON SEMICONDUCTOR WAFERS
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Patent #:
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Issue Dt:
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05/04/1999
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Application #:
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08788524
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Filing Dt:
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01/24/1997
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Title:
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CIRCUIT AND METHOD FOR DESKEWING VARIABLE SUPPLY SIGNAL PATHS
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Patent #:
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Issue Dt:
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03/16/1999
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Application #:
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08789797
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Filing Dt:
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01/28/1997
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Title:
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TRI-STATE OUTPUT CIRCUIT FOR SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
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09/08/1998
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Application #:
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08795024
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Filing Dt:
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02/04/1997
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Title:
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SYSTEM FOR CONSTANT FIELD ERASURE IN A FLASH EPROM
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Patent #:
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Issue Dt:
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08/18/1998
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Application #:
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08799236
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Filing Dt:
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02/14/1997
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Title:
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METHOD FOR ANNEALING DAMAGED SEMICONDUCTOR REGIONS ALLOWING FOR ENHANCED OXIDE GROWTH
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Patent #:
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Issue Dt:
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03/09/1999
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Application #:
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08799835
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Filing Dt:
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02/13/1997
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Title:
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ONE-PIN SHIFT REGISTER INTERFACE
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Patent #:
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Issue Dt:
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01/26/1999
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Application #:
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08800195
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Filing Dt:
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02/13/1997
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Title:
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SYNCHRONOUS CIRCUIT WITH IMPROVED CLOCK TO DATA OUTPUT ACCESS TIME
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Patent #:
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Issue Dt:
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12/22/1998
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Application #:
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08801305
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Filing Dt:
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02/18/1997
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Title:
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NON-VOLATILE STORAGE DEVICE REFRESH TIME DETECTOR
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Patent #:
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Issue Dt:
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03/21/2000
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Application #:
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08804025
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Filing Dt:
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02/19/1997
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Title:
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NOVEL CIRCUIT AND METHOD FOR CONTROLLING MEMORY DEPTH
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Patent #:
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Issue Dt:
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02/09/1999
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Application #:
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08805365
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Filing Dt:
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02/24/1997
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Title:
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OSCILLATION CIRCUIT AND PLL CIRCUIT USING SAME
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Patent #:
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Issue Dt:
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09/01/1998
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Application #:
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08808237
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Filing Dt:
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02/28/1997
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Title:
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HIGH VOLTAGE NMOS PASS GATE FOR INTEGRATED CIRCUIT WITH HIGH VOLTAGE GENERATOR
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Patent #:
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Issue Dt:
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09/08/1998
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Application #:
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08810164
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Filing Dt:
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02/28/1997
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Title:
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CHANNEL HOT-CARRIER PAGE WRITE FOR NAND APPLICATIONS
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Patent #:
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Issue Dt:
|
08/03/1999
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Application #:
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08813562
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Filing Dt:
|
03/07/1997
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Title:
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METHOD OF SPACER FORMATION AND SOURCE PROTECTION AFTER SELF- ALIGNED SOURCE IS FORMED AND DEVICE PROVIDED BY SUCH A METHOD
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Patent #:
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Issue Dt:
|
01/26/1999
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Application #:
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08816877
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Filing Dt:
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03/13/1997
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Title:
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METHOD AND APPARATUS FOR REDUCING CONTINUOUS WRITE CYCLE CURRENT IN MEMORY DEVICE
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|
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Patent #:
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Issue Dt:
|
10/19/1999
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Application #:
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08820893
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Filing Dt:
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03/19/1997
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Title:
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CONTROLLED ISOTROPIC ETCH PROCESS AND METHOD OF FORMING AN OPENING IN A DIELECTRIC LAYER
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Patent #:
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Issue Dt:
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11/24/1998
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Application #:
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08821617
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Filing Dt:
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03/20/1997
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Title:
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CIRCUIT AND METHOD FOR ADJUSTING DUTY CYCLES
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Patent #:
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Issue Dt:
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05/25/1999
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Application #:
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08824369
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Filing Dt:
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03/25/1997
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Title:
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DYNAMIC VOLTAGE REFERENCE WITH COMPENSATES FOR PROCESS VARIATIONS
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Patent #:
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Issue Dt:
|
06/15/1999
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Application #:
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08825359
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Filing Dt:
|
03/28/1997
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Title:
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SYNCHRONIZING CLOCK PULSE GENERATOR FOR LOGIC DERIVED CLOCK SIGNALS WITH SYNCHRONOUS CLOCK SUSPENSION CAPABILITY FOR A PROGRAMMABLE DEVICE
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Patent #:
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Issue Dt:
|
07/27/1999
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Application #:
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08825482
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Filing Dt:
|
03/28/1997
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Title:
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ASYNCHRONOUS PULSE DISCRIMINATING SYNCHRONIZING CLOCK PULSE GENERATOR FOR LOGIC DERIVED CLOCK SIGNALS FOR A PROGRAMMABLE DEVICE
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Patent #:
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Issue Dt:
|
07/06/1999
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Application #:
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08825484
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Filing Dt:
|
03/28/1997
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Title:
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PULSE DISCRIMINATING CLOCK SYNCHRONIZER FOR LOGIC DERIVED CLOCK SIGNALS FOR A PROGRAMMABLE DEVICE
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Patent #:
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Issue Dt:
|
06/29/1999
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Application #:
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08825489
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Filing Dt:
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03/28/1997
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Title:
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ASYNCHRONOUS PULSE DISCRIMINATING SYNCHRONIZING CLOCK PULSE GENERATOR WITH SYNCHRONOUS CLOCK SUSPENSION CAPABILITY FOR LOGIC DERIVED CLOCK SIGNALS FOR A PROGRAMMABLE DEVICE
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Patent #:
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Issue Dt:
|
07/13/1999
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Application #:
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08827271
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Filing Dt:
|
03/28/1997
|
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Title:
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FAST CLOCK GENERATOR AND CLOCK SYNCHRONIZER FOR LOGIC DERIVED CLOCK SIGNALS FOR A PROGRAMMABLE DEVICE
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|
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Patent #:
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Issue Dt:
|
02/22/2000
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Application #:
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08828157
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Filing Dt:
|
03/27/1997
|
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Title:
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PARTIALLY OR COMPLETELY ENCAPSULATED TOP ELECTRODE OF A FERROELECTRIC CAPACITOR
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|
|
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Patent #:
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|
Issue Dt:
|
07/04/2000
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Application #:
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08828319
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Filing Dt:
|
03/28/1997
|
|
Title:
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PULSE DISCRIMINATING CLOCK SYNCHRONIZER FOR LOGIC DERIVED CLOCK SIGNALS WITH SYNCHRONOUS CLOCK SUSPENSION CAPABILITY FOR A PROGRAMMABLE DEVICE
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|
|
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Patent #:
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|
Issue Dt:
|
06/15/1999
|
Application #:
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08828325
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Filing Dt:
|
03/28/1997
|
|
Title:
|
SYNCHRONIZING CLOCK PULSE GENERATOR FOR LOGIC DERIVED CLOCK SIGNALS FOR A PROGRAMMABLE DEVICE
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|
|
|
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Patent #:
|
|
Issue Dt:
|
07/13/1999
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Application #:
|
08828434
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Filing Dt:
|
03/28/1997
|
|
Title:
|
FAST CLOCK GENERATOR AND CLOCK SYNCHRONIZER FOR LOGIC DERIVED CLOCK SIGNALS WITH SYNCHRONOUS CLOCK SUSPENSION CAPABILITY FOR A PROGRAMMABLE DEVICE
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|
|
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Patent #:
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|
Issue Dt:
|
02/16/1999
|
Application #:
|
08828537
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Filing Dt:
|
03/31/1997
|
|
Title:
|
LOW SPEED DRIVER FOR USE WITH THE UNIVERSAL SERIAL BUS
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