skip navigationU S P T O SealUnited States Patent and Trademark Office AOTW logo
Home|Site Index|Search|Guides|Contacts|eBusiness|eBiz alerts|News|Help
Assignments on the Web > Patent Query
Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:039708/0001   Pages: 123
Recorded: 08/11/2016
Attorney Dkt #:3483.000
Conveyance: PARTIAL RELEASE OF SECURITY INTEREST IN PATENTS
Total properties: 2101
Page 13 of 22
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22
1
Patent #:
Issue Dt:
01/20/2004
Application #:
10313267
Filing Dt:
12/06/2002
Title:
CONTROLLED THICKNESS GATE STACK
2
Patent #:
Issue Dt:
07/08/2008
Application #:
10313283
Filing Dt:
12/06/2002
Title:
METHOD FOR CLEANING A GATE STACK
3
Patent #:
Issue Dt:
06/08/2004
Application #:
10314060
Filing Dt:
12/05/2002
Title:
METHOD OF FORMING COPPER SULFIDE FOR MEMORY CELL
4
Patent #:
Issue Dt:
06/12/2007
Application #:
10314380
Filing Dt:
12/06/2002
Publication #:
Pub Dt:
06/10/2004
Title:
MULTI-LAYER GATE STACK
5
Patent #:
Issue Dt:
05/22/2007
Application #:
10314591
Filing Dt:
12/09/2002
Publication #:
Pub Dt:
06/10/2004
Title:
SELF ALIGNED MEMORY ELEMENT AND WORDLINE
6
Patent #:
Issue Dt:
07/06/2004
Application #:
10319318
Filing Dt:
12/13/2002
Title:
METHOD FOR PLASMA ETCHING A MICROELECTRONIC TOPOGRAPHY USING A PULSE BIAS POWER
7
Patent #:
Issue Dt:
02/22/2005
Application #:
10320012
Filing Dt:
12/16/2002
Title:
LOT-TO-LOT FEED FORWARD CMP PROCESS
8
Patent #:
Issue Dt:
04/18/2006
Application #:
10320910
Filing Dt:
12/17/2002
Title:
DIFFERENTIALLY MIS-ALIGNED CONTACTS IN FLASH ARRAYS TO CALIBRATE FAILURE MODES
9
Patent #:
Issue Dt:
08/10/2004
Application #:
10321965
Filing Dt:
12/17/2002
Title:
SEMICONDUCTOR STRUCTURE HAVING ALIGNMENT MARKS WITH SHALLOW TRENCH ISOLATION
10
Patent #:
Issue Dt:
03/22/2005
Application #:
10323002
Filing Dt:
12/18/2002
Title:
FABRICATION OF A BIPOLAR TRANSISTOR USING A SACRIFICIAL EMITTER
11
Patent #:
Issue Dt:
10/18/2005
Application #:
10324308
Filing Dt:
12/18/2002
Title:
METHOD AND APPARATUS FOR RE-ACCESSING A FIFO LOCATION
12
Patent #:
Issue Dt:
06/22/2004
Application #:
10324455
Filing Dt:
12/20/2002
Title:
PROGRAMMABLE OSCILLATOR SCHEME
13
Patent #:
Issue Dt:
08/22/2006
Application #:
10325008
Filing Dt:
12/20/2002
Title:
MAGNETIC MEMORY ARRAY WITH AN IMPROVED WORD LINE CONFIGURATION
14
Patent #:
Issue Dt:
10/07/2008
Application #:
10325011
Filing Dt:
12/20/2002
Title:
APPARATUS, SYSTEM, AND METHOD FOR SYNCHRONIZING SIGNALS RECEIVED BY ONE OR MORE SYSTEM COMPONENTS
15
Patent #:
Issue Dt:
04/10/2012
Application #:
10325204
Filing Dt:
12/18/2002
Title:
METHOD AND SYSTEM FOR PROTECTING A WIRELESS NETWORK
16
Patent #:
Issue Dt:
03/22/2005
Application #:
10326525
Filing Dt:
12/20/2002
Title:
SELF-ALIGNED CONTACT STRUCTURE WITH RAISED SOURCE AND DRAIN
17
Patent #:
Issue Dt:
08/10/2004
Application #:
10326707
Filing Dt:
12/20/2002
Title:
FORMATION OF A SHALLOW TRENCH ISOLATION STRUCTURE IN INTEGRATED CIRCUITS
18
Patent #:
Issue Dt:
12/28/2004
Application #:
10327217
Filing Dt:
12/20/2002
Publication #:
Pub Dt:
06/24/2004
Title:
SINGLE ENDED CLOCK SIGNAL GENERATOR HAVING A DIFFERENTIAL OUTPUT
19
Patent #:
Issue Dt:
06/20/2006
Application #:
10327571
Filing Dt:
12/20/2002
Title:
REDUCING CROWBAR CURRENT IN A LATCH HYSTERESIS RECEIVER
20
Patent #:
Issue Dt:
11/23/2004
Application #:
10328265
Filing Dt:
12/23/2002
Title:
METHOD OF PROTECTING FLASH MEMORY FROM DATA CORRUPTION DURING FAST POWER DOWN EVENTS
21
Patent #:
Issue Dt:
03/06/2007
Application #:
10328904
Filing Dt:
12/23/2002
Title:
ANALOG SPREAD SPECTRUM SIGNAL GENERATION CIRCUIT
22
Patent #:
Issue Dt:
11/20/2007
Application #:
10329162
Filing Dt:
12/24/2002
Title:
ANALOG I/O WITH DIGITAL SIGNAL PROCESSOR ARRAY
23
Patent #:
Issue Dt:
04/04/2006
Application #:
10330589
Filing Dt:
12/27/2002
Title:
HIERARCHICALLY EXPANDABLE FAIR ARBITER
24
Patent #:
Issue Dt:
06/15/2004
Application #:
10338333
Filing Dt:
01/07/2003
Title:
SYSTEM AND METHOD FOR CHARGE RESTORATION IN A NON-VOLATILE MEMORY DEVICE
25
Patent #:
Issue Dt:
09/20/2005
Application #:
10339115
Filing Dt:
01/09/2003
Title:
CIRCUIT FOR LOCKING AN OSCILLATOR TO A DATA STREAM
26
Patent #:
Issue Dt:
10/26/2004
Application #:
10339536
Filing Dt:
01/08/2003
Title:
METHOD AND SYSTEM FOR TESTING TUNNEL OXIDE ON A MEMORY-RELATED STRUCTURE
27
Patent #:
Issue Dt:
09/28/2004
Application #:
10342032
Filing Dt:
01/14/2003
Title:
FLASH MEMORY DEVICES WITH OXYNITRIDE DIELECTRIC AS THE CHARGE STORAGE MEDIA
28
Patent #:
Issue Dt:
11/22/2005
Application #:
10349106
Filing Dt:
01/23/2003
Publication #:
Pub Dt:
08/07/2003
Title:
DC OFFSET CANCEL CIRCUIT
29
Patent #:
Issue Dt:
02/10/2004
Application #:
10349107
Filing Dt:
01/23/2003
Publication #:
Pub Dt:
08/14/2003
Title:
DC OFFSET CANCEL CIRCUIT
30
Patent #:
Issue Dt:
07/20/2004
Application #:
10353553
Filing Dt:
01/29/2003
Title:
METHOD OF ADJUSTING THE THRESHOLD VOLTAGE OF A MOSFET
31
Patent #:
Issue Dt:
11/30/2004
Application #:
10356449
Filing Dt:
01/31/2003
Title:
METHOD AND DEVICE FOR GENERATING FREQUENCY ADJUSTMENT PARAMETERS FOR A VOLTAGE CONTROLLED OSCILLATOR
32
Patent #:
Issue Dt:
08/10/2004
Application #:
10358589
Filing Dt:
02/05/2003
Publication #:
Pub Dt:
08/05/2004
Title:
UV-BLOCKING LAYER FOR REDUCING UV-INDUCED CHARGING OF SONOS DUAL-BIT FLASH MEMORY DEVICES IN BEOL PROCESSING
33
Patent #:
Issue Dt:
09/27/2005
Application #:
10359872
Filing Dt:
02/07/2003
Title:
METHOD OF FORMATION OF SEMICONDUCTOR RESISTANT TO HOT CARRIER INJECTION STRESS
34
Patent #:
Issue Dt:
12/30/2003
Application #:
10361455
Filing Dt:
02/10/2003
Title:
METHOD FOR FABRICATING DEVICES IN CORE AND PERIPHERY SEMICONDUCTOR REGIONS USING DUAL SPACERS
35
Patent #:
Issue Dt:
07/27/2004
Application #:
10364569
Filing Dt:
02/10/2003
Title:
STRUCTURE AND METHOD FOR SUPPRESSING OXIDE ENCROACHMENT IN A FLOATING GATE MEMORY CELL
36
Patent #:
Issue Dt:
07/13/2004
Application #:
10364756
Filing Dt:
02/11/2003
Publication #:
Pub Dt:
07/10/2003
Title:
PC CARD RETRACTABLE ANTENNA
37
Patent #:
Issue Dt:
12/21/2004
Application #:
10375534
Filing Dt:
02/27/2003
Title:
SEMICONDUCTOR TOPOGRAPHY HAVING AN INACTIVE REGION FORMED FROM A DUMMY STRUCTURE PATTERN
38
Patent #:
Issue Dt:
03/29/2005
Application #:
10378885
Filing Dt:
03/05/2003
Title:
IMPLANT DAMAGE REMOVAL BY LASER THERMAL ANNEALING
39
Patent #:
Issue Dt:
07/04/2006
Application #:
10384856
Filing Dt:
03/10/2003
Title:
METHOD AND SYSTEM FOR APPLYING TESTING VOLTAGE SIGNAL
40
Patent #:
Issue Dt:
07/20/2004
Application #:
10384936
Filing Dt:
03/10/2003
Title:
METHOD AND SYSTEM FOR DETECTING DEFECTIVE MATERIAL SURROUNDING FLASH MEMORY CELLS
41
Patent #:
Issue Dt:
08/30/2005
Application #:
10387774
Filing Dt:
03/12/2003
Title:
MEMORY DEVICE HAVING REVERSE LDD
42
Patent #:
Issue Dt:
11/16/2004
Application #:
10389149
Filing Dt:
03/13/2003
Title:
APPARATUS AND METHOD FOR A SENSE AMPLIFIER CIRCUIT THAT SAMPLES AND HOLDS A REFERENCE VOLTAGE
43
Patent #:
Issue Dt:
07/26/2005
Application #:
10393032
Filing Dt:
03/20/2003
Publication #:
Pub Dt:
09/25/2003
Title:
ADJUSTMENT OF THRESHOLD VOLTAGES OF SELECTED NMOS AND PMOS TRANSISTORS USING FEWER MASKING STEPS
44
Patent #:
Issue Dt:
03/21/2006
Application #:
10396005
Filing Dt:
03/25/2003
Title:
PHASE-FREQUENCY DETECTOR AND CHARGE PUMP WITH FEEDBACK
45
Patent #:
Issue Dt:
06/07/2005
Application #:
10402750
Filing Dt:
03/28/2003
Publication #:
Pub Dt:
09/30/2004
Title:
GATE ELECTRODE FOR MOS TRANSISTORS
46
Patent #:
Issue Dt:
11/29/2005
Application #:
10404081
Filing Dt:
04/02/2003
Publication #:
Pub Dt:
10/23/2003
Title:
SEMICONDUCTOR DEVICE LOW TEMPERATURE TEST APPARATUS USING ELECTRONIC COOLING ELEMENT
47
Patent #:
Issue Dt:
11/30/2004
Application #:
10405272
Filing Dt:
04/02/2003
Title:
PHOTOSENSITIVE POLYMERIC MEMORY ELEMENTS
48
Patent #:
Issue Dt:
03/27/2007
Application #:
10406130
Filing Dt:
04/03/2003
Title:
BMC-HOSTED REAL-TIME CLOCK AND NON-VOLATILE RAM REPLACEMENT
49
Patent #:
Issue Dt:
07/18/2006
Application #:
10407999
Filing Dt:
04/03/2003
Title:
MEMORY DEVICE HAVING IMPROVED PERIPHERY AND CORE ISOLATION
50
Patent #:
Issue Dt:
01/04/2005
Application #:
10413841
Filing Dt:
04/15/2003
Publication #:
Pub Dt:
02/12/2004
Title:
MEMORY DEVICE WITH ACTIVE PASSIVE LAYERS
51
Patent #:
Issue Dt:
03/08/2005
Application #:
10414353
Filing Dt:
04/15/2003
Publication #:
Pub Dt:
09/25/2003
Title:
MEMORY DEVICE
52
Patent #:
Issue Dt:
05/25/2004
Application #:
10418197
Filing Dt:
04/18/2003
Publication #:
Pub Dt:
10/30/2003
Title:
DIFFERENTIAL CIRCUIT AND PEAK HOLD CIRCUIT INCLUDING DIFFERENTIAL CIRCUIT
53
Patent #:
Issue Dt:
10/19/2004
Application #:
10419206
Filing Dt:
04/21/2003
Publication #:
Pub Dt:
11/20/2003
Title:
FREQUENCY SYNTHESIZER CIRCUIT
54
Patent #:
Issue Dt:
01/16/2007
Application #:
10430471
Filing Dt:
05/06/2003
Title:
METHOD OF FORMATION OF GATE STACK SPACER AND CHARGE STORAGE MATERIALS HAVING REDUCED HYDROGEN CONTENT IN CHARGE TRAPPING DIELECTRIC FLASH MEMORY DEVICE
55
Patent #:
Issue Dt:
06/22/2004
Application #:
10430582
Filing Dt:
05/06/2003
Title:
TRENCH SIDE WALL CHARGE TRAPPING DIELECTRIC FLASH MEMORY DEVICE
56
Patent #:
Issue Dt:
03/15/2005
Application #:
10430604
Filing Dt:
05/06/2003
Title:
MEMORY DEVICE WITH REDUCED OPERATING VOLTAGE HAVING DIELECTRIC STACK
57
Patent #:
Issue Dt:
02/14/2006
Application #:
10430991
Filing Dt:
05/07/2003
Title:
METHOD AND APPARATUS FOR ACCURATELY READING A POTENTIOMETER
58
Patent #:
Issue Dt:
04/12/2005
Application #:
10431322
Filing Dt:
05/06/2003
Title:
METHOD AND SYSTEM FOR IMPROVING SHORT CHANNEL EFFECT ON A FLOATING GATE DEVICE
59
Patent #:
Issue Dt:
10/04/2011
Application #:
10436411
Filing Dt:
05/12/2003
Title:
ISOLATION TECHNOLOGY FOR SUBMICRON SEMICONDUCTOR DEVICES
60
Patent #:
Issue Dt:
11/01/2005
Application #:
10436786
Filing Dt:
05/13/2003
Publication #:
Pub Dt:
11/18/2004
Title:
ERASING AND PROGRAMMING AN ORGANIC MEMORY DEVICE AND METHOD OF FABRICATING
61
Patent #:
Issue Dt:
02/21/2006
Application #:
10438942
Filing Dt:
05/16/2003
Title:
LASER THERMAL ANNEALING METHODS FOR FLASH MEMORY DEVICES
62
Patent #:
Issue Dt:
12/20/2005
Application #:
10452877
Filing Dt:
06/02/2003
Publication #:
Pub Dt:
12/02/2004
Title:
PLANAR POLYMER MEMORY DEVICE
63
Patent #:
Issue Dt:
01/31/2006
Application #:
10486864
Filing Dt:
02/11/2004
Publication #:
Pub Dt:
12/09/2004
Title:
MEMORY CELL
64
Patent #:
Issue Dt:
12/13/2005
Application #:
10614066
Filing Dt:
07/08/2003
Publication #:
Pub Dt:
01/15/2004
Title:
SEMICONDUCTOR MEMORY DEVICE FOR DIFFERENTIAL DATA AMPLIFICATION AND METHOD THEREFOR
65
Patent #:
Issue Dt:
03/27/2007
Application #:
10614177
Filing Dt:
07/08/2003
Title:
FLASH MEMORY DEVICE
66
Patent #:
Issue Dt:
10/12/2004
Application #:
10614484
Filing Dt:
07/07/2003
Title:
SILICON CONTAINING MATERIAL FOR PATTERNING POLYMERIC MEMORY ELEMENT
67
Patent #:
Issue Dt:
09/06/2005
Application #:
10616804
Filing Dt:
07/09/2003
Title:
METHOD FOR FABRICATING A FLASH MEMORY DEVICE
68
Patent #:
Issue Dt:
06/13/2006
Application #:
10617451
Filing Dt:
07/11/2003
Publication #:
Pub Dt:
01/13/2005
Title:
PECVD SILICON-RICH OXIDE LAYER FOR REDUCED UV CHARGING
69
Patent #:
Issue Dt:
07/18/2006
Application #:
10618156
Filing Dt:
07/11/2003
Title:
MEMORY STRUCTURE HAVING TUNABLE INTERLAYER DIELECTRIC AND METHOD FOR FABRICATING SAME
70
Patent #:
Issue Dt:
05/24/2005
Application #:
10618191
Filing Dt:
07/10/2003
Title:
FLASH MEMORY CELL HAVING REDUCED LEAKAGE CURRENT
71
Patent #:
Issue Dt:
03/01/2005
Application #:
10631199
Filing Dt:
07/31/2003
Publication #:
Pub Dt:
02/05/2004
Title:
FULLY ISOLATED DIELECTRIC MEMORY CELL STRUCTURE FOR A DUAL BIT NITRIDE STORAGE DEVICE AND PROCESS FOR MAKING SAME
72
Patent #:
Issue Dt:
03/14/2006
Application #:
10631856
Filing Dt:
08/01/2003
Publication #:
Pub Dt:
04/01/2004
Title:
NONVOLATILE SEMICONDUCTOR MEMORY DEVICE SUPPLYING PROPER PROGRAM POTENTIAL
73
Patent #:
Issue Dt:
01/24/2006
Application #:
10634857
Filing Dt:
08/06/2003
Publication #:
Pub Dt:
02/26/2004
Title:
DESIGN METHOD FOR INTEGRATED CIRCUIT HAVING SCAN FUNCTION
74
Patent #:
Issue Dt:
07/25/2006
Application #:
10635431
Filing Dt:
08/07/2003
Publication #:
Pub Dt:
02/12/2004
Title:
CONTROL METHOD OF SEMICONDUCTOR MEMORY DEVICE AND SEMICONDUCTOR MEMORY DEVICE
75
Patent #:
Issue Dt:
08/07/2007
Application #:
10649672
Filing Dt:
08/28/2003
Publication #:
Pub Dt:
03/18/2004
Title:
PLL CLOCK GENERATOR CIRCUIT AND CLOCK GENERATION METHOD
76
Patent #:
Issue Dt:
01/31/2006
Application #:
10655179
Filing Dt:
09/04/2003
Title:
MEMORY CELL STRUCTURE HAVING NITRIDE LAYER WITH REDUCED CHARGE LOSS AND METHOD FOR FABRICATING SAME
77
Patent #:
Issue Dt:
07/19/2005
Application #:
10655936
Filing Dt:
09/04/2003
Title:
METHOD OF FABRICATING A FLOATING GATE
78
Patent #:
Issue Dt:
08/19/2008
Application #:
10658936
Filing Dt:
09/09/2003
Title:
FLASH MEMORY WITH HIGH-K DIELECTRIC MATERIAL BETWEEN SUBSTRATE AND GATE
79
Patent #:
Issue Dt:
05/15/2007
Application #:
10658937
Filing Dt:
09/09/2003
Title:
METHOD AND APPARATUS FOR COUPLING TO A SOURCE LINE IN A MEMORY DEVICE
80
Patent #:
Issue Dt:
11/02/2004
Application #:
10660420
Filing Dt:
09/10/2003
Title:
HIGH DENSITY FLOATING GATE FLASH MEMORY AND FABRICATION PROCESSES THEREFOR
81
Patent #:
Issue Dt:
04/11/2006
Application #:
10662011
Filing Dt:
09/11/2003
Title:
METHOD FOR FABRICATING A MEMORY DEVICE
82
Patent #:
Issue Dt:
01/02/2007
Application #:
10662636
Filing Dt:
09/15/2003
Title:
FORMING A SUBSTANTIALLY PLANAR UPPER SURFACE AT THE OUTER EDGE OF A SEMICONDUCTOR TOPOGRAPHY
83
Patent #:
Issue Dt:
03/01/2005
Application #:
10665205
Filing Dt:
09/22/2003
Publication #:
Pub Dt:
03/25/2004
Title:
CONTROL METHOD OF NON-VOLATILE SEMICONDUCTOR MEMORY CELL AND NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE
84
Patent #:
Issue Dt:
08/30/2005
Application #:
10676612
Filing Dt:
10/01/2003
Title:
ORGANIC MEMORY CELL FORMATION ON AG SUBSTRATE
85
Patent #:
Issue Dt:
02/08/2005
Application #:
10677042
Filing Dt:
10/01/2003
Title:
SELF ASSEMBLY OF CONDUCTING POLYMER FOR FORMATION OF POLYMER MEMORY CELL
86
Patent #:
Issue Dt:
05/10/2005
Application #:
10681306
Filing Dt:
10/09/2003
Publication #:
Pub Dt:
04/22/2004
Title:
CURRENT PULSE RECEIVING CIRCUIT
87
Patent #:
Issue Dt:
11/08/2005
Application #:
10683631
Filing Dt:
10/10/2003
Title:
RECESSED CHANNEL
88
Patent #:
NONE
Issue Dt:
Application #:
10689034
Filing Dt:
10/21/2003
Publication #:
Pub Dt:
04/29/2004
Title:
Method of making metallization and contact structures in an integrated circuit using a timed trench etch
89
Patent #:
Issue Dt:
06/21/2005
Application #:
10696234
Filing Dt:
10/28/2003
Title:
METHOD FOR FORMING A DIELECTRIC SPACER IN A NON-VOLATILE MEMORY DEVICE
90
Patent #:
Issue Dt:
06/06/2006
Application #:
10699155
Filing Dt:
10/31/2003
Title:
MAGNETIC MEMORY ARRAY CONFIGURATION
91
Patent #:
Issue Dt:
10/18/2005
Application #:
10700021
Filing Dt:
11/03/2003
Title:
MEMORY ELEMENT FORMATION WITH PHOTOSENSITIVE POLYMER DIELECTRIC
92
Patent #:
Issue Dt:
03/13/2007
Application #:
10705881
Filing Dt:
11/13/2003
Publication #:
Pub Dt:
05/20/2004
Title:
METHOD FOR FABRICATING A SEMICONDUCTOR DEVICE
93
Patent #:
Issue Dt:
09/06/2005
Application #:
10706664
Filing Dt:
11/12/2003
Publication #:
Pub Dt:
06/10/2004
Title:
SEMICONDUCTOR INTEGRATED CIRCUIT
94
Patent #:
Issue Dt:
01/24/2006
Application #:
10718707
Filing Dt:
11/24/2003
Title:
METHODS FOR FORMING NITROGEN-RICH REGIONS IN NON-VOLATILE SEMICONDUCTOR MEMORY DEVICES
95
Patent #:
Issue Dt:
08/23/2005
Application #:
10726508
Filing Dt:
12/04/2003
Publication #:
Pub Dt:
06/09/2005
Title:
FLASH MEMORY DEVICE
96
Patent #:
Issue Dt:
02/27/2007
Application #:
10727481
Filing Dt:
12/05/2003
Publication #:
Pub Dt:
07/01/2004
Title:
METHOD FOR STORING IN NONVOLATILE MEMORY AND STORAGE UNIT
97
Patent #:
Issue Dt:
01/11/2005
Application #:
10728510
Filing Dt:
12/05/2003
Title:
NEUTRON DETECTING DEVICE
98
Patent #:
Issue Dt:
10/30/2007
Application #:
10738322
Filing Dt:
12/16/2003
Title:
FLASH MEMORY WITH BURIED BIT LINES
99
Patent #:
Issue Dt:
02/08/2005
Application #:
10742179
Filing Dt:
12/19/2003
Title:
MUTIPORT ARBITRATION USING PHASED LOCKING ARBITERS
100
Patent #:
Issue Dt:
12/13/2005
Application #:
10743188
Filing Dt:
12/23/2003
Publication #:
Pub Dt:
07/15/2004
Title:
SPREAD SPECTRUM CLOCK GENERATION CIRCUIT, JITTER GENERATION CIRCUIT AND SEMICONDUCTOR DEVICE
Assignor
1
Exec Dt:
08/11/2016
Assignees
1
198 CHAMPION COURT
SAN JOSE, CALIFORNIA 95134
2
915 DEGUIGNE DRIVE
SUNNYVALE, CALIFORNIA 94088
Correspondence name and address
WSGR, C/O QUI LU, SENIOR PARALEGAL
650 PAGE MILL ROAD
FH 2-1 P12
PALO ALTO, CA 94304

Search Results as of: 05/08/2024 05:21 AM
If you have any comments or questions concerning the data displayed, contact PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified: August 25, 2017 v.2.6
| .HOME | INDEX| SEARCH | eBUSINESS | CONTACT US | PRIVACY STATEMENT