|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/06/2004
|
Application #:
|
10241986
|
Filing Dt:
|
09/12/2002
|
|
Publication #:
|
|
Pub Dt:
|
03/20/2003
| | | | |
|
Title:
|
INTERPOLATING CIRCUIT, DLL CIRCUIT AND SEMICONDUCTOR INTEGRATED CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/05/2005
|
Application #:
|
10251062
|
Filing Dt:
|
09/20/2002
|
|
Publication #:
|
|
Pub Dt:
|
03/20/2003
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE WITH DOUBLE SIDEWALL SPACER AND LAYERED CONTACT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/19/2005
|
Application #:
|
10255987
|
Filing Dt:
|
09/26/2002
|
|
Publication #:
|
|
Pub Dt:
|
04/03/2003
| | | | |
|
Title:
|
METHOD, MEMORY SYSTEM AND MEMORY MODULE BOARD FOR AVOIDING LOCAL INCOORDINATION OF IMPEDANCE AROUND MEMORY CHIPS ON THE MEMORY SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/17/2005
|
Application #:
|
10260484
|
Filing Dt:
|
09/30/2002
|
|
Publication #:
|
|
Pub Dt:
|
04/10/2003
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE USING SHALLOW TRENCH ISOLATION AND METHOD OF FABRICATING THE SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/08/2005
|
Application #:
|
10279817
|
Filing Dt:
|
10/25/2002
|
|
Publication #:
|
|
Pub Dt:
|
05/01/2003
| | | | |
|
Title:
|
INPUT/OUTPUT CIRCUIT, REFERENCE-VOLTAGE GENERATING CIRCUIT, AND SEMICONDUCTOR INTEGRATED CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/25/2005
|
Application #:
|
10282810
|
Filing Dt:
|
10/29/2002
|
|
Publication #:
|
|
Pub Dt:
|
05/08/2003
| | | | |
|
Title:
|
METHOD OF CONTROLLING DATA READING CAPABLE OF INCREASING DATA TRANSFER RATE IN SDRAM OF THE POSTED CAS STANDARD
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/12/2003
|
Application #:
|
10287616
|
Filing Dt:
|
11/05/2002
|
|
Publication #:
|
|
Pub Dt:
|
04/03/2003
| | | | |
|
Title:
|
METHOD FOR FABRICATING SEMICONDUCTOR INTEGRATED CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/19/2004
|
Application #:
|
10292968
|
Filing Dt:
|
11/13/2002
|
|
Publication #:
|
|
Pub Dt:
|
06/19/2003
| | | | |
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE FOR REALIZING EXTERNAL 8K REF/INTERNAL 4K REF STANDARD WITHOUT LENGTHENING THE REFRESH CYCLE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/02/2004
|
Application #:
|
10298682
|
Filing Dt:
|
11/19/2002
|
|
Publication #:
|
|
Pub Dt:
|
06/19/2003
| | | | |
|
Title:
|
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/21/2006
|
Application #:
|
10305403
|
Filing Dt:
|
11/26/2002
|
|
Publication #:
|
|
Pub Dt:
|
05/27/2004
| | | | |
|
Title:
|
FOUR-BIT NON-VOLATILE MEMORY TRANSISTOR AND ARRAY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/25/2005
|
Application #:
|
10308434
|
Filing Dt:
|
12/03/2002
|
|
Publication #:
|
|
Pub Dt:
|
06/05/2003
| | | | |
|
Title:
|
SEMICONDUCTOR STORAGE DEVICE AND METHOD FOR REMEDYING DEFECTS OF MEMORY CELLS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/29/2005
|
Application #:
|
10309072
|
Filing Dt:
|
12/04/2002
|
|
Publication #:
|
|
Pub Dt:
|
08/07/2003
| | | | |
|
Title:
|
UNBUFFERED MEMORY SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/19/2004
|
Application #:
|
10309180
|
Filing Dt:
|
12/04/2002
|
|
Publication #:
|
|
Pub Dt:
|
06/19/2003
| | | | |
|
Title:
|
DYNAMIC RANDOM ACCESS MEMEORY (DRAM) CAPABLE OF CANCELING OUT COMPLEMENTARY NOISE DEVELOPED IN PLATE ELECTRODES OF MEMORY CELL CAPACITORS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/24/2005
|
Application #:
|
10317553
|
Filing Dt:
|
12/12/2002
|
|
Publication #:
|
|
Pub Dt:
|
06/19/2003
| | | | |
|
Title:
|
DYNAMIC SEMICONDUCTOR MEMORY DEVICE AND METHOD OF CONTROLLING REFRESH THEREOF
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/05/2006
|
Application #:
|
10326149
|
Filing Dt:
|
12/23/2002
|
|
Publication #:
|
|
Pub Dt:
|
05/15/2003
| | | | |
|
Title:
|
MEMORY-MODULE WITH AN INCREASED DENSITY FOR MOUNTING SEMICONDUCTOR CHIPS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/20/2005
|
Application #:
|
10329293
|
Filing Dt:
|
12/24/2002
|
|
Publication #:
|
|
Pub Dt:
|
12/04/2003
| | | | |
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE CAPABLE OF IMPROVING QUALITY OF VOLTAGE WAVEFORM GIVEN IN A SIGNAL INTERCONNECTION LAYER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/07/2009
|
Application #:
|
10333132
|
Filing Dt:
|
05/14/2003
|
|
Publication #:
|
|
Pub Dt:
|
10/09/2003
| | | | |
|
Title:
|
DATA TRANSMISSION DEVICE, DATA TRANSFER SYSTEM AND METHOD
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/30/2004
|
Application #:
|
10335389
|
Filing Dt:
|
12/31/2002
|
|
Publication #:
|
|
Pub Dt:
|
06/05/2003
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF PRODUCTION THEREOF
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/23/2003
|
Application #:
|
10337322
|
Filing Dt:
|
01/07/2003
|
|
Publication #:
|
|
Pub Dt:
|
05/22/2003
| | | | |
|
Title:
|
SEMICONDUCTOR INTEGRATED CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/15/2005
|
Application #:
|
10345756
|
Filing Dt:
|
01/16/2003
|
|
Publication #:
|
|
Pub Dt:
|
07/24/2003
| | | | |
|
Title:
|
METHOD OF DESIGNING SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE MANUFACTURED USING THE SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/27/2006
|
Application #:
|
10346448
|
Filing Dt:
|
01/17/2003
|
|
Publication #:
|
|
Pub Dt:
|
07/24/2003
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/30/2003
|
Application #:
|
10354122
|
Filing Dt:
|
01/30/2003
|
|
Publication #:
|
|
Pub Dt:
|
07/31/2003
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/01/2005
|
Application #:
|
10356980
|
Filing Dt:
|
02/03/2003
|
|
Publication #:
|
|
Pub Dt:
|
08/07/2003
| | | | |
|
Title:
|
GATE ELECTRODE AND METHOD OF FABRICATING THE SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/13/2004
|
Application #:
|
10357577
|
Filing Dt:
|
02/04/2003
|
|
Publication #:
|
|
Pub Dt:
|
11/27/2003
| | | | |
|
Title:
|
DATA WRITING METHOD AND MEMORY SYSTEM FOR USING THE METHOD
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/28/2003
|
Application #:
|
10361642
|
Filing Dt:
|
02/11/2003
|
|
Publication #:
|
|
Pub Dt:
|
06/19/2003
| | | | |
|
Title:
|
DYNAMIC RAM-AND SEMICONDUCTOR DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/08/2005
|
Application #:
|
10365423
|
Filing Dt:
|
02/13/2003
|
|
Publication #:
|
|
Pub Dt:
|
08/21/2003
| | | | |
|
Title:
|
METHOD OF MANUFACTURING A SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/13/2004
|
Application #:
|
10366423
|
Filing Dt:
|
02/14/2003
|
|
Publication #:
|
|
Pub Dt:
|
08/07/2003
| | | | |
|
Title:
|
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND METHOD OF MANUFACTURING INVOLVING THE SCALE-DOWN WIDTH OF SHALLOW GROOVE ISOLATION USING ROUND PROCESSING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/22/2005
|
Application #:
|
10370578
|
Filing Dt:
|
02/24/2003
|
|
Publication #:
|
|
Pub Dt:
|
09/04/2003
| | | | |
|
Title:
|
REDUNDANCY ARCHITECTURE FOR REPAIRING SEMICONDUCTOR MEMORIES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/11/2005
|
Application #:
|
10372000
|
Filing Dt:
|
02/20/2003
|
|
Publication #:
|
|
Pub Dt:
|
10/30/2003
| | | | |
|
Title:
|
BOOSTED POTENTIAL GENERATION CIRCUIT AND CONTROL METHOD
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/27/2005
|
Application #:
|
10372942
|
Filing Dt:
|
02/26/2003
|
|
Publication #:
|
|
Pub Dt:
|
10/09/2003
| | | | |
|
Title:
|
METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/01/2005
|
Application #:
|
10376461
|
Filing Dt:
|
02/28/2003
|
|
Publication #:
|
|
Pub Dt:
|
09/02/2004
| | | | |
|
Title:
|
SELECTIVE SILICIDATION SCHEME FOR MEMORY DEVICES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/14/2006
|
Application #:
|
10377713
|
Filing Dt:
|
03/04/2003
|
|
Publication #:
|
|
Pub Dt:
|
09/04/2003
| | | | |
|
Title:
|
STACKED SEMICONDUCTOR DEVICE INCLUDING IMPROVED LEAD FRAME ARRANGEMENT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/24/2005
|
Application #:
|
10379200
|
Filing Dt:
|
03/04/2003
|
|
Publication #:
|
|
Pub Dt:
|
09/11/2003
| | | | |
|
Title:
|
INPUT BUFFER CIRCUIT AND SEMICONDUCTOR MEMORY DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/14/2004
|
Application #:
|
10396339
|
Filing Dt:
|
03/26/2003
|
|
Publication #:
|
|
Pub Dt:
|
10/02/2003
| | | | |
|
Title:
|
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND PROCESS FOR MANUFACTURING THE SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/13/2005
|
Application #:
|
10409929
|
Filing Dt:
|
04/10/2003
|
|
Publication #:
|
|
Pub Dt:
|
01/15/2004
| | | | |
|
Title:
|
PACKAGE FOR MOUNTING SEMICONDUCTOR DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/30/2004
|
Application #:
|
10410124
|
Filing Dt:
|
04/09/2003
|
|
Publication #:
|
|
Pub Dt:
|
10/23/2003
| | | | |
|
Title:
|
METHOD OF CHECKING THE STATE OF A CAPACITOR FUSE IN WHICH THE VOLTAGE APPLIED TO THE CAPACITOR FUSE IS THE SAME LEVEL AS VOLTAGE APPLIED TO MEMORY CELLS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/31/2006
|
Application #:
|
10411700
|
Filing Dt:
|
04/11/2003
|
|
Publication #:
|
|
Pub Dt:
|
12/25/2003
| | | | |
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE WITH AN IMPROVED MEMORY CELL STRUCTURE AND METHOD OF OPERATING THE SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/24/2005
|
Application #:
|
10416717
|
Filing Dt:
|
05/14/2003
|
|
Publication #:
|
|
Pub Dt:
|
02/12/2004
| | | | |
|
Title:
|
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/02/2004
|
Application #:
|
10425320
|
Filing Dt:
|
04/29/2003
|
|
Publication #:
|
|
Pub Dt:
|
10/30/2003
| | | | |
|
Title:
|
DLL CIRCUIT CAPABLE OF PREVENTING LOCKING IN AN ANTIPHASE STATE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/23/2006
|
Application #:
|
10427090
|
Filing Dt:
|
04/30/2003
|
|
Publication #:
|
|
Pub Dt:
|
11/27/2003
| | | | |
|
Title:
|
MEMORY SYSTEM, MODULE AND REGISTER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/26/2004
|
Application #:
|
10437699
|
Filing Dt:
|
05/14/2003
|
|
Publication #:
|
|
Pub Dt:
|
11/20/2003
| | | | |
|
Title:
|
DEFECTIVE CELL REMEDY METHOD CAPABLE OF AUTOMATICALLY CUTTING CAPACITOR FUSES WITHIN THE FABRICATION PROCESS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/14/2004
|
Application #:
|
10441123
|
Filing Dt:
|
05/20/2003
|
|
Publication #:
|
|
Pub Dt:
|
11/27/2003
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE AND ITS MANUFACTURING METHOD
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/11/2006
|
Application #:
|
10443572
|
Filing Dt:
|
05/22/2003
|
|
Publication #:
|
|
Pub Dt:
|
12/04/2003
| | | | |
|
Title:
|
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE WITH CAPACITOR OF CROWN STRUCTURE AND METHOD OF MANUFACTURING THE SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/26/2004
|
Application #:
|
10443645
|
Filing Dt:
|
05/22/2003
|
|
Publication #:
|
|
Pub Dt:
|
01/08/2004
| | | | |
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE AND METHOD OF CONTROLLING THE SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/19/2006
|
Application #:
|
10445522
|
Filing Dt:
|
05/27/2003
|
|
Publication #:
|
|
Pub Dt:
|
12/04/2003
| | | | |
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/20/2004
|
Application #:
|
10447893
|
Filing Dt:
|
05/29/2003
|
|
Publication #:
|
|
Pub Dt:
|
04/08/2004
| | | | |
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/26/2005
|
Application #:
|
10449570
|
Filing Dt:
|
05/29/2003
|
|
Publication #:
|
|
Pub Dt:
|
12/04/2003
| | | | |
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/01/2006
|
Application #:
|
10449580
|
Filing Dt:
|
05/30/2003
|
|
Publication #:
|
|
Pub Dt:
|
12/25/2003
| | | | |
|
Title:
|
SYSTEM FOR TESTING A GROUP OF FUNCTIONALLY INDEPENDENT MEMORIES AND FOR REPLACING FAILING MEMORY WORDS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/08/2005
|
Application #:
|
10453611
|
Filing Dt:
|
06/04/2003
|
|
Publication #:
|
|
Pub Dt:
|
11/06/2003
| | | | |
|
Title:
|
METHOD FOR FABRICATING SEMICONDUCTOR INTEGRATED CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/01/2005
|
Application #:
|
10454404
|
Filing Dt:
|
06/04/2003
|
|
Publication #:
|
|
Pub Dt:
|
12/11/2003
| | | | |
|
Title:
|
SEMICONDUCTOR APPARATUS WHICH PREVENTS GENERATING NOISE AND BEING INFLUENCED BY NOISE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/06/2005
|
Application #:
|
10460987
|
Filing Dt:
|
06/13/2003
|
|
Publication #:
|
|
Pub Dt:
|
12/18/2003
| | | | |
|
Title:
|
MEMORY SYSTEM AND CONTROL METHOD FOR THE SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/15/2005
|
Application #:
|
10462410
|
Filing Dt:
|
06/16/2003
|
|
Publication #:
|
|
Pub Dt:
|
12/18/2003
| | | | |
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE HAVING A REFERENCE CELL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/05/2006
|
Application #:
|
10470573
|
Filing Dt:
|
08/29/2002
|
|
Publication #:
|
|
Pub Dt:
|
03/11/2004
| | | | |
|
Title:
|
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND PROCESS FOR MANUFACTURING THE SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/17/2007
|
Application #:
|
10493443
|
Filing Dt:
|
08/11/2005
|
|
Publication #:
|
|
Pub Dt:
|
02/16/2006
| | | | |
|
Title:
|
VERTICAL MISFET MANUFACTURING METHOD, VERTICAL MISFET, SEMICONDUCTOR MEMORY DEVICE MANUFACTURING METHOD, AND SEMICONDUCTOR MEMORY DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/03/2007
|
Application #:
|
10534049
|
Filing Dt:
|
05/06/2005
|
|
Publication #:
|
|
Pub Dt:
|
02/16/2006
| | | | |
|
Title:
|
SENSE AMPLIFIER FOR SEMICONDUCTOR MEMORY DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/17/2009
|
Application #:
|
10579911
|
Filing Dt:
|
04/09/2007
|
|
Publication #:
|
|
Pub Dt:
|
11/29/2007
| | | | |
|
Title:
|
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/06/2005
|
Application #:
|
10609476
|
Filing Dt:
|
07/01/2003
|
|
Publication #:
|
|
Pub Dt:
|
01/08/2004
| | | | |
|
Title:
|
METHOD FOR SEMICONDUCTOR DEVICE MANUFACTURING TO INCLUDE MULTISTAGE CHEMICAL VAPOR DEPOSITION OF MATERIAL OXIDE FILM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/14/2006
|
Application #:
|
10611862
|
Filing Dt:
|
07/03/2003
|
|
Publication #:
|
|
Pub Dt:
|
05/13/2004
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE WITH MULTILAYER CONDUCTIVE STRUCTURE FORMED ON A SEMICONDUCTOR SUBSTRATE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/15/2005
|
Application #:
|
10614239
|
Filing Dt:
|
07/08/2003
|
|
Publication #:
|
|
Pub Dt:
|
01/15/2004
| | | | |
|
Title:
|
SYNCHRONOUS SEMICONDUCTOR MEMORY DEVICE HAVING A DESIRED-SPEED TEST MODE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/29/2007
|
Application #:
|
10617040
|
Filing Dt:
|
07/11/2003
|
|
Publication #:
|
|
Pub Dt:
|
01/15/2004
| | | | |
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE PROVIDED WITH ERROR CORRECTING CODE CIRCUITRY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/13/2005
|
Application #:
|
10618508
|
Filing Dt:
|
07/11/2003
|
|
Publication #:
|
|
Pub Dt:
|
01/22/2004
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE AND ITS MANUFACTURING METHOD
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/16/2004
|
Application #:
|
10620504
|
Filing Dt:
|
07/16/2003
|
|
Publication #:
|
|
Pub Dt:
|
04/01/2004
| | | | |
|
Title:
|
METHOD OF RECOVERING MEMORY MODULE, MEMORY MODULE AND VOLATILE MEMORY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/15/2005
|
Application #:
|
10624801
|
Filing Dt:
|
07/22/2003
|
|
Publication #:
|
|
Pub Dt:
|
08/05/2004
| | | | |
|
Title:
|
CLOCK SYNCHRONIZATION CIRCUIT HAVING BIDIRECTIONAL DELAY CIRCUIT STRINGS AND CONTROLLABLE PRE AND POST STAGE DELAY CIRCUITS CONNECTED THERETO AND SEMICONDUCTOR EVICE MANUFACTURED THEREOF
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/23/2004
|
Application #:
|
10626431
|
Filing Dt:
|
07/23/2003
|
|
Publication #:
|
|
Pub Dt:
|
07/01/2004
| | | | |
|
Title:
|
METHOD AND CIRCUIT FOR CHARGING A SIGNAL VOLTAGE THROUGH A SEMICONDUCTOR MEMORY DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/13/2004
|
Application #:
|
10627713
|
Filing Dt:
|
07/28/2003
|
|
Publication #:
|
|
Pub Dt:
|
01/29/2004
| | | | |
|
Title:
|
DYNAMIC RAM-AND SEMICONDUCTOR DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/21/2005
|
Application #:
|
10627769
|
Filing Dt:
|
07/28/2003
|
|
Publication #:
|
|
Pub Dt:
|
01/29/2004
| | | | |
|
Title:
|
A SEMICONDUCTOR MEMORY DEVICE HAVING IMPROVED ARRANGEMENT FOR REPLACING FAILED BIT LINES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/09/2007
|
Application #:
|
10628517
|
Filing Dt:
|
07/28/2003
|
|
Publication #:
|
|
Pub Dt:
|
04/15/2004
| | | | |
|
Title:
|
MEMORY MODULE AND MEMORY SYSTEM HAVING AN EXPANDABLE SIGNAL TRANSMISSION, INCREASED SIGNAL TRANSMISSION AND/OR HIGH CAPACITY MEMORY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/04/2007
|
Application #:
|
10630444
|
Filing Dt:
|
07/29/2003
|
|
Publication #:
|
|
Pub Dt:
|
05/06/2004
| | | | |
|
Title:
|
ALD PROCESS FOR CAPACITOR DIELECTRIC
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/21/2006
|
Application #:
|
10630457
|
Filing Dt:
|
07/29/2003
|
|
Publication #:
|
|
Pub Dt:
|
01/29/2004
| | | | |
|
Title:
|
MEMORY MODULE AND MEMORY SYSTEM SUITABLE FOR HIGH SPEED OPERATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/26/2004
|
Application #:
|
10630695
|
Filing Dt:
|
07/31/2003
|
|
Publication #:
|
|
Pub Dt:
|
02/05/2004
| | | | |
|
Title:
|
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND A METHOD OF MANUFACTURE THEREOF
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/11/2005
|
Application #:
|
10633710
|
Filing Dt:
|
08/05/2003
|
|
Publication #:
|
|
Pub Dt:
|
08/12/2004
| | | | |
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE INCLUDING SUBWORD DRIVERS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/10/2006
|
Application #:
|
10642667
|
Filing Dt:
|
08/19/2003
|
|
Publication #:
|
|
Pub Dt:
|
02/26/2004
| | | | |
|
Title:
|
METHOD FOR FABRICATING A SEMICONDUCTOR DEVICE HAVING A TAPERED-MESA SIDE-WALL FILM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/02/2005
|
Application #:
|
10642743
|
Filing Dt:
|
08/19/2003
|
|
Publication #:
|
|
Pub Dt:
|
02/19/2004
| | | | |
|
Title:
|
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND METHOD FOR MANUFACTURING THE SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/26/2006
|
Application #:
|
10647157
|
Filing Dt:
|
08/22/2003
|
|
Publication #:
|
|
Pub Dt:
|
06/03/2004
| | | | |
|
Title:
|
MEMORY SYSTEM AND DATA TRANSMISSION METHOD
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/06/2006
|
Application #:
|
10648883
|
Filing Dt:
|
08/27/2003
|
|
Publication #:
|
|
Pub Dt:
|
08/05/2004
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF PRODUCING THE SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/30/2005
|
Application #:
|
10650542
|
Filing Dt:
|
08/28/2003
|
|
Publication #:
|
|
Pub Dt:
|
04/15/2004
| | | | |
|
Title:
|
DUTY RATIO DETECTING APPARATUS WITH SMALL RETURN TIME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/27/2005
|
Application #:
|
10653160
|
Filing Dt:
|
09/03/2003
|
|
Publication #:
|
|
Pub Dt:
|
03/04/2004
| | | | |
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/09/2006
|
Application #:
|
10653889
|
Filing Dt:
|
09/04/2003
|
|
Publication #:
|
|
Pub Dt:
|
03/04/2004
| | | | |
|
Title:
|
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND MANUFACTURING METHOD THEREOF
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/19/2005
|
Application #:
|
10656351
|
Filing Dt:
|
09/05/2003
|
|
Publication #:
|
|
Pub Dt:
|
09/23/2004
| | | | |
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/20/2004
|
Application #:
|
10658396
|
Filing Dt:
|
09/10/2003
|
|
Publication #:
|
|
Pub Dt:
|
03/11/2004
| | | | |
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE HAVING A HIERARCHICAL I/O STRUCTURE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/01/2005
|
Application #:
|
10659031
|
Filing Dt:
|
09/09/2003
|
|
Publication #:
|
|
Pub Dt:
|
03/10/2005
| | | | |
|
Title:
|
PROTECTION AGAINST IN-PROCESS CHARGING IN SILICON-OXIDE-NITRIDE-OXIDE-SILICON (SONOS) MEMORIES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/13/2006
|
Application #:
|
10659042
|
Filing Dt:
|
09/09/2003
|
|
Publication #:
|
|
Pub Dt:
|
03/10/2005
| | | | |
|
Title:
|
METHOD OF DECREASING CHARGING EFFECTS IN OXIDE-NITRIDE-OXIDE (ONO) MEMORY ARRAYS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/21/2006
|
Application #:
|
10669303
|
Filing Dt:
|
09/24/2003
|
|
Publication #:
|
|
Pub Dt:
|
04/01/2004
| | | | |
|
Title:
|
ADDRESS COUNTER CONTROL SYSTEM WITH PATH SWITCHING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/24/2005
|
Application #:
|
10669304
|
Filing Dt:
|
09/24/2003
|
|
Publication #:
|
|
Pub Dt:
|
04/01/2004
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE USING CURRENT MIRROR CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/15/2005
|
Application #:
|
10669330
|
Filing Dt:
|
09/25/2003
|
|
Publication #:
|
|
Pub Dt:
|
04/01/2004
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE INCLUDING STORAGE CAPACITOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/02/2005
|
Application #:
|
10672393
|
Filing Dt:
|
09/25/2003
|
|
Publication #:
|
|
Pub Dt:
|
03/31/2005
| | | | |
|
Title:
|
DIFFERENTIAL TO SINGLE-ENDED LOGIC CONVERTER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/18/2005
|
Application #:
|
10676110
|
Filing Dt:
|
10/02/2003
|
|
Publication #:
|
|
Pub Dt:
|
04/29/2004
| | | | |
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE USING OPEN DATA LINE ARRANGEMENT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/14/2006
|
Application #:
|
10680239
|
Filing Dt:
|
10/08/2003
|
|
Publication #:
|
|
Pub Dt:
|
04/08/2004
| | | | |
|
Title:
|
DATA INVERSION CIRCUIT AND SEMICONDUCTOR DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/25/2005
|
Application #:
|
10681836
|
Filing Dt:
|
10/09/2003
|
|
Publication #:
|
|
Pub Dt:
|
06/03/2004
| | | | |
|
Title:
|
SLEW RATE CONTROLLING METHOD AND SYSTEM FOR OUTPUT DATA
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/14/2006
|
Application #:
|
10693191
|
Filing Dt:
|
10/23/2003
|
|
Publication #:
|
|
Pub Dt:
|
11/11/2004
| | | | |
|
Title:
|
TIMING ADJUSTMENT CIRCUIT AND SEMICONDUCTOR DEVICE INCLUDING THE SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/14/2005
|
Application #:
|
10693952
|
Filing Dt:
|
10/28/2003
|
|
Publication #:
|
|
Pub Dt:
|
07/08/2004
| | | | |
|
Title:
|
WAFER POLISHING METHOD AND WAFER POLISHING APPARATUS IN SEMICONDUCTOR FABRICATION EQUIPMENT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/30/2005
|
Application #:
|
10696728
|
Filing Dt:
|
10/27/2003
|
|
Publication #:
|
|
Pub Dt:
|
04/28/2005
| | | | |
|
Title:
|
NEIGHBOR EFFECT CANCELLATION IN MEMORY ARRAY ARCHITECTURE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/08/2007
|
Application #:
|
10699223
|
Filing Dt:
|
10/30/2003
|
|
Publication #:
|
|
Pub Dt:
|
11/04/2004
| | | | |
|
Title:
|
DRAM WITH SUPER SELF-REFRESH AND ERROR CORRECTION FOR EXTENDED PERIOD BETWEEN REFRESH OPERATIONS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/30/2005
|
Application #:
|
10699628
|
Filing Dt:
|
10/31/2003
|
|
Publication #:
|
|
Pub Dt:
|
05/19/2005
| | | | |
|
Title:
|
MEMORY MODULE, MEMORY CHIP, AND MEMORY SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/02/2005
|
Application #:
|
10701511
|
Filing Dt:
|
11/06/2003
|
|
Publication #:
|
|
Pub Dt:
|
07/01/2004
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/03/2006
|
Application #:
|
10714210
|
Filing Dt:
|
11/14/2003
|
|
Publication #:
|
|
Pub Dt:
|
05/27/2004
| | | | |
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE ADAPTIVE FOR USE CIRCUMSTANCE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/30/2005
|
Application #:
|
10714768
|
Filing Dt:
|
11/17/2003
|
|
Publication #:
|
|
Pub Dt:
|
10/14/2004
| | | | |
|
Title:
|
DELAY PRODUCING METHOD, DELAY ADJUSTING METHOD BASED ON THE SAME, AND DELAY PRODUCING CIRCUIT AND DELAY ADJUSTING CIRCUIT APPLIED WITH THEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/24/2005
|
Application #:
|
10729457
|
Filing Dt:
|
12/05/2003
|
|
Publication #:
|
|
Pub Dt:
|
06/17/2004
| | | | |
|
Title:
|
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND METHOD OF DETECTING DELAY ERROR IN THE SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/13/2006
|
Application #:
|
10731747
|
Filing Dt:
|
12/09/2003
|
|
Publication #:
|
|
Pub Dt:
|
06/24/2004
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE USING SHALLOW TRENCH ISOLATION AND METHOD OF FABRICATING THE SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/13/2006
|
Application #:
|
10743882
|
Filing Dt:
|
12/24/2003
|
|
Publication #:
|
|
Pub Dt:
|
07/15/2004
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE AND A METHOD OF MANUFACTURING THE SAME
|
|
