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Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:039884/0004   Pages: 26
Recorded: 08/30/2016
Conveyance: SECURITY INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 31
1
Patent #:
Issue Dt:
09/28/2004
Application #:
09955641
Filing Dt:
09/18/2001
Publication #:
Pub Dt:
01/15/2004
Title:
SEMICONDUCTOR MEMORY CELL AND MEMORY ARRAY USING A BREAKDOWN PHENOMENA IN AN ULTRA-THIN DIELECTRIC
2
Patent #:
Issue Dt:
07/27/2004
Application #:
09982034
Filing Dt:
10/17/2001
Publication #:
Pub Dt:
02/19/2004
Title:
SMART CARD HAVING MEMORY USING A BREAKDOWN PHENOMENA IN AN ULTRA-THIN DIELECTRIC
3
Patent #:
Issue Dt:
03/02/2004
Application #:
09982314
Filing Dt:
10/17/2001
Publication #:
Pub Dt:
04/17/2003
Title:
REPROGRAMMABLE NON-VOLATILE MEMORY USING A BREAKDOWN PHENOMENA IN AN ULTRA-THIN DIELECTRIC
4
Patent #:
Issue Dt:
12/23/2003
Application #:
10024327
Filing Dt:
12/17/2001
Publication #:
Pub Dt:
10/23/2003
Title:
SEMICONDUCTOR MEMORY CELL AND MEMORY ARRAY USING A BREAKDOWN PHENOMENA IN AN ULTRA-THIN DIELECTRIC
5
Patent #:
Issue Dt:
08/17/2004
Application #:
10133704
Filing Dt:
04/26/2002
Publication #:
Pub Dt:
10/30/2003
Title:
HIGH DENSITY SEMICONDUCTOR MEMORY CELL AND MEMORY ARRAY USING A SINGLE TRANSISTOR
6
Patent #:
Issue Dt:
12/30/2003
Application #:
10256483
Filing Dt:
09/26/2002
Publication #:
Pub Dt:
04/03/2003
Title:
PROGRAMMING METHODS AND CIRCUITS FOR SEMICONDUCTOR MEMORY CELL AND MEMORY ARRAY USING A BREAKDOWN PHENOMENA IN AN ULTRA-THIN DIELECTRIC
7
Patent #:
Issue Dt:
10/18/2005
Application #:
10264212
Filing Dt:
10/03/2002
Publication #:
Pub Dt:
04/17/2003
Title:
REPROGRAMMABLE NON-VOLATILE MEMORY USING A BREAKDOWN PHENOMENA IN AN ULTRA-THIN DIELECTRIC
8
Patent #:
Issue Dt:
09/14/2004
Application #:
10406406
Filing Dt:
04/02/2003
Title:
METHOD OF TESTING THE THIN OXIDE OF A SEMICONDUCTOR MEMORY CELL THAT USES BREAKDOWN VOLTAGE
9
Patent #:
Issue Dt:
02/15/2005
Application #:
10448505
Filing Dt:
05/30/2003
Publication #:
Pub Dt:
11/06/2003
Title:
HIGH DENSITY SEMICONDUCTOR MEMORY CELL AND MEMORY ARRAY USING A SINGLE TRANSISTOR
10
Patent #:
Issue Dt:
11/23/2004
Application #:
10639041
Filing Dt:
08/11/2003
Publication #:
Pub Dt:
03/11/2004
Title:
SEMICONDUCTOR MEMORY CELL AND MEMORY ARRAY USING A BREAKDOWN PHENOMENA IN AN ULTRA-THIN DIELECTRIC
11
Patent #:
Issue Dt:
05/24/2005
Application #:
10677613
Filing Dt:
10/02/2003
Publication #:
Pub Dt:
07/01/2004
Title:
HIGH DENSITY SEMICONDUCTOR MEMORY CELL AND MEMORY ARRAY USING A SINGLE TRANSISTOR HAVING A BURIED N+ CONNECTION
12
Patent #:
Issue Dt:
09/06/2005
Application #:
10765802
Filing Dt:
01/26/2004
Publication #:
Pub Dt:
08/12/2004
Title:
HIGH DENSITY SEMICONDUCTOR MEMORY CELL AND MEMORY ARRAY USING A SINGLE TRANSISTOR AND HAVING VARIABLE GATE OXIDE BREAKDOWN
13
Patent #:
Issue Dt:
04/18/2006
Application #:
10796270
Filing Dt:
03/09/2004
Publication #:
Pub Dt:
10/21/2004
Title:
METHODS AND CIRCUITS FOR TESTING PROGRAMMABILITY OF A SEMICONDUCTOR MEMORY CELL AND MEMORY ARRAY USING A BREAKDOWN PHENOMENON IN AN ULTRA-THIN DIELECTRIC
14
Patent #:
Issue Dt:
01/31/2006
Application #:
10798753
Filing Dt:
03/10/2004
Publication #:
Pub Dt:
11/11/2004
Title:
HIGH DENSITY SEMICONDUCTOR MEMORY CELL AND MEMORY ARRAY USING A SINGLE TRANSISTOR AND HAVING COUNTER-DOPED POLY AND BURIED DIFFUSION WORDLINE
15
Patent #:
Issue Dt:
05/09/2006
Application #:
10859934
Filing Dt:
06/02/2004
Publication #:
Pub Dt:
11/11/2004
Title:
METHODS AND CIRCUITS FOR PROGRAMMING OF A SEMICONDUCTOR MEMORY CELL AND MEMORY ARRAY USING A BREAKDOWN PHENOMENON IN AN ULTRA-THIN DIELECTRIC
16
Patent #:
Issue Dt:
02/06/2007
Application #:
11252461
Filing Dt:
10/18/2005
Title:
3.5 TRANSISTOR NON-VOLATILE MEMORY CELL USING GATE BREAKDOWN PHENOMENA
17
Patent #:
Issue Dt:
09/11/2007
Application #:
11368576
Filing Dt:
03/06/2006
Publication #:
Pub Dt:
09/06/2007
Title:
MEMORY TRANSISTOR GATE OXIDE STRESS RELEASE AND IMPROVED RELIABILITY
18
Patent #:
Issue Dt:
12/30/2008
Application #:
11657982
Filing Dt:
01/24/2007
Publication #:
Pub Dt:
07/24/2008
Title:
NON-VOLATILE SEMICONDUCTOR MEMORY BASED ON ENHANCED GATE OXIDE BREAKDOWN
19
Patent #:
Issue Dt:
10/27/2009
Application #:
11699916
Filing Dt:
01/29/2007
Publication #:
Pub Dt:
08/09/2007
Title:
ELECTRICALLY PROGRAMMABLE FUSE BIT
20
Patent #:
Issue Dt:
12/30/2008
Application #:
11759050
Filing Dt:
06/06/2007
Publication #:
Pub Dt:
10/04/2007
Title:
MEMORY TRANSISTOR GATE OXIDE STRESS RELEASE AND IMPROVED RELIABILITY
21
Patent #:
Issue Dt:
09/08/2009
Application #:
11858515
Filing Dt:
09/20/2007
Publication #:
Pub Dt:
03/26/2009
Title:
REDUCING BIT LINE LEAKAGE CURRENT IN NON-VOLATILE MEMORIES
22
Patent #:
Issue Dt:
02/14/2012
Application #:
12202048
Filing Dt:
08/29/2008
Publication #:
Pub Dt:
03/04/2010
Title:
METHOD AND APPARATUS FOR PROGRAMMING AUTO SHUT-OFF
23
Patent #:
Issue Dt:
11/24/2009
Application #:
12330465
Filing Dt:
12/08/2008
Publication #:
Pub Dt:
04/02/2009
Title:
NON-VOLATILE SEMICONDUCTOR MEMORY BASED ON ENHANCED GATE OXIDE BREAKDOWN
24
Patent #:
Issue Dt:
03/15/2011
Application #:
12577084
Filing Dt:
10/09/2009
Publication #:
Pub Dt:
04/15/2010
Title:
ELECTRICALLY PROGRAMMABLE FUSE BIT
25
Patent #:
Issue Dt:
10/09/2012
Application #:
12802206
Filing Dt:
06/02/2010
Publication #:
Pub Dt:
12/08/2011
Title:
ONE-TIME PROGRAMMABLE MEMORY
26
Patent #:
Issue Dt:
12/11/2012
Application #:
12819566
Filing Dt:
06/21/2010
Publication #:
Pub Dt:
12/22/2011
Title:
ONE-TIME PROGRAMMABLE MEMORY AND METHOD FOR MAKING THE SAME
27
Patent #:
Issue Dt:
01/05/2016
Application #:
14250267
Filing Dt:
04/10/2014
Publication #:
Pub Dt:
08/07/2014
Title:
ONE-TIME PROGRAMMABLE MEMORY AND METHOD FOR MAKING THE SAME
28
Patent #:
Issue Dt:
08/30/2016
Application #:
14681852
Filing Dt:
04/08/2015
Publication #:
Pub Dt:
10/29/2015
Title:
One-Time Programmable Memory and Method for Making the Same
29
Patent #:
Issue Dt:
01/17/2017
Application #:
15152463
Filing Dt:
05/11/2016
Publication #:
Pub Dt:
01/26/2017
Title:
Reduced Power Read Sensing for One-Time Programmable Memories
30
Patent #:
Issue Dt:
12/26/2017
Application #:
15154911
Filing Dt:
05/13/2016
Publication #:
Pub Dt:
12/29/2016
Title:
Write Enhancement for One Time Programmable (OTP) Semiconductors
31
Patent #:
Issue Dt:
04/25/2017
Application #:
15188166
Filing Dt:
06/21/2016
Publication #:
Pub Dt:
01/12/2017
Title:
Semiconductor Memory Sensing Architecture
Assignor
1
Exec Dt:
08/30/2016
Assignee
1
3555 ALAMEDA DE LAS PULGAS, SUITE 208
MENLO PARK, CALIFORNIA 94025
Correspondence name and address
BUNNIE POULLARD
9720 WILSHIRE BLVD
5TH FLOOR
BEVERLY HILLS, CA 90212

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