Total properties:
62
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12/11/2007
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Application #:
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11195910
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Filing Dt:
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08/02/2005
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Publication #:
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Pub Dt:
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02/08/2007
| | | | |
Title:
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PROGRAMMABLE STRENGTH OUTPUT BUFFER FOR RDIMM ADDRESS REGISTER
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Patent #:
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NONE
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Issue Dt:
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Application #:
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12132488
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Filing Dt:
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06/03/2008
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Publication #:
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Pub Dt:
|
12/03/2009
| | | | |
Title:
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Method and Apparatus for Testing Write-Only Registers
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Patent #:
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Issue Dt:
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11/25/2014
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Application #:
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12267355
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Filing Dt:
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11/07/2008
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Publication #:
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Pub Dt:
|
05/07/2009
| | | | |
Title:
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Redriven/Retimed Registered Dual Inline Memory Module
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Patent #:
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Issue Dt:
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07/31/2012
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Application #:
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12505344
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Filing Dt:
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07/17/2009
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Publication #:
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Pub Dt:
|
01/28/2010
| | | | |
Title:
|
HIGH SPEED MEMORY MODULE
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Patent #:
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Issue Dt:
|
09/25/2012
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Application #:
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12563308
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Filing Dt:
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09/21/2009
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Title:
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LOAD REDUCTION SYSTEM AND METHOD FOR DIMM-BASED MEMORY SYSTEMS
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Patent #:
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Issue Dt:
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11/20/2012
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Application #:
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12611834
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Filing Dt:
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11/03/2009
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Publication #:
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Pub Dt:
|
05/05/2011
| | | | |
Title:
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HIGH THROUGHPUT FLASH MEMORY SYSTEM
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Patent #:
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Issue Dt:
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04/08/2014
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Application #:
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13359877
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Filing Dt:
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01/27/2012
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Publication #:
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Pub Dt:
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10/11/2012
| | | | |
Title:
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MEMORY BUFFER WITH ONE OR MORE AUXILIARY INTERFACES
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Patent #:
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Issue Dt:
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04/08/2014
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Application #:
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13445143
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Filing Dt:
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04/12/2012
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Publication #:
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Pub Dt:
|
10/18/2012
| | | | |
Title:
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SYSTEMS AND METHODS FOR ERROR DETECTION AND CORRECTION IN A MEMORY MODULE WHICH INCLUDES A MEMORY BUFFER
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Patent #:
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Issue Dt:
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04/29/2014
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Application #:
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13460307
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Filing Dt:
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04/30/2012
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Publication #:
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Pub Dt:
|
11/15/2012
| | | | |
Title:
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DRAM REFRESH METHOD AND SYSTEM
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Patent #:
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Issue Dt:
|
11/24/2015
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Application #:
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13530647
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Filing Dt:
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06/22/2012
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Publication #:
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Pub Dt:
|
12/27/2012
| | | | |
Title:
|
EXTENDED-HEIGHT DIMM
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Patent #:
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Issue Dt:
|
04/01/2014
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Application #:
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13558332
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Filing Dt:
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07/25/2012
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Publication #:
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Pub Dt:
|
01/31/2013
| | | | |
Title:
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POWER MANAGEMENT IN SEMICONDUCTOR MEMORY SYSTEM
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Patent #:
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Issue Dt:
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10/13/2015
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Application #:
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13587887
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Filing Dt:
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08/16/2012
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Publication #:
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Pub Dt:
|
06/20/2013
| | | | |
Title:
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SELF TERMINATED DYNAMIC RANDOM ACCESS MEMORY
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Patent #:
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Issue Dt:
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11/04/2014
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Application #:
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13619692
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Filing Dt:
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09/14/2012
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Publication #:
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Pub Dt:
|
03/21/2013
| | | | |
Title:
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Methods and Apparatus for Transferring Data Between Memory Modules
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Patent #:
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NONE
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Issue Dt:
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Application #:
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13620288
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Filing Dt:
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09/14/2012
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Publication #:
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|
Pub Dt:
|
04/10/2014
| | | | |
Title:
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REPLACEMENT OF A FAULTY MEMORY CELL WITH A SPARE CELL FOR A MEMORY CIRCUIT
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Patent #:
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Issue Dt:
|
06/09/2015
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Application #:
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13653373
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Filing Dt:
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10/16/2012
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Publication #:
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Pub Dt:
|
05/23/2013
| | | | |
Title:
|
HIGH THROUGHPUT FLASH MEMORY SYSTEM
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Patent #:
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Issue Dt:
|
02/03/2015
|
Application #:
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13768986
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Filing Dt:
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02/15/2013
|
Title:
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HYBRID MEMORY BLADE
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Patent #:
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Issue Dt:
|
11/11/2014
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Application #:
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13778531
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Filing Dt:
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02/27/2013
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Title:
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COMPRESSION OF CONTENT ENTRIES IN STORAGE FOR REPLACING FAULTY MEMORY CELLS
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Patent #:
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Issue Dt:
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03/03/2015
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Application #:
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13782348
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Filing Dt:
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03/01/2013
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Publication #:
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|
Pub Dt:
|
07/11/2013
| | | | |
Title:
|
REPLACEMENT OF A FAULTY MEMORY CELL WITH A SPARE CELL FOR A MEMORY CIRCUIT
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Patent #:
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Issue Dt:
|
01/05/2016
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Application #:
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13783155
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Filing Dt:
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03/01/2013
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Title:
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DISTRIBUTED HARDWARE TREE SEARCH METHODS AND APPARATUS FOR MEMORY DATA REPLACEMENT
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Patent #:
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Issue Dt:
|
01/19/2016
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Application #:
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13786325
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Filing Dt:
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03/05/2013
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Title:
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MEMORY TEST SEQUENCER
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Patent #:
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Issue Dt:
|
06/30/2015
|
Application #:
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13787282
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Filing Dt:
|
03/06/2013
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Title:
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MEMORY PARAMETRIC IMPROVEMENTS
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Patent #:
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Issue Dt:
|
01/05/2016
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Application #:
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13787350
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Filing Dt:
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03/06/2013
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Title:
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MEMORY PARAMETRIC IMPROVEMENTS
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Patent #:
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Issue Dt:
|
10/27/2015
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Application #:
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13791124
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Filing Dt:
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03/08/2013
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Publication #:
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Pub Dt:
|
10/03/2013
| | | | |
Title:
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MEMORY BUFFER WITH DATA SCRAMBLING AND ERROR CORRECTION
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Patent #:
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Issue Dt:
|
11/24/2015
|
Application #:
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13791161
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Filing Dt:
|
03/08/2013
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Title:
|
CONTENT MATCHING USING A MULTI-HASH FUNCTION FOR REPLACEMENT OF A FAULTY MEMORY CELL
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Patent #:
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Issue Dt:
|
08/04/2015
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Application #:
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13791792
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Filing Dt:
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03/08/2013
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Title:
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SINGLE CHIP MIXED MEMORY FOR DYNAMIC REPLACEMENT OF DRAM BAD CELL
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Patent #:
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Issue Dt:
|
12/02/2014
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Application #:
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13791807
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Filing Dt:
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03/08/2013
|
Publication #:
|
|
Pub Dt:
|
07/18/2013
| | | | |
Title:
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REPLACEMENT OF A FAULTY MEMORY CELL WITH A SPARE CELL FOR A MEMORY CIRCUIT
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Patent #:
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Issue Dt:
|
10/14/2014
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Application #:
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13791814
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Filing Dt:
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03/08/2013
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Title:
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METHOD OF USING NON-VOLATILE MEMORIES FOR ON-DIMM MEMORY ADDRESS LIST STORAGE
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Patent #:
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Issue Dt:
|
03/31/2015
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Application #:
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13797583
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Filing Dt:
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03/12/2013
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Title:
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VERTICAL ERROR CORRECTION CODE FOR DRAM MEMORY
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Patent #:
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Issue Dt:
|
02/24/2015
|
Application #:
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13797623
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Filing Dt:
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03/12/2013
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Title:
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PROTOCOL CHECKING LOGIC CIRCUIT FOR MEMORY SYSTEM RELIABILITY
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Patent #:
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Issue Dt:
|
07/18/2017
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Application #:
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13797700
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Filing Dt:
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03/12/2013
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Title:
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SYSTEM AND METHOD FOR MEMORY ACCESS IN SERVER COMMUNICATIONS
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Patent #:
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Issue Dt:
|
10/07/2014
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Application #:
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13797814
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Filing Dt:
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03/12/2013
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Title:
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SYSTEM AND METHOD FOR MEMORY ACCESS IN SERVER COMMUNICATIONS
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Patent #:
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Issue Dt:
|
03/24/2015
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Application #:
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13909489
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Filing Dt:
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06/04/2013
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Title:
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EYE SCAN FOR ASYMMETRIC SHAPED COMMUNICATION SIGNAL
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Patent #:
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Issue Dt:
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05/24/2016
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14175857
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Filing Dt:
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02/07/2014
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Publication #:
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Pub Dt:
|
09/18/2014
| | | | |
Title:
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HIDDEN REFRESH OF WEAK MEMORY STORAGE CELLS IN SEMICONDUCTOR MEMORY
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Patent #:
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Issue Dt:
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11/04/2014
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Application #:
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14178241
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Filing Dt:
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02/11/2014
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Publication #:
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Pub Dt:
|
06/12/2014
| | | | |
Title:
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POWER MANAGEMENT IN SEMICONDUCTOR MEMORY SYSTEM
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Patent #:
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Issue Dt:
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02/14/2017
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Application #:
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14181422
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Filing Dt:
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02/14/2014
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Title:
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ALTERNATE ACCESS TO DRAM DATA USING CYCLE STEALING
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Patent #:
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Issue Dt:
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05/24/2016
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14194416
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Filing Dt:
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02/28/2014
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Title:
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MEMORY CENTRIC COMPUTING
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Patent #:
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Issue Dt:
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02/02/2016
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Application #:
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14194574
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Filing Dt:
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02/28/2014
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Title:
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ISOLATED SHARED MEMORY ARCHITECTURE (iSMA)
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Patent #:
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03/24/2015
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14228673
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03/28/2014
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Publication #:
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Pub Dt:
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07/31/2014
| | | | |
Title:
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MEMORY BUFFER WITH ONE OR MORE AUXILIARY INTERFACES
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Patent #:
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Issue Dt:
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04/21/2015
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14228847
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03/28/2014
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Publication #:
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Pub Dt:
|
07/31/2014
| | | | |
Title:
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SYSTEMS AND METHODS FOR ERROR DETECTION AND CORRECTION IN A MEMORY MODULE WHICH INCLUDES A MEMORY BUFFER
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Patent #:
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Issue Dt:
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09/22/2015
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Application #:
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14242292
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Filing Dt:
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04/01/2014
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Publication #:
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Pub Dt:
|
07/31/2014
| | | | |
Title:
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DRAM REFRESH METHOD AND SYSTEM
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Patent #:
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Issue Dt:
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09/01/2015
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Application #:
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14245991
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04/04/2014
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Title:
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BACKWARD COMPATIBLE DYNAMIC RANDOM ACCESS MEMORY DEVICE AND METHOD OF TESTING THEREFOR
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Patent #:
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Issue Dt:
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05/24/2016
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14316707
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06/26/2014
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Title:
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MEMORY CONTROLLER SYSTEM WITH NON-VOLATILE BACKUP STORAGE
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Issue Dt:
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10/01/2019
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14444225
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Filing Dt:
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07/28/2014
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Title:
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MEMORY CONTROLLER SYSTEMS WITH NONVOLATILE MEMORY FOR STORING OPERATING PARAMETERS
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Patent #:
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01/19/2016
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14473872
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08/29/2014
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01/15/2015
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Title:
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METHOD OF USING NON-VOLATILE MEMORIES FOR ON-DIMM MEMORY ADDRESS LIST STORAGE
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Patent #:
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04/07/2015
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Application #:
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14527644
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Filing Dt:
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10/29/2014
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Publication #:
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Pub Dt:
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02/19/2015
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Title:
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REPLACEMENT OF A FAULTY MEMORY CELL WITH A SPARE CELL FOR A MEMORY CIRCUIT
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Patent #:
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Issue Dt:
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01/22/2019
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14536312
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Filing Dt:
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11/07/2014
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Title:
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NEAR-MEMORY COMPUTE MODULE
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04/19/2016
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14593257
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01/09/2015
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Publication #:
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Pub Dt:
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04/30/2015
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Title:
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PROTOCOL CHECKING LOGIC CIRCUIT FOR MEMORY SYSTEM RELIABILITY
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Patent #:
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04/26/2016
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Application #:
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14665968
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Filing Dt:
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03/23/2015
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Publication #:
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Pub Dt:
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09/17/2015
| | | | |
Title:
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MEMORY BUFFER WITH ONE OR MORE AUXILIARY INTERFACES
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Patent #:
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Issue Dt:
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12/12/2017
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Application #:
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14706886
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Filing Dt:
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05/07/2015
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Title:
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METHOD AND SYSTEM USING MEMORY CHANNEL LOAD SHARING
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Patent #:
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Issue Dt:
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02/14/2017
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Application #:
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14798340
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Filing Dt:
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07/13/2015
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Title:
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DYNAMIC UPDATE TECHNIQUE FOR PHASE INTERPOLATOR DEVICE AND METHOD THEREFOR
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Patent #:
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Issue Dt:
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02/07/2017
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Application #:
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14861079
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Filing Dt:
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09/22/2015
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Title:
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METHOD AND CIRCUIT FOR DELAY ADJUSTMENT MONOTONICITY IN A DELAY LINE
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Patent #:
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Issue Dt:
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07/24/2018
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Application #:
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14883155
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Filing Dt:
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10/14/2015
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Title:
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HIGH-THROUGHPUT LOW-LATENCY HYBRID MEMORY MODULE
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Patent #:
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Issue Dt:
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03/26/2019
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Application #:
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14884496
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Filing Dt:
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10/15/2015
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Title:
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HYBRID MEMORY MODULE WITH IMPROVED INTER-MEMORY DATA TRANSMISSION PATH
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02/05/2019
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14885031
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Filing Dt:
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10/16/2015
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Title:
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BUFFERING DEVICE WITH STATUS COMMUNICATION METHOD FOR MEMORY CONTROLLER
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Patent #:
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05/15/2018
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14923345
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Filing Dt:
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10/26/2015
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Publication #:
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Pub Dt:
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07/28/2016
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Title:
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MEMORY BUFFER WITH DATA SCRAMBLING AND ERROR CORRECTION
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Patent #:
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08/29/2017
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14951377
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Filing Dt:
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11/24/2015
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Pub Dt:
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05/12/2016
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Title:
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EXTENDED-HEIGHT DIMM
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Patent #:
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Issue Dt:
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10/10/2017
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Application #:
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14963098
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Filing Dt:
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12/08/2015
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Title:
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PERSISTENT MEMORY DESCRIPTOR
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Patent #:
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NONE
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14975273
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Filing Dt:
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12/18/2015
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Publication #:
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Pub Dt:
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04/21/2016
| | | | |
Title:
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ISOLATED SHARED MEMORY ARCHITECTURE (iSMA)
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Patent #:
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01/03/2017
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14989323
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01/06/2016
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Title:
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PHASE INTERPOLATOR DEVICE USING DYNAMIC STOP AND PHASE CODE UPDATE AND METHOD THEREFOR
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02/21/2017
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15137467
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04/25/2016
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08/18/2016
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Title:
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MEMORY CONTROLLER SYSTEM WITH NON-VOLATILE BACKUP STORAGE
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03/06/2018
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15137802
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04/25/2016
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Publication #:
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08/18/2016
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Title:
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MEMORY BUFFER WITH ONE OR MORE AUXILIARY INTERFACES
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04/17/2018
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15156691
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05/17/2016
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Publication #:
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Pub Dt:
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04/20/2017
| | | | |
Title:
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HIGH-THROUGHPUT LOW-LATENCY HYBRID MEMORY MODULE
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