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Patent Assignment Details
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Reel/Frame:040308/0686   Pages: 5
Recorded: 11/14/2016
Attorney Dkt #:APT2002-0595CON_DIVS
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 3
1
Patent #:
Issue Dt:
04/29/2008
Application #:
11405621
Filing Dt:
04/18/2006
Publication #:
Pub Dt:
08/24/2006
Title:
CMOS APS WITH STACKED AVALANCHE MULTIPLICATION LAYER AND LOW VOLTAGE READOUT ELECTRONICS
2
Patent #:
Issue Dt:
04/28/2009
Application #:
12078643
Filing Dt:
04/02/2008
Publication #:
Pub Dt:
09/18/2008
Title:
CMOS APS WITH STACKED AVALANCHE MULTIPLICATION LAYER AND LOW VOLTAGE READOUT ELECTRONICS
3
Patent #:
Issue Dt:
02/01/2011
Application #:
12411122
Filing Dt:
03/25/2009
Publication #:
Pub Dt:
08/13/2009
Title:
CMOS APS WITH STACKED AVALANCHE MULTIPLICATION LAYER AND LOW VOLTAGE READOUT ELECTRONICS
Assignors
1
Exec Dt:
08/22/2002
2
Exec Dt:
08/22/2002
Assignee
1
8000 SOUTH FEDERAL WAY
BOISE, IDAHO 83706
Correspondence name and address
SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
5005 E. MCDOWELL ROAD
MAILDROP A700
PHOENIX, AZ 85008

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