Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
|
| Reel/Frame: | 040366/0012 | |
| Pages: | 7 |
| | Recorded: | 08/29/2016 | | |
| Attorney Dkt #: | KILOG000 |
| Conveyance: | CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE NAME PREVIOUSLY RECORDED AT REEL: 017650 FRAME: 0015. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. |
|
|
Total properties:
1
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/11/2007
|
Application #:
|
11368576
|
Filing Dt:
|
03/06/2006
|
|
Publication #:
|
|
Pub Dt:
|
09/06/2007
| | | | |
|
Title:
|
MEMORY TRANSISTOR GATE OXIDE STRESS RELEASE AND IMPROVED RELIABILITY
|
|
|
Assignee
|
|
|
|
|
| 2895 ZANKER ROAD |
| SAN JOSE, CALIFORNIA 95134 |
|
|
Correspondence name and address
|
| |
AKA CHAN LLP / GARY T. AKA
|
| |
900 LAFAYETTE STREET
|
| |
SUITE 710
|
| |
SANTA CLARA, CA 95050
|
Search Results as of:
05/21/2024 09:44 AM
If you have any comments or questions concerning the data displayed,
contact
PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified:
August 25, 2017 v.2.6
|
