Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
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| Reel/Frame: | 040769/0853 | |
| Pages: | 33 |
| | Recorded: | 11/30/2016 | | |
| Attorney Dkt #: | TERAMIKROS TO TERA PROBE |
| Conveyance: | MERGER (SEE DOCUMENT FOR DETAILS). |
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Total properties:
6
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Patent #:
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Issue Dt:
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02/27/2007
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Application #:
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10916917
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Filing Dt:
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08/12/2004
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Publication #:
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Pub Dt:
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03/10/2005
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
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Patent #:
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Issue Dt:
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05/09/2006
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Application #:
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10940232
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Filing Dt:
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09/13/2004
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Publication #:
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Pub Dt:
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03/24/2005
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Title:
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SEMICONDUCTOR DEVICE HAVING HEAT DISSIPATION LAYER
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Patent #:
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Issue Dt:
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11/04/2008
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Application #:
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11610327
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Filing Dt:
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12/13/2006
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Publication #:
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Pub Dt:
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05/03/2007
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
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Patent #:
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Issue Dt:
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01/11/2011
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Application #:
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11782587
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Filing Dt:
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07/24/2007
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Publication #:
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Pub Dt:
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01/17/2008
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Title:
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METHOD OF FABRICATING A SEMICONDUCTOR DEVICE INCLUDING FORMING AN INSULATING LAYER WITH A HARD SHEET BURIED THEREIN
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Patent #:
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Issue Dt:
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10/27/2009
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Application #:
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11880162
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Filing Dt:
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07/20/2007
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Publication #:
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Pub Dt:
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11/15/2007
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Title:
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METHOD OF FABRICATING A SEMICONDUCTOR DEVICE INCORPORATING A SEMICONDUCTOR CONSTRUCTING BODY AND AN INTERCONNECTING LAYER WHICH IS CONNECTED TO A GROUND LAYER VIA A VERTICAL CONDUCTING PORTION
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Patent #:
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Issue Dt:
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11/10/2009
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Application #:
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12047228
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Filing Dt:
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03/12/2008
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Publication #:
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Pub Dt:
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07/10/2008
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Title:
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SEMICONDUCTOR PACKAGE INCLUDING CONNECTED UPPER AND LOWER INTERCONNECTIONS, AND MANUFACTURING METHOD THEREOF
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Assignee
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| 2-7-17, SHIN-YOKOHAMA |
| KOHOKU-KU |
| YOKOHAMA, KANAGAWA, JAPAN 222-0033 |
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Correspondence name and address
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HOLTZ, HOLTZ & VOLEK PC
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630 NINTH AVENUE
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SUITE 1010
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NEW YORK, NY 10036
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