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Patent #:
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|
Issue Dt:
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07/06/1999
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Application #:
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08700076
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Filing Dt:
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08/20/1996
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Title:
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COMPLETELY ENCAPSULATED TOP ELECTRODE OF A FERROELECTRIC CAPACITOR
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Patent #:
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Issue Dt:
|
06/09/1998
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Application #:
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08700249
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Filing Dt:
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08/20/1996
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Title:
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LATCHING INPUTS AND ENABLING OUTPUTS ON BIDIRECTIONAL PINS WITH A PHASE LOCKED LOOP (PLL) LOCK DETECT CIRCUIT
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Patent #:
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Issue Dt:
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10/07/1997
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Application #:
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08701288
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Filing Dt:
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08/22/1996
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Title:
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ERASE METHOD FOR PAGE MODE MULTIPLE BITS-PER-CELL FLASH EEPROM
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Patent #:
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Issue Dt:
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12/22/1998
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Application #:
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08702363
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Filing Dt:
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08/23/1996
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Title:
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BANDGAP REFERENCE BASED POWER-ON DETECT CIRCUIT INCLUDING A SUPRESSION CIRCUIT
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Patent #:
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Issue Dt:
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08/17/1999
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Application #:
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08708428
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Filing Dt:
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09/05/1996
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Title:
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AN IMPROVED ULTRATHIN OXYNITRIDE STRUCTURE AND PROCESS FOR VLSI APPLICTIONS
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Patent #:
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Issue Dt:
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01/08/2002
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Application #:
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08711419
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Filing Dt:
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08/30/1996
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Title:
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MICROCONTROLLER DEVELOPMENT SYSTEM AND APPLICATIONS THEREOF FOR DEVELOPMENT OF A UNIVERSAL SERIAL BUS MICROCONTROLLER
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Patent #:
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Issue Dt:
|
02/08/2000
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Application #:
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08712372
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Filing Dt:
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09/11/1996
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Title:
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TESTING METHOD FOR DEVICES WITH STATUS FLAGS
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Patent #:
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|
Issue Dt:
|
07/07/1998
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Application #:
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08720116
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Filing Dt:
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09/27/1996
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Title:
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CIRCUIT AND METHOD FOR INSTRUCTION CONTROLLABLE BIT LINE SLEW RATE
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Patent #:
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Issue Dt:
|
10/06/1998
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Application #:
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08723367
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Filing Dt:
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09/30/1996
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Title:
|
SEMICONDUCTOR MEMORY DEVICE
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Patent #:
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|
Issue Dt:
|
08/11/1998
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Application #:
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08723558
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Filing Dt:
|
09/30/1996
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Title:
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SYSTEM FOR PROVIDING TIGHT PROGRAM/ERASE SPEEDS THAT ARE INSENSITIVE TO PROCESS VARIATIONS
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Patent #:
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|
Issue Dt:
|
02/02/1999
|
Application #:
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08728740
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Filing Dt:
|
10/11/1996
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Title:
|
PARTIALLY OR COMPLETELY ENCAPSULATED TOP ELECTRODE OF A FERROELECTRIC CAPACITOR
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Patent #:
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|
Issue Dt:
|
12/21/1999
|
Application #:
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08730824
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Filing Dt:
|
10/17/1996
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|
Title:
|
METHOD AND ARCHITECTURE FOR NON-SEQUENTIALLY PROGRAMMING ONE-TIME PROGRAMMABLE MEMORY TECHNOLOGY WITHOUT INITIALLY ERASING THE MEMORY
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Patent #:
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|
Issue Dt:
|
12/05/2000
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Application #:
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08740290
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Filing Dt:
|
10/25/1996
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Title:
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METHOD OF FORMING A METAL LAYER ON A SUBSTRATE, INCLUDING FORMATION OF WETTING LAYER AT A HIGH TEMPERATURE
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Patent #:
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Issue Dt:
|
08/11/1998
|
Application #:
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08742449
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Filing Dt:
|
11/01/1996
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Title:
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CIRCUIT AND METHOD FOR DISABLING A BITLINE LOAD
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Patent #:
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Issue Dt:
|
01/18/2000
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Application #:
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08744248
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Filing Dt:
|
11/05/1996
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Title:
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THIN LINER LAYER PROVIDING REDUCED VIA RESISTANCE
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Patent #:
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Issue Dt:
|
05/05/1998
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Application #:
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08744962
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Filing Dt:
|
11/07/1996
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Title:
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DEVICE INCLUDING MEANS FOR PREVENTING TUNGSTEN SILICIDE LIFTING, AND METHOD OF FABRICATION THEREOF
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Patent #:
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Issue Dt:
|
06/09/1998
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Application #:
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08745278
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Filing Dt:
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11/08/1996
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Title:
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BLOCK SELECT TRANSISTOR AND METHOD OF FABRICATION
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Patent #:
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|
Issue Dt:
|
11/03/1998
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Application #:
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08745596
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Filing Dt:
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11/08/1996
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Title:
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METHOD OF PROGRAMMING A MEMORY CELL TO CONTAIN MULTIPLE VALUES
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Patent #:
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Issue Dt:
|
04/07/1998
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Application #:
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08746320
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Filing Dt:
|
11/12/1996
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Title:
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SENSE AMPLIFIER DESIGN
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Patent #:
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Issue Dt:
|
01/05/1999
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Application #:
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08746645
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Filing Dt:
|
11/13/1996
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Title:
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INTERFACE DEVICE FOR XT/AT SYSTEM DEVICES ON HIGH SPEED LOCAL BUS
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Patent #:
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Issue Dt:
|
05/05/1998
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Application #:
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08754177
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Filing Dt:
|
11/21/1996
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Title:
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IMPROVED SENSE AMPLIFIER DESIGN WITH DYNAMIC RECOVERY
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Patent #:
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|
Issue Dt:
|
11/02/1999
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Application #:
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08754521
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Filing Dt:
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11/21/1996
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Title:
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EDGE METAL FOR INTERCONNECT LAYERS
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Patent #:
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Issue Dt:
|
05/12/1998
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Application #:
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08756634
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Filing Dt:
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11/26/1996
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Title:
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DATA TRANSITION DETECT WRITE CONTROL
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Patent #:
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Issue Dt:
|
06/30/1998
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Application #:
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08757987
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Filing Dt:
|
11/27/1996
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Title:
|
ELECTRICALLY ERASABLE REFERENCE CELL FOR ACCURATELY DETERMINING THRESHOLD VOLTAGE OF A NON-VOLATILE MEMORY AT A PLURALITY OF THRESHOLD VOLTAGE LEVELS
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Patent #:
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Issue Dt:
|
02/10/1998
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Application #:
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08757988
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Filing Dt:
|
11/27/1996
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Title:
|
APPARATUS AND METHOD FOR MULTIPLE-LEVEL STORAGE IN NON-VOLATILE MEMORIES
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Patent #:
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Issue Dt:
|
01/19/1999
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Application #:
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08758223
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Filing Dt:
|
11/27/1996
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Title:
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NOVEL METHOD OF FORMING ROBUST INTERCONNECT AND CONTACT STRUCTURES IN A SEMICONDUCTOR AND/OR INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
|
09/01/1998
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Application #:
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08762871
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Filing Dt:
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12/12/1996
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Title:
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CHARGE PUMP WITH REDUCED POWER CONSUMPTION
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Patent #:
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Issue Dt:
|
10/13/1998
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Application #:
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08764027
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Filing Dt:
|
12/11/1996
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Title:
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LOW VOLTAGE LEVEL SHIFTING CIRCUIT AND LOW VOLTAGE SENSE AMPLIFIER
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Patent #:
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Issue Dt:
|
06/30/1998
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Application #:
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08764329
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Filing Dt:
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12/12/1996
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Title:
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SENSED WORDLINE DRIVER
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Patent #:
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Issue Dt:
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05/05/1998
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Application #:
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08766389
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Filing Dt:
|
12/12/1996
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Title:
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VOLTAGE CONTROLLED OSCILLATOR (VCO) FREQUENCY GAIN COMPENSATION CIRCUIT
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Patent #:
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|
Issue Dt:
|
06/09/1998
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Application #:
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08766608
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Filing Dt:
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12/13/1996
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Title:
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METHOD OF FORMING DIELECTRIC FILM
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Patent #:
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Issue Dt:
|
01/12/1999
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Application #:
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08768407
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Filing Dt:
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12/18/1996
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Title:
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HIGH SPEED FIFO MARK AND RETRANSMIT SCHEME USING LATCHES AND PRECHARGE
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Patent #:
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Issue Dt:
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04/27/1999
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Application #:
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08768885
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Filing Dt:
|
12/17/1996
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Title:
|
METHOD OF FORMING A NON-VOLATILE MEMORY DEVICE WITH RAMPED TUNNEL DIELECTRIC LAYER
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Patent #:
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Issue Dt:
|
01/26/1999
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Application #:
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08769241
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Filing Dt:
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12/18/1996
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Title:
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DUAL LEVEL WORDLINE CLAMP FOR REDUCED MEMORY CELL CURRENT
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Patent #:
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Issue Dt:
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04/27/1999
|
Application #:
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08769766
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Filing Dt:
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12/19/1996
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Title:
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ALIGNMENT PROCESS COMPATIBLE WITH CHEMICAL MECHANICAL POLISHING
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Patent #:
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Issue Dt:
|
08/10/1999
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Application #:
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08774293
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Filing Dt:
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12/23/1996
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Title:
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TEST MODE LATCHING SCHEME
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Patent #:
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Issue Dt:
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09/07/1999
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Application #:
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08777304
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Filing Dt:
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12/27/1996
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Title:
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MINIMUM-LATENCY DATA MOVER WITH AUTO-SEGMENTATION AND REASSEMBLY
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Patent #:
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Issue Dt:
|
12/15/1998
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Application #:
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08780167
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Filing Dt:
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12/26/1996
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Title:
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INTERRUPTIBLE STATE MACHINE
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Patent #:
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Issue Dt:
|
05/04/1999
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Application #:
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08788524
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Filing Dt:
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01/24/1997
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Title:
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CIRCUIT AND METHOD FOR DESKEWING VARIABLE SUPPLY SIGNAL PATHS
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Patent #:
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Issue Dt:
|
08/18/1998
|
Application #:
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08799236
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Filing Dt:
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02/14/1997
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Title:
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METHOD FOR ANNEALING DAMAGED SEMICONDUCTOR REGIONS ALLOWING FOR ENHANCED OXIDE GROWTH
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Patent #:
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Issue Dt:
|
03/09/1999
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Application #:
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08799835
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Filing Dt:
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02/13/1997
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Title:
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ONE-PIN SHIFT REGISTER INTERFACE
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Patent #:
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Issue Dt:
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01/26/1999
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Application #:
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08800195
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Filing Dt:
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02/13/1997
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Title:
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SYNCHRONOUS CIRCUIT WITH IMPROVED CLOCK TO DATA OUTPUT ACCESS TIME
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Patent #:
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Issue Dt:
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12/22/1998
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Application #:
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08801305
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Filing Dt:
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02/18/1997
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Title:
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NON-VOLATILE STORAGE DEVICE REFRESH TIME DETECTOR
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Patent #:
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Issue Dt:
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03/21/2000
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Application #:
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08804025
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Filing Dt:
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02/19/1997
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Title:
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NOVEL CIRCUIT AND METHOD FOR CONTROLLING MEMORY DEPTH
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Patent #:
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Issue Dt:
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09/08/1998
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Application #:
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08810164
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Filing Dt:
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02/28/1997
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Title:
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CHANNEL HOT-CARRIER PAGE WRITE FOR NAND APPLICATIONS
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Patent #:
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Issue Dt:
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08/03/1999
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Application #:
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08813562
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Filing Dt:
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03/07/1997
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Title:
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METHOD OF SPACER FORMATION AND SOURCE PROTECTION AFTER SELF- ALIGNED SOURCE IS FORMED AND DEVICE PROVIDED BY SUCH A METHOD
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Patent #:
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Issue Dt:
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01/26/1999
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Application #:
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08816877
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Filing Dt:
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03/13/1997
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Title:
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METHOD AND APPARATUS FOR REDUCING CONTINUOUS WRITE CYCLE CURRENT IN MEMORY DEVICE
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Patent #:
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Issue Dt:
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10/19/1999
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Application #:
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08820893
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Filing Dt:
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03/19/1997
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Title:
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CONTROLLED ISOTROPIC ETCH PROCESS AND METHOD OF FORMING AN OPENING IN A DIELECTRIC LAYER
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Patent #:
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Issue Dt:
|
11/24/1998
|
Application #:
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08821617
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Filing Dt:
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03/20/1997
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Title:
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CIRCUIT AND METHOD FOR ADJUSTING DUTY CYCLES
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Patent #:
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Issue Dt:
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05/25/1999
|
Application #:
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08824369
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Filing Dt:
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03/25/1997
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Title:
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DYNAMIC VOLTAGE REFERENCE WITH COMPENSATES FOR PROCESS VARIATIONS
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Patent #:
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Issue Dt:
|
06/15/1999
|
Application #:
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08825359
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Filing Dt:
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03/28/1997
|
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Title:
|
SYNCHRONIZING CLOCK PULSE GENERATOR FOR LOGIC DERIVED CLOCK SIGNALS WITH SYNCHRONOUS CLOCK SUSPENSION CAPABILITY FOR A PROGRAMMABLE DEVICE
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Patent #:
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Issue Dt:
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07/27/1999
|
Application #:
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08825482
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Filing Dt:
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03/28/1997
|
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Title:
|
ASYNCHRONOUS PULSE DISCRIMINATING SYNCHRONIZING CLOCK PULSE GENERATOR FOR LOGIC DERIVED CLOCK SIGNALS FOR A PROGRAMMABLE DEVICE
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Patent #:
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|
Issue Dt:
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07/06/1999
|
Application #:
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08825484
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Filing Dt:
|
03/28/1997
|
|
Title:
|
PULSE DISCRIMINATING CLOCK SYNCHRONIZER FOR LOGIC DERIVED CLOCK SIGNALS FOR A PROGRAMMABLE DEVICE
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Patent #:
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|
Issue Dt:
|
06/29/1999
|
Application #:
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08825489
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Filing Dt:
|
03/28/1997
|
|
Title:
|
ASYNCHRONOUS PULSE DISCRIMINATING SYNCHRONIZING CLOCK PULSE GENERATOR WITH SYNCHRONOUS CLOCK SUSPENSION CAPABILITY FOR LOGIC DERIVED CLOCK SIGNALS FOR A PROGRAMMABLE DEVICE
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Patent #:
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|
Issue Dt:
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07/13/1999
|
Application #:
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08827271
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Filing Dt:
|
03/28/1997
|
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Title:
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FAST CLOCK GENERATOR AND CLOCK SYNCHRONIZER FOR LOGIC DERIVED CLOCK SIGNALS FOR A PROGRAMMABLE DEVICE
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Patent #:
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|
Issue Dt:
|
02/22/2000
|
Application #:
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08828157
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Filing Dt:
|
03/27/1997
|
|
Title:
|
PARTIALLY OR COMPLETELY ENCAPSULATED TOP ELECTRODE OF A FERROELECTRIC CAPACITOR
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|
Patent #:
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|
Issue Dt:
|
07/04/2000
|
Application #:
|
08828319
|
Filing Dt:
|
03/28/1997
|
|
Title:
|
PULSE DISCRIMINATING CLOCK SYNCHRONIZER FOR LOGIC DERIVED CLOCK SIGNALS WITH SYNCHRONOUS CLOCK SUSPENSION CAPABILITY FOR A PROGRAMMABLE DEVICE
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Patent #:
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|
Issue Dt:
|
06/15/1999
|
Application #:
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08828325
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Filing Dt:
|
03/28/1997
|
|
Title:
|
SYNCHRONIZING CLOCK PULSE GENERATOR FOR LOGIC DERIVED CLOCK SIGNALS FOR A PROGRAMMABLE DEVICE
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|
Patent #:
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|
Issue Dt:
|
07/13/1999
|
Application #:
|
08828434
|
Filing Dt:
|
03/28/1997
|
|
Title:
|
FAST CLOCK GENERATOR AND CLOCK SYNCHRONIZER FOR LOGIC DERIVED CLOCK SIGNALS WITH SYNCHRONOUS CLOCK SUSPENSION CAPABILITY FOR A PROGRAMMABLE DEVICE
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Patent #:
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|
Issue Dt:
|
02/16/1999
|
Application #:
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08828537
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Filing Dt:
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03/31/1997
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Title:
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LOW SPEED DRIVER FOR USE WITH THE UNIVERSAL SERIAL BUS
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Patent #:
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|
Issue Dt:
|
01/05/1999
|
Application #:
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08831571
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Filing Dt:
|
04/09/1997
|
|
Title:
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MEMORY CELL PROGRAMMING WITH CONTROLLED CURRENT INJECTION
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Patent #:
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|
Issue Dt:
|
10/27/1998
|
Application #:
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08834942
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Filing Dt:
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04/07/1997
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|
Title:
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MEMORY CELL SENSING METHOD AND CIRCUITRY FOR BIT LINE EQUALIZATION
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Patent #:
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|
Issue Dt:
|
03/30/1999
|
Application #:
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08837556
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Filing Dt:
|
04/21/1997
|
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Title:
|
MULTILAYER FLOATING GATE FIELD EFFECT TRANSISTOR STRUCTURE FOR USE IN INTEGRATED CIRCUIT DEVICES
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Patent #:
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Issue Dt:
|
06/29/1999
|
Application #:
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08837782
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Filing Dt:
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04/22/1997
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Title:
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OUTPUT VOLTAGE CONTROLLED IMPEDANCE OUTPUT BUFFER
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Patent #:
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|
Issue Dt:
|
06/06/2000
|
Application #:
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08839981
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Filing Dt:
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04/24/1997
|
|
Title:
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FAIL SAFE METHOD AND APPARATUS FOR A USB DEVICE
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Patent #:
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|
Issue Dt:
|
10/20/1998
|
Application #:
|
08845302
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Filing Dt:
|
04/25/1997
|
|
Title:
|
FAST TURN-ON SILICON CONTROLLED RECTIFIER (SCR) FOR ELECTROSTATIC DISCHARGE (ESD) PROTECTION
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Patent #:
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Issue Dt:
|
09/14/1999
|
Application #:
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08850511
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Filing Dt:
|
05/02/1997
|
|
Title:
|
ESD PROTECTION CIRCUIT FOR I/O BUFFERS
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Patent #:
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Issue Dt:
|
12/22/1998
|
Application #:
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08852695
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Filing Dt:
|
05/07/1997
|
|
Title:
|
FABRICATION SEQUENCE EMPLOYING AN OXIDE FORMED WITH MINIMIZED INDUCTED CHARGE AND/OR MAXIMIZED BREAKDOWN VOLTAGE
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Patent #:
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Issue Dt:
|
08/04/1998
|
Application #:
|
08853185
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Filing Dt:
|
05/09/1997
|
|
Title:
|
MULTIPLE BITS- PER- CELL FLASH EEPROM MEMORY CELLS WITH WIDE PROGRAM AND ERASE VT WINDOW
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|
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|
Patent #:
|
|
Issue Dt:
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05/11/1999
|
Application #:
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08853527
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Filing Dt:
|
05/09/1997
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|
Title:
|
DUAL-LEVEL METALIZATION METHOD FOR INTEGRATED CIRCUIT FERROELECTRIC DEVICES
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|
|
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Patent #:
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|
Issue Dt:
|
10/20/1998
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Application #:
|
08855040
|
Filing Dt:
|
05/13/1997
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|
Title:
|
METHOD AND APPARATUS FOR PREVENTING WRITE OPERATIONS IN A MEMORY DEVICE
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|
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Patent #:
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|
Issue Dt:
|
12/19/2000
|
Application #:
|
08857269
|
Filing Dt:
|
05/16/1997
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|
Title:
|
LEVEL CONVERTER AND SEMICONDUCTOR DEVICE
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|
|
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Patent #:
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|
Issue Dt:
|
08/18/1998
|
Application #:
|
08858589
|
Filing Dt:
|
05/19/1997
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|
Title:
|
MEMORY DEVICE USING A REDUCED WORD LINE VOLTAGE DURING READ OPERATIONS AND A METHOD OF ACCESSING SUCH A MEMORY DEVICE
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|
|
|
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Patent #:
|
|
Issue Dt:
|
08/29/2000
|
Application #:
|
08865667
|
Filing Dt:
|
05/30/1997
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|
Title:
|
CIRCUIT, STRUCTURE AND METHOD OF TESTING A SEMICONDUCTOR, SUCH AS AN INTEGRATED CIRCUIT
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|
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Patent #:
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|
Issue Dt:
|
07/13/1999
|
Application #:
|
08868062
|
Filing Dt:
|
06/03/1997
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|
Title:
|
SRAM WITH ROM FUNCTIONALITY
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|
|
|
|
Patent #:
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|
Issue Dt:
|
04/03/2001
|
Application #:
|
08868079
|
Filing Dt:
|
06/03/1997
|
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Title:
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MICROPROCESSOR CONTROLLED FREQUENCY LOCK LOOP FOR USE WITH AN EXTERNAL PERIODIC SIGNAL
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|
|
|
|
Patent #:
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|
Issue Dt:
|
11/09/1999
|
Application #:
|
08870045
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Filing Dt:
|
06/05/1997
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|
Title:
|
TUBE FOR FLASH MINIATURE CARD
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|
|
|
|
Patent #:
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|
Issue Dt:
|
08/03/1999
|
Application #:
|
08871428
|
Filing Dt:
|
06/09/1997
|
|
Title:
|
MONITORING CLEANING EFFECTIVENESS OF A CLEANING SYSTEM
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/08/1998
|
Application #:
|
08874006
|
Filing Dt:
|
06/12/1997
|
|
Title:
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SEMICONDUCTOR DEVICE SUCH AS A STATIC RANDOM ACCESS MEMORY (SRAM) HAVING A LOW POWER MODE USING A CLOCK DISABLE CIRCUIT
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/08/1999
|
Application #:
|
08877683
|
Filing Dt:
|
06/16/1997
|
|
Title:
|
CIRCUIT AND METHOD FOR DATA RECOVERY
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|
|
|
|
Patent #:
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|
Issue Dt:
|
09/07/1999
|
Application #:
|
08878119
|
Filing Dt:
|
06/18/1997
|
|
Title:
|
METHOD OF FABRICATING AN EPROM TYPE DEVICE WITH REDUCED PROCESS RESIDUES
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/29/2003
|
Application #:
|
08878728
|
Filing Dt:
|
06/19/1997
|
|
Title:
|
METHOD FOR CONTROLLING THE OXIDATION OF IMPLANTED SILICON
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/22/1998
|
Application #:
|
08878904
|
Filing Dt:
|
06/19/1997
|
|
Title:
|
A METHOD AND CIRCUIT FOR PREVENTING AND/OR INHIBITING CONTENTION IN A SYSTEM EMPLOYING A RANDOM ACCESS MEMORY
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/20/1999
|
Application #:
|
08879287
|
Filing Dt:
|
06/19/1997
|
|
Title:
|
PHASE DETECTOR WITH LINEAR OUTPUT RESPONSE
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|
|
|
|
Patent #:
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|
Issue Dt:
|
12/21/1999
|
Application #:
|
08881487
|
Filing Dt:
|
06/24/1997
|
|
Title:
|
METHOD AND SOFTWARE FOR OPTIMIZING AN INTERFACE BETWEEN COMPONENTS
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|
|
|
|
Patent #:
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|
Issue Dt:
|
05/11/1999
|
Application #:
|
08883971
|
Filing Dt:
|
06/27/1997
|
|
Title:
|
LOW DISTORTION LEVEL SHIFTER
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/09/1999
|
Application #:
|
08884561
|
Filing Dt:
|
06/27/1997
|
|
Title:
|
READ ONLY/ RANDOM ACCESS MEMORY ARCHITECTURE AND METHODS FOR OPERATING SAME
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/18/2000
|
Application #:
|
08884581
|
Filing Dt:
|
06/27/1997
|
|
Title:
|
REFERENCE VOLTAGE GENERATOR FOR READING A ROM CELL IN AN INTEGRATED RAM/ROM MEMORY DEVICE
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/07/2001
|
Application #:
|
08885140
|
Filing Dt:
|
06/30/1997
|
|
Title:
|
METHOD AND APPARATUS FOR CONTROLLING THE THICKNESS OF A GATE OXIDE IN A SEMICONDUCTOR MANUFACTURING PROCESS
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|
|
|
|
Patent #:
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|
Issue Dt:
|
11/16/1999
|
Application #:
|
08885156
|
Filing Dt:
|
06/30/1997
|
|
Title:
|
NON-VOLATILE STATIC RANDOM ACCESS MEMORY AND METHODS FOR USING SAME
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/04/2000
|
Application #:
|
08886923
|
Filing Dt:
|
07/02/1997
|
|
Title:
|
SYSTEM FOR RECONFIGURING A PERIPHERAL DEVICE WHERE CONFIGURATION INFORMATION IS DOWNLOADED FROM THE HOST AND A CIRCUIT SIMULATES DISCONNECTION AND RECONNECTION OF THE PERIPHERAL DEVICE
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/05/1999
|
Application #:
|
08891422
|
Filing Dt:
|
07/09/1997
|
|
Title:
|
METHOD OF MAKING A SEMICONDUCTOR DEVICE WITH ADJUSTABLE THRESHOLD VOLTAGE
|
|
|
|
|
Patent #:
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|
Issue Dt:
|
06/27/2000
|
Application #:
|
08896684
|
Filing Dt:
|
07/18/1997
|
|
Title:
|
MULTI-LAYER APPROACH FOR OPTIMIZING FERROELECTRIC FILM PERFORMANCE
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/29/1999
|
Application #:
|
08899565
|
Filing Dt:
|
07/24/1997
|
|
Title:
|
VOLTAGE BOOSTER CIRCUIT AND A VOLTAGE DROP CIRCUIT WITH CHANGEABLE OPERATING LEVELS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/06/1998
|
Application #:
|
08899762
|
Filing Dt:
|
07/24/1997
|
|
Title:
|
FRACTIONAL N- FREQUENCY SYNTHESIZER AND SPURIOUS SIGNAL CANCEL CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/10/2000
|
Application #:
|
08908861
|
Filing Dt:
|
08/08/1997
|
|
Title:
|
ADJUSTABLE VERIFY AND PROGRAM VOLTAGES IN PROGRAMMABLE DEVICES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/18/2000
|
Application #:
|
08911471
|
Filing Dt:
|
08/14/1997
|
|
Title:
|
INDENTIFICATION OF THE COMPOSITION OF PARTICLES IN A PROCESS CHAMBER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/01/1998
|
Application #:
|
08914543
|
Filing Dt:
|
08/19/1997
|
|
Title:
|
HIGH VOLTAGE NMOS PASS GATE HAVING SUPPLY RANGE, AREA, AND SPEED ADVANTAGES
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|
|
|
|
Patent #:
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|
Issue Dt:
|
04/24/2001
|
Application #:
|
08914960
|
Filing Dt:
|
08/20/1997
|
|
Title:
|
SYSTEM AND METHOD FOR INTERFACING AN INPUT/OUTPUT SYSTEM MEMORY TO A HOST COMPUTER SYSTEM
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|
|
|
|
Patent #:
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|
Issue Dt:
|
12/29/1998
|
Application #:
|
08915054
|
Filing Dt:
|
08/20/1997
|
|
Title:
|
VOLTAGE BOOST CIRCUIT AND OPERATION THEREOF AT LOW POWER SUPPLY VOLTAGES
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|
