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Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:041710/0001   Pages: 1017
Recorded: 02/03/2017
Attorney Dkt #:040981-0102
Conveyance: TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS
Total properties: 11687
Page 43 of 117
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117
1
Patent #:
7006586
Issue Dt:
02/28/2006
Application #:
09862261
Filing Dt:
05/21/2001
Publication #:
US20020097667
Pub Dt:
07/25/2002
Title:
CYCLIC BUFFER FOR INFRARED
2
Patent #:
6819224
Issue Dt:
11/16/2004
Application #:
09862531
Filing Dt:
05/22/2001
Publication #:
US20020071367
Pub Dt:
06/13/2002
Title:
APPARATUS AND METHOD FOR DETECTING A PREDETERMINED PATTERN OF BITS IN A BITSTREAM
3
Patent #:
6515443
Issue Dt:
02/04/2003
Application #:
09862776
Filing Dt:
05/21/2001
Publication #:
US20020171386
Pub Dt:
11/21/2002
Title:
PROGRAMMABLE PULSE WIDTH MODULATED WAVEFORM GENERATOR FOR A SPINDLE MOTOR CONTROLLER
4
Patent #:
6944814
Issue Dt:
09/13/2005
Application #:
09862922
Filing Dt:
05/22/2001
Publication #:
US20020176413
Pub Dt:
11/28/2002
Title:
METHOD AND APPARATUS FOR PERFORMING FRAME INTERROGATION
5
Patent #:
6610464
Issue Dt:
08/26/2003
Application #:
09863437
Filing Dt:
05/24/2001
Publication #:
US20020187433
Pub Dt:
12/12/2002
Title:
PROCESS FOR PATTERNING A MEMBRANE
6
Patent #:
7088792
Issue Dt:
08/08/2006
Application #:
09863736
Filing Dt:
05/22/2001
Publication #:
US20020057748
Pub Dt:
05/16/2002
Title:
DEVICE AND METHOD FOR EFFICIENT DECODING WITH TIME REVERSED DATA
7
Patent #:
6762982
Issue Dt:
07/13/2004
Application #:
09863744
Filing Dt:
05/23/2001
Publication #:
US20020093894
Pub Dt:
07/18/2002
Title:
APPARATUS AND METHOD OF INTERRUPT DETECTION IN AN OPTICAL DISC ENVIRONMENT
8
Patent #:
6472304
Issue Dt:
10/29/2002
Application #:
09864577
Filing Dt:
05/24/2001
Publication #:
US20010036716
Pub Dt:
11/01/2001
Title:
WIRE BONDING TO COPPER
9
Patent #:
6541819
Issue Dt:
04/01/2003
Application #:
09865124
Filing Dt:
05/24/2001
Publication #:
US20020175366
Pub Dt:
11/28/2002
Title:
SEMICONDUCTOR DEVICE HAVING NON-POWER ENHANCED AND POWER ENHANCED METAL OXIDE SEMICONDUCTOR DEVICES AND A METHOD OF MANUFACTURE THEREFOR
10
Patent #:
6774351
Issue Dt:
08/10/2004
Application #:
09865376
Filing Dt:
05/25/2001
Publication #:
US20020175274
Pub Dt:
11/28/2002
Title:
LOW-POWER SURFACE FOR AN OPTICAL SENSOR
11
Patent #:
6983388
Issue Dt:
01/03/2006
Application #:
09865847
Filing Dt:
05/25/2001
Publication #:
US20020049918
Pub Dt:
04/25/2002
Title:
METHOD AND APPARATUS FOR REDUCING LEAKAGE POWER IN A CACHE MEMORY BY USING A TIMER CONTROL SIGNAL THAT REMOVES POWER TO ASSOCIATED CACHE LINES
12
Patent #:
6506670
Issue Dt:
01/14/2003
Application #:
09865900
Filing Dt:
05/25/2001
Publication #:
US20020177280
Pub Dt:
11/28/2002
Title:
SELF ALIGNED GATE
13
Patent #:
6870928
Issue Dt:
03/22/2005
Application #:
09866525
Filing Dt:
05/25/2001
Title:
LINE INTERFACE, APPARATUS AND METHOD FOR COUPLING TRANSCEIVER AND TRANSMISSION LINE
14
Patent #:
6438730
Issue Dt:
08/20/2002
Application #:
09866661
Filing Dt:
05/30/2001
Title:
RTL CODE OPTIMIZATION FOR RESOURCE SHARING STRUCTURES
15
Patent #:
6781932
Issue Dt:
08/24/2004
Application #:
09867052
Filing Dt:
05/29/2001
Publication #:
US20020064106
Pub Dt:
05/30/2002
Title:
METHOD AND APPARATUS FOR REDUCING NOISE IN A TRACKING ERROR SIGNAL
16
Patent #:
6706609
Issue Dt:
03/16/2004
Application #:
09867202
Filing Dt:
05/29/2001
Publication #:
US20020004283
Pub Dt:
01/10/2002
Title:
METHOD OF FORMING AN ALIGNMENT FEATURE IN OR ON A MULTI-LAYERED SEMICONDUCTOR STRUCTURE
17
Patent #:
6851007
Issue Dt:
02/01/2005
Application #:
09870136
Filing Dt:
05/30/2001
Title:
MULTI-CHANNEL INTERFACE CONTROLLER FOR ENABLING A HOST TO INTERFACE WITH ONE OR MORE HOST DEVICES
18
Patent #:
6930516
Issue Dt:
08/16/2005
Application #:
09870436
Filing Dt:
05/30/2001
Publication #:
US20020180589
Pub Dt:
12/05/2002
Title:
COMPARATOR CIRCUITS HAVING NON-COMPLEMENTARY INPUT STRUCTURES
19
Patent #:
6559048
Issue Dt:
05/06/2003
Application #:
09870851
Filing Dt:
05/30/2001
Title:
SLOPED SIDEWALL VIA FOR INTEGRATED CIRCUIT STRUCTURE TO SUPPRESS VIA POISONING AND PROCESS FOR FORMING SAME
20
Patent #:
6476594
Issue Dt:
11/05/2002
Application #:
09870949
Filing Dt:
05/31/2001
Title:
METHOD AND APPARATUS FOR TESTING HIGH FREQUENCY DELAY LOCKED LOOPS
21
Patent #:
6463572
Issue Dt:
10/08/2002
Application #:
09871129
Filing Dt:
05/31/2001
Title:
IC TIMING ANALYSIS WITH KNOWN FALSE PATHS
22
Patent #:
6684301
Issue Dt:
01/27/2004
Application #:
09871177
Filing Dt:
05/31/2001
Title:
OUT OF ORDER EXECUTION MEMORY ACCESS REQUEST FIFO
23
Patent #:
6583026
Issue Dt:
06/24/2003
Application #:
09872058
Filing Dt:
05/31/2001
Title:
PROCESS FOR FORMING A LOW K CARBON-DOPED SILICON OXIDE DIELECTRIC MATERIAL ON AN INTEGRATED CIRCUIT STRUCTURE
24
Patent #:
7027451
Issue Dt:
04/11/2006
Application #:
09872246
Filing Dt:
05/31/2001
Title:
DYNAMIC BREAK LOOP FOR CLOSED LOOP UNMANAGED STACKING SWITCHES
25
Patent #:
6809848
Issue Dt:
10/26/2004
Application #:
09872306
Filing Dt:
06/01/2001
Publication #:
US20020181847
Pub Dt:
12/05/2002
Title:
MEMS DEVICE
26
Patent #:
6590292
Issue Dt:
07/08/2003
Application #:
09872327
Filing Dt:
06/01/2001
Title:
THERMAL AND MECHANICAL ATTACHMENT OF A HEATSPREADER TO A FLIP-CHIP INTEGRATED CIRCUIT STRUCTURE USING UNDERFILL
27
Patent #:
6990111
Issue Dt:
01/24/2006
Application #:
09872431
Filing Dt:
05/31/2001
Publication #:
US20020181402
Pub Dt:
12/05/2002
Title:
ADAPTIVE PATH DISCOVERY PROCESS FOR ROUTING DATA PACKETS IN A MULTINODE NETWORK
28
Patent #:
6816447
Issue Dt:
11/09/2004
Application #:
09872486
Filing Dt:
05/31/2001
Title:
CREATION OF SYNCHRONIZATION MARKS IN MULTILEVEL OPTICAL DATA STORAGE
29
Patent #:
7185243
Issue Dt:
02/27/2007
Application #:
09872582
Filing Dt:
06/04/2001
Title:
TESTING IMPLEMENTATION SUITABLE FOR BUILT-IN SELF-REPAIR (BISR) MEMORIES
30
Patent #:
6704900
Issue Dt:
03/09/2004
Application #:
09872661
Filing Dt:
06/01/2001
Title:
METHOD AND APPARATUS FOR PERFORMING EFFICIENT RESEEKS IN AN OPTICAL STORAGE DEVICE
31
Patent #:
6562700
Issue Dt:
05/13/2003
Application #:
09873043
Filing Dt:
05/31/2001
Title:
PROCESS FOR REMOVAL OF RESIST MASK OVER LOW K CARBON-DOPED SILICON OXIDE DIELECTRIC MATERIAL OF AN INTEGRATED CIRCUIT STRUCTURE, AND REMOVAL OF RESIDUES FROM VIA ETCH AND RESIST MASK REMOVAL
32
Patent #:
6465336
Issue Dt:
10/15/2002
Application #:
09873551
Filing Dt:
06/04/2001
Publication #:
US20010030361
Pub Dt:
10/18/2001
Title:
CIRCUIT AND METHOD FOR PROVIDING INTERCONNECTIONS AMONG INDIVIDUAL INTEGRATED CIRCUIT CHIPS IN A MULTI-CHIP MODULE
33
Patent #:
6690850
Issue Dt:
02/10/2004
Application #:
09874338
Filing Dt:
06/05/2001
Title:
ARTICLE COMPRISING A REFLECTION-TYPE SPECTRAL EQUALIZER/ OPTICAL SWITCH
34
Patent #:
6639724
Issue Dt:
10/28/2003
Application #:
09874838
Filing Dt:
06/05/2001
Publication #:
US20020181110
Pub Dt:
12/05/2002
Title:
DEVICE HAVING A BARRIER LAYER LOCATED THEREIN AND A METHOD OF MANUFACTURE THEREFOR
35
Patent #:
6502222
Issue Dt:
12/31/2002
Application #:
09875314
Filing Dt:
06/04/2001
Title:
METHOD OF CLOCK BUFFER PARTITIONING TO MINIMIZE CLOCK SKEW FOR AN INTEGRATED CIRCUIT DESIGN
36
Patent #:
6740222
Issue Dt:
05/25/2004
Application #:
09876522
Filing Dt:
06/07/2001
Publication #:
US20020185311
Pub Dt:
12/12/2002
Title:
PRINTED WIRING BOARD HAVING A DISCONTINUOUS PLATING LAYER AND METHOD OF MANUFACTURE THEREOF
37
Patent #:
6442737
Issue Dt:
08/27/2002
Application #:
09876736
Filing Dt:
06/06/2001
Title:
METHOD OF GENERATING AN OPTIMAL CLOCK BUFFER SET FOR MINIMIZING CLOCK SKEW IN BALANCED CLOCK TREES
38
Patent #:
6387284
Issue Dt:
05/14/2002
Application #:
09876749
Filing Dt:
06/06/2001
Publication #:
US20010041027
Pub Dt:
11/15/2001
Title:
ON-CHIP SINGLE LAYER HORIZONTAL DEFLECTING WAVEGUIDE AND DAMASCENE METHOD OF FABRICATING THE SAME
39
Patent #:
6504807
Issue Dt:
01/07/2003
Application #:
09876854
Filing Dt:
06/07/2001
Publication #:
US20010046197
Pub Dt:
11/29/2001
Title:
PROGRAMMABLE WRITE SIGNAL GENERATOR
40
Patent #:
6650494
Issue Dt:
11/18/2003
Application #:
09877332
Filing Dt:
06/08/2001
Publication #:
US20020186578
Pub Dt:
12/12/2002
Title:
MAGNETIC WRITE CIRCUIT WITH CHARGE PUMPING CAPACITORS
41
Patent #:
6665135
Issue Dt:
12/16/2003
Application #:
09877532
Filing Dt:
06/08/2001
Publication #:
US20020196573
Pub Dt:
12/26/2002
Title:
MAGNETIC WRITE CIRCUIT WITH PULSE MODE POWER SUPPLY
42
Patent #:
6970515
Issue Dt:
11/29/2005
Application #:
09878142
Filing Dt:
06/08/2001
Title:
LINE DRIVER FOR ASYMMETRIC DIGITAL SUBSCRIBER LINE SYSTEM
43
Patent #:
6792578
Issue Dt:
09/14/2004
Application #:
09878499
Filing Dt:
06/11/2001
Title:
HARD MACRO HAVING AN ANTENNA RULE VIOLATION FREE INPUT/OUTPUT PORTS
44
Patent #:
6744428
Issue Dt:
06/01/2004
Application #:
09878594
Filing Dt:
06/11/2001
Title:
BLOCK MOVE ENGINE WITH MACROBLOCK ADDRESSING MODES
45
Patent #:
7190751
Issue Dt:
03/13/2007
Application #:
09878604
Filing Dt:
06/11/2001
Title:
MULTI-STAGE FILTER CIRCUIT AND DIGITAL SIGNAL PROCESSING CIRCUIT EMPLOYING THE SAME
46
Patent #:
6482694
Issue Dt:
11/19/2002
Application #:
09878657
Filing Dt:
06/11/2001
Publication #:
US20010029068
Pub Dt:
10/11/2001
Title:
SEMICONDUCTOR DEVICE STRUCTURE INCLUDING A TANTALUM PENTOXIDE LAYER SANDWICHED BETWEEN SILICON NITRIDE LAYERS
47
Patent #:
6506673
Issue Dt:
01/14/2003
Application #:
09878690
Filing Dt:
06/11/2001
Publication #:
US20020185739
Pub Dt:
12/12/2002
Title:
METHOD OF FORMING A REVERSE GATE STRUCTURE WITH A SPIN ON GLASS PROCESS
48
Patent #:
6498045
Issue Dt:
12/24/2002
Application #:
09878741
Filing Dt:
06/11/2001
Title:
OPTICAL INTENSITY MODIFIER
49
Patent #:
6875702
Issue Dt:
04/05/2005
Application #:
09878820
Filing Dt:
06/11/2001
Publication #:
US20020187643
Pub Dt:
12/12/2002
Title:
PLASMA TREATMENT SYSTEM
50
Patent #:
6442738
Issue Dt:
08/27/2002
Application #:
09879297
Filing Dt:
06/12/2001
Title:
RTL BACK ANNOTATOR
51
Patent #:
6615397
Issue Dt:
09/02/2003
Application #:
09879380
Filing Dt:
06/12/2001
Title:
OPTIMAL CLOCK TIMING SCHEDULE FOR AN INTEGRATED CIRCUIT
52
Patent #:
7042971
Issue Dt:
05/09/2006
Application #:
09879416
Filing Dt:
06/12/2001
Title:
DELAY-LOCKED LOOP WITH BUILT-IN SELF-TEST OF PHASE MARGIN
53
Patent #:
6449751
Issue Dt:
09/10/2002
Application #:
09879417
Filing Dt:
06/12/2001
Title:
METHOD OF ANALYZING STATIC CURRENT TEST VECTORS WITH REDUCED FILE SIZES FOR SEMICONDUCTOR INTEGRATED CIRCUITS
54
Patent #:
6495312
Issue Dt:
12/17/2002
Application #:
09879642
Filing Dt:
06/12/2001
Title:
METHOD AND APPRATUS FOR REMOVING PHOTORESIST EDGE BEADS FROM THIN FILM SUBSTRATES
55
Patent #:
6934410
Issue Dt:
08/23/2005
Application #:
09879664
Filing Dt:
06/12/2001
Title:
MASK CORRECTION FOR PHOTOLITHOGRAPHIC PROCESSES
56
Patent #:
6765806
Issue Dt:
07/20/2004
Application #:
09879783
Filing Dt:
06/12/2001
Title:
COMPOSITION WITH EMC SHIELDING CHARACTERISTICS
57
Patent #:
6798301
Issue Dt:
09/28/2004
Application #:
09879824
Filing Dt:
06/11/2001
Title:
METHOD AND APPARATUS FOR CONTROLLING OSCILLATION AMPLITUDE AND OSCILLATION FREQUENCY OF CRYSTAL OSCILLATOR
58
Patent #:
6868535
Issue Dt:
03/15/2005
Application #:
09879841
Filing Dt:
06/12/2001
Title:
METHOD AND APPARATUS FOR OPTIMIZING THE TIMING OF INTEGRATED CIRCUITS
59
Patent #:
6467067
Issue Dt:
10/15/2002
Application #:
09879845
Filing Dt:
06/12/2001
Title:
EPSILON-DISCREPANT SELF-TEST TECHNIQUE
60
Patent #:
6611953
Issue Dt:
08/26/2003
Application #:
09879846
Filing Dt:
06/12/2001
Title:
MASK CORRECTION OPTIMIZATION
61
Patent #:
6735162
Issue Dt:
05/11/2004
Application #:
09880283
Filing Dt:
06/13/2001
Publication #:
US20020093904
Pub Dt:
07/18/2002
Title:
APPARATUS AND METHOD PROVIDING A MIRROR AVERAGING FUNCTION TO GENERATE A MIRROR SIGNAL FROM OPTICAL DATA ON AN OPTICAL DISC
62
Patent #:
7088979
Issue Dt:
08/08/2006
Application #:
09880291
Filing Dt:
06/13/2001
Title:
TRIPLE CONVERSION RF TUNER WITH SYNCHRONOUS LOCAL OSCILLATORS
63
Patent #:
6404700
Issue Dt:
06/11/2002
Application #:
09880491
Filing Dt:
06/13/2001
Title:
LOW POWER HIGH DENSITY ASYNCHRONOUS MEMORY ARCHITECTURE
64
Patent #:
6559717
Issue Dt:
05/06/2003
Application #:
09880492
Filing Dt:
06/13/2001
Title:
METHOD AND/OR ARCHITECTURE FOR IMPLEMENTING A VARIABLE GAIN AMPLIFIER CONTROL
65
Patent #:
6453451
Issue Dt:
09/17/2002
Application #:
09880607
Filing Dt:
06/12/2001
Title:
GENERATING STANDARD DELAY FORMAT FILES WITH CONDITIONAL PATH DELAY FOR DESIGNING INTEGRATED CIRCUITS
66
Patent #:
6928598
Issue Dt:
08/09/2005
Application #:
09880675
Filing Dt:
06/13/2001
Title:
SCAN METHOD FOR BUILT-IN-SELF-REPAIR (BISR)
67
Patent #:
6914786
Issue Dt:
07/05/2005
Application #:
09881151
Filing Dt:
06/14/2001
Title:
CONVERTER DEVICE
68
Patent #:
6411145
Issue Dt:
06/25/2002
Application #:
09881365
Filing Dt:
06/14/2001
Title:
FEEDBACK CONTROL OF CLOCK DUTY CYCLE
69
Patent #:
6615296
Issue Dt:
09/02/2003
Application #:
09881512
Filing Dt:
06/14/2001
Publication #:
US20010047439
Pub Dt:
11/29/2001
Title:
EFFICIENT IMPLEMENTATION OF FIRST-IN-FIRST-OUT MEMORIES FOR MULTI-PROCESSOR SYSTEMS
70
Patent #:
6501409
Issue Dt:
12/31/2002
Application #:
09881570
Filing Dt:
06/13/2001
Title:
SWITCHED-CAPACITOR DAC/CONTINOUS-TIME RECONSTRUCTION FILTER INTERFACE CIRCUIT
71
Patent #:
6993677
Issue Dt:
01/31/2006
Application #:
09881584
Filing Dt:
06/14/2001
Title:
SYSTEM AND METHOD FOR DATA VERIFICATION IN A RAID SYSTEM
72
Patent #:
6609238
Issue Dt:
08/19/2003
Application #:
09882114
Filing Dt:
06/15/2001
Title:
METHOD OF CONTROL CELL PLACEMENT TO MINIMIZE CONNECTION LENGTH AND CELL DELAY
73
Patent #:
6503828
Issue Dt:
01/07/2003
Application #:
09882124
Filing Dt:
06/14/2001
Title:
PROCESS FOR SELECTIVE POLISHING OF METAL-FILLED TRENCHES OF INTEGRATED CIRCUIT STRUCTURES
74
Patent #:
6566171
Issue Dt:
05/20/2003
Application #:
09882404
Filing Dt:
06/12/2001
Title:
FUSE CONSTRUCTION FOR INTEGRATED CIRCUIT STRUCTURE HAVING LOW DIELECTRIC CONSTANT DIELECTRIC MATERIAL
75
Patent #:
6498534
Issue Dt:
12/24/2002
Application #:
09882497
Filing Dt:
06/15/2001
Title:
AMPLIFIER CIRCUIT FOR LINE DRIVER
76
Patent #:
6724219
Issue Dt:
04/20/2004
Application #:
09882499
Filing Dt:
06/15/2001
Title:
AMPLIFIER AND LINE DRIVER FOR BROADBAND COMMUNICATIONS
77
Patent #:
6569744
Issue Dt:
05/27/2003
Application #:
09882623
Filing Dt:
06/15/2001
Publication #:
US20020192917
Pub Dt:
12/19/2002
Title:
METHOD OF CONVERTING A METAL OXIDE SEMICONDUCTOR TRANSISTOR INTO A BIPOLAR TRANSISTOR
78
Patent #:
6958518
Issue Dt:
10/25/2005
Application #:
09882624
Filing Dt:
06/15/2001
Publication #:
US20020190331
Pub Dt:
12/19/2002
Title:
SEMICONDUCTOR DEVICE HAVING AT LEAST ONE SOURCE/DRAIN REGION FORMED ON AN ISOLATION REGION AND A METHOD OF MANUFACTURE THEREFOR
79
Patent #:
6822459
Issue Dt:
11/23/2004
Application #:
09882786
Filing Dt:
06/15/2001
Title:
TESTING IMPLEMENTATION FOR SIGNAL CHARACTERIZATION
80
Patent #:
6581194
Issue Dt:
06/17/2003
Application #:
09882899
Filing Dt:
06/15/2001
Title:
METHOD FOR REDUCING SIMULATION OVERHEAD FOR EXTERNAL MODELS
81
Patent #:
6864547
Issue Dt:
03/08/2005
Application #:
09882911
Filing Dt:
06/15/2001
Publication #:
US20020190344
Pub Dt:
12/19/2002
Title:
SEMICONDUCTOR DEVICE HAVING A GHOST SOURCE/DRAIN REGION AND A METHOD OF MANUFACTURE THEREFOR
82
Patent #:
6602758
Issue Dt:
08/05/2003
Application #:
09882961
Filing Dt:
06/15/2001
Publication #:
US20020192956
Pub Dt:
12/19/2002
Title:
FORMATION OF SILICON ON INSULATOR (SOI) DEVICES AS ADD-ON MODULES FOR SYSTEM ON A CHIP PROCESSING
83
Patent #:
6829657
Issue Dt:
12/07/2004
Application #:
09883139
Filing Dt:
06/15/2001
Title:
METHOD TO SUPPORT GENERAL ENCLOSURE WIRING WHEN ASSOCIATING SES DATA WITH PHYSICAL DEVICE ON A FIBER CHANNEL LOOP WITH SOFT ADDRESSES
84
Patent #:
7050582
Issue Dt:
05/23/2006
Application #:
09883733
Filing Dt:
06/18/2001
Title:
PSEUDO-RANDOM ONE-TO-ONE CIRCUIT SYNTHESIS
85
Patent #:
6907553
Issue Dt:
06/14/2005
Application #:
09883761
Filing Dt:
06/18/2001
Publication #:
US20020083360
Pub Dt:
06/27/2002
Title:
METHOD AND APPARATUS FOR ESTIMATION OF ERROR IN DATA RECOVERY SCHEMES
86
Patent #:
6888938
Issue Dt:
05/03/2005
Application #:
09884040
Filing Dt:
06/20/2001
Publication #:
US20030026418
Pub Dt:
02/06/2003
Title:
DYNAMICALLY ADJUSTABLE DIGITAL GYRATOR HAVING EXTENDABLE FEEDBACK FOR STABLE DC LOAD LINE
87
Patent #:
6411114
Issue Dt:
06/25/2002
Application #:
09884711
Filing Dt:
06/18/2001
Title:
UNIVERSAL TEST COUPON FOR PERFORMING PREQUALIFICATION TESTS ON SUBSTRATES
88
Patent #:
6930056
Issue Dt:
08/16/2005
Application #:
09884736
Filing Dt:
06/19/2001
Title:
PLASMA TREATMENT OF LOW DIELECTRIC CONSTANT DIELECTRIC MATERIAL TO FORM STRUCTURES USEFUL IN FORMATION OF METAL INTERCONNECTS AND/OR FILLED VIAS FOR INTEGRATED CIRCUIT STRUCTURE
89
Patent #:
6852243
Issue Dt:
02/08/2005
Application #:
09884805
Filing Dt:
06/18/2001
Publication #:
US20010036744
Pub Dt:
11/01/2001
Title:
CONFINEMENT DEVICE FOR USE IN DRY ETCHING OF SUBSTRATE SURFACE AND METHOD OF DRY ETCHING A WAFER SURFACE
90
Patent #:
6459049
Issue Dt:
10/01/2002
Application #:
09885299
Filing Dt:
06/20/2001
Title:
HIGH DENSITY SIGNAL ROUTING
91
Patent #:
6445066
Issue Dt:
09/03/2002
Application #:
09885491
Filing Dt:
06/20/2001
Title:
SPLITTING AND ASSIGNING POWER PLANES
92
Patent #:
6617251
Issue Dt:
09/09/2003
Application #:
09885497
Filing Dt:
06/19/2001
Title:
METHOD OF SHALLOW TRENCH ISOLATION FORMATION AND PLANARIZATION
93
Patent #:
6550044
Issue Dt:
04/15/2003
Application #:
09885589
Filing Dt:
06/19/2001
Title:
METHOD IN INTEGRATING CLOCK TREE SYNTHESIS AND TIMING OPTIMIZATION FOR AN INTEGRATED CIRCUIT DESIGN
94
Patent #:
6507937
Issue Dt:
01/14/2003
Application #:
09885596
Filing Dt:
06/19/2001
Title:
METHOD OF GLOBAL PLACEMENT OF CONTROL CELLS AND HARDMAC PINS IN A DATAPATH MACRO FOR AN INTEGRATED CIRCUIT DESIGN
95
Patent #:
6759860
Issue Dt:
07/06/2004
Application #:
09885687
Filing Dt:
06/19/2001
Title:
SEMICONDUCTOR DEVICE PACKAGE SUBSTRATE PROBE FIXTURE
96
Patent #:
6804694
Issue Dt:
10/12/2004
Application #:
09885781
Filing Dt:
06/20/2001
Publication #:
US20030028570
Pub Dt:
02/06/2003
Title:
ADAPTIVE EQUALIZER WITH GAIN CONTROLLED INITIALIZATION
97
Patent #:
6649422
Issue Dt:
11/18/2003
Application #:
09886780
Filing Dt:
06/21/2001
Publication #:
US20010036702
Pub Dt:
11/01/2001
Title:
INTEGRATED CIRCUIT HAVING A MICROMAGNETIC DEVICE AND METHOD OF MANUFACTURE THEREFOR
98
Patent #:
6856029
Issue Dt:
02/15/2005
Application #:
09887131
Filing Dt:
06/22/2001
Title:
PROCESS INDEPENDENT ALIGNMENT MARKS
99
Patent #:
6716488
Issue Dt:
04/06/2004
Application #:
09887938
Filing Dt:
06/22/2001
Publication #:
US20030003324
Pub Dt:
01/02/2003
Title:
FERRITE FILM FORMATION METHOD AND APPARATUS
100
Patent #:
6747464
Issue Dt:
06/08/2004
Application #:
09888302
Filing Dt:
06/21/2001
Title:
WAFER HOLDER FOR BACKSIDE VIEWING FRONTSIDE PROBING ON AUTOMATED WAFER PROBE STATIONS
Assignor
1
BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Exec Dt:
01/19/2017
Assignee
1
AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
NO. 1 YISHUN AVENUE 7
SINGAPORE, SINGAPORE 768923
Correspondence name and address
LATHAM & WATKINS LLP
650 TOWN CENTER DRIVE, SUITE 2000
COSTA MESA, CA 92626

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