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Reel/Frame:	041717/0736			Pages:	10
		Recorded:	02/15/2017
Attorney Dkt #:	TW0027-TSMC-NORTH STAR
Conveyance:	ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).

Total properties: 125
Page 1 of 2
Pages: 1 2

Patent #:	7063919	Issue Dt:	06/20/2006	Application #:	10209167	Filing Dt:	07/31/2002
Publication #:	US20040023126	Pub Dt:	02/05/2004
Title:	LITHOGRAPHIC TEMPLATE HAVING A REPAIRED GAP DEFECT METHOD OF REPAIR AND USE

Patent #:	7082451	Issue Dt:	07/25/2006	Application #:	10237465	Filing Dt:	09/09/2002
Publication #:	US20040064493	Pub Dt:	04/01/2004
Title:	RECONFIGURABLE VECTOR-FFT/IFFT, VECTOR-MULTIPLIER/DIVIDER

Patent #:	7479407	Issue Dt:	01/20/2009	Application #:	10302130	Filing Dt:	11/22/2002
Publication #:	US20040195591	Pub Dt:	10/07/2004
Title:	DIGITAL AND RF SYSTEM AND METHOD THEREFOR

Patent #:	7042103	Issue Dt:	05/09/2006	Application #:	10334042	Filing Dt:	12/30/2002
Publication #:	US20040124543	Pub Dt:	07/01/2004
Title:	LOW STRESS SEMICONDUCTOR DIE ATTACH

Patent #:	6989229	Issue Dt:	01/24/2006	Application #:	10400347	Filing Dt:	03/27/2003
Publication #:	US20040188383	Pub Dt:	09/30/2004
Title:	NON-RESOLVING MASK TILING METHOD FOR FLARE REDUCTION

Patent #:	6686282	Issue Dt:	02/03/2004	Application #:	10403967	Filing Dt:	03/31/2003
Title:	PLATED METAL TRANSISTOR GATE AND METHOD OF FORMATION

Patent #:	7188630	Issue Dt:	03/13/2007	Application #:	10431053	Filing Dt:	05/07/2003
Publication #:	US20040224521	Pub Dt:	11/11/2004
Title:	METHOD TO PASSIVATE CONDUCTIVE SURFACES DURING SEMICONDUCTOR PROCESSING

Patent #:	7120661	Issue Dt:	10/10/2006	Application #:	10447352	Filing Dt:	05/29/2003
Publication #:	US20030229659	Pub Dt:	12/11/2003
Title:	BIT EXACTNESS SUPPORT IN DUAL-MAC ARCHITECTURE

Patent #:	7432838	Issue Dt:	10/07/2008	Application #:	10554805	Filing Dt:	04/04/2007
Publication #:	US20080030388	Pub Dt:	02/07/2008
Title:	METHOD AND APPARATUS FOR REDUCED POWER CONSUMPTION ADC CONVERSION

Patent #:	6974776	Issue Dt:	12/13/2005	Application #:	10611546	Filing Dt:	07/01/2003
Publication #:	US20050003677	Pub Dt:	01/06/2005
Title:	ACTIVATION PLATE FOR ELECTROLESS AND IMMERSION PLATING OF INTEGRATED CIRCUITS

Patent #:	7042098	Issue Dt:	05/09/2006	Application #:	10613703	Filing Dt:	07/07/2003
Publication #:	US20050006734	Pub Dt:	01/13/2005
Title:	BONDING PAD FOR A PACKAGED INTEGRATED CIRCUIT

Patent #:	7013447	Issue Dt:	03/14/2006	Application #:	10624398	Filing Dt:	07/22/2003
Publication #:	US20050020015	Pub Dt:	01/27/2005
Title:	METHOD FOR CONVERTING A PLANAR TRANSISTOR DESIGN TO A VERTICAL DOUBLE GATE TRANSISTOR DESIGN

Patent #:	6921700	Issue Dt:	07/26/2005	Application #:	10631093	Filing Dt:	07/31/2003
Publication #:	US20050023619	Pub Dt:	02/03/2005
Title:	Method of forming a transistor having multiple channels

Patent #:	7088009	Issue Dt:	08/08/2006	Application #:	10644163	Filing Dt:	08/20/2003
Publication #:	US20050040501	Pub Dt:	02/24/2005
Title:	WIREBONDED ASSEMBLAGE METHOD AND APPARATUS

Patent #:	6958265	Issue Dt:	10/25/2005	Application #:	10663621	Filing Dt:	09/16/2003
Publication #:	US20050059213	Pub Dt:	03/17/2005
Title:	SEMICONDUCTOR DEVICE WITH NANOCLUSTERS

Patent #:	7030695	Issue Dt:	04/18/2006	Application #:	10675115	Filing Dt:	09/30/2003
Publication #:	US20050001682	Pub Dt:	01/06/2005
Title:	LOW THRESHOLD VOLTAGE CIRCUIT EMPLOYING A HIGH THRESHOLD VOLTAGE OUTPUT STAGE

Patent #:	7098502	Issue Dt:	08/29/2006	Application #:	10705317	Filing Dt:	11/10/2003
Publication #:	US20050098822	Pub Dt:	05/12/2005
Title:	TRANSISTOR HAVING THREE ELECTRICALLY ISOLATED ELECTRODES AND METHOD OF FORMATION

Patent #:	7172927	Issue Dt:	02/06/2007	Application #:	10740303	Filing Dt:	12/18/2003
Publication #:	US20050136567	Pub Dt:	06/23/2005
Title:	WARPAGE CONTROL OF ARRAY PACKAGING

Patent #:	7045432	Issue Dt:	05/16/2006	Application #:	10771855	Filing Dt:	02/04/2004
Publication #:	US20050170604	Pub Dt:	08/04/2005
Title:	METHOD FOR FORMING A SEMICONDUCTOR DEVICE WITH LOCAL SEMICONDUCTOR-ON-INSULATOR (SOI)

Patent #:	7015075	Issue Dt:	03/21/2006	Application #:	10774977	Filing Dt:	02/09/2004
Publication #:	US20050176180	Pub Dt:	08/11/2005
Title:	DIE ENCAPSULATION USING A POROUS CARRIER

Patent #:	7205178	Issue Dt:	04/17/2007	Application #:	10807527	Filing Dt:	03/24/2004
Publication #:	US20050214980	Pub Dt:	09/29/2005
Title:	LAND GRID ARRAY PACKAGED DEVICE AND METHOD OF FORMING SAME

Patent #:	7071518	Issue Dt:	07/04/2006	Application #:	10856602	Filing Dt:	05/28/2004
Publication #:	US20050275055	Pub Dt:	12/15/2005
Title:	SCHOTTKY DEVICE

Patent #:	7091130	Issue Dt:	08/15/2006	Application #:	10876820	Filing Dt:	06/25/2004
Publication #:	US20060194438	Pub Dt:	08/31/2006
Title:	METHOD OF FORMING A NANOCLUSTER CHARGE STORAGE DEVICE

Patent #:	7507638	Issue Dt:	03/24/2009	Application #:	10881144	Filing Dt:	06/30/2004
Publication #:	US20060003551	Pub Dt:	01/05/2006
Title:	ULTRA-THIN DIE AND METHOD OF FABRICATING SAME

Patent #:	7738563	Issue Dt:	06/15/2010	Application #:	10887132	Filing Dt:	07/08/2004
Publication #:	US20060008013	Pub Dt:	01/12/2006
Title:	METHOD AND SYSTEM FOR PERFORMING DEBLOCKING FILTERING

Patent #:	7105886	Issue Dt:	09/12/2006	Application #:	10895552	Filing Dt:	07/21/2004
Publication #:	US20050101159	Pub Dt:	05/12/2005
Title:	HIGH K DIELECTRIC FILM

Patent #:	7164293	Issue Dt:	01/16/2007	Application #:	10902204	Filing Dt:	07/29/2004
Publication #:	US20060022714	Pub Dt:	02/02/2006
Title:	DYNAMIC LATCH HAVING INTEGRAL LOGIC FUNCTION AND METHOD THEREFOR

Patent #:	7238601	Issue Dt:	07/03/2007	Application #:	10939148	Filing Dt:	09/10/2004
Publication #:	US20060057792	Pub Dt:	03/16/2006
Title:	SEMICONDUCTOR DEVICE HAVING CONDUCTIVE SPACERS IN SIDEWALL REGIONS AND METHOD FOR FORMING

Patent #:	7015153	Issue Dt:	03/21/2006	Application #:	10969634	Filing Dt:	10/20/2004
Title:	METHOD FOR FORMING A LAYER USING A PURGING GAS IN A SEMICONDUCTOR PROCESS

Patent #:	7109051	Issue Dt:	09/19/2006	Application #:	10989940	Filing Dt:	11/15/2004
Publication #:	US20060105479	Pub Dt:	05/18/2006
Title:	METHOD OF INTEGRATING OPTICAL DEVICES AND ELECTRONIC DEVICES ON AN INTEGRATED CIRCUIT

Patent #:	7339275	Issue Dt:	03/04/2008	Application #:	10995818	Filing Dt:	11/22/2004
Publication #:	US20060108697	Pub Dt:	05/25/2006
Title:	MULTI-CHIPS SEMICONDUCTOR DEVICE ASSEMBLIES AND METHODS FOR FABRICATING THE SAME

Patent #:	7442581	Issue Dt:	10/28/2008	Application #:	11009284	Filing Dt:	12/10/2004
Publication #:	US20060128066	Pub Dt:	06/15/2006
Title:	FLEXIBLE CARRIER AND RELEASE METHOD FOR HIGH VOLUME ELECTRONIC PACKAGE FABRICATION

Patent #:	7284231	Issue Dt:	10/16/2007	Application #:	11018637	Filing Dt:	12/21/2004
Publication #:	US20060136861	Pub Dt:	06/22/2006
Title:	LAYOUT MODIFICATION USING MULTILAYER-BASED CONSTRAINTS

Patent #:	7585735	Issue Dt:	09/08/2009	Application #:	11047946	Filing Dt:	02/01/2005
Publication #:	US20060170016	Pub Dt:	08/03/2006
Title:	ASYMMETRIC SPACERS AND ASYMMETRIC SOURCE/DRAIN EXTENSION LAYERS

Patent #:	7262494	Issue Dt:	08/28/2007	Application #:	11082096	Filing Dt:	03/16/2005
Publication #:	US20060208363	Pub Dt:	09/21/2006
Title:	THREE-DIMENSIONAL PACKAGE

Patent #:	7504302	Issue Dt:	03/17/2009	Application #:	11083878	Filing Dt:	03/18/2005
Publication #:	US20060220102	Pub Dt:	10/05/2006
Title:	PROCESS OF FORMING A NON-VOLATILE MEMORY CELL INCLUDING A CAPACITOR STRUCTURE

Patent #:	7112832	Issue Dt:	09/26/2006	Application #:	11091980	Filing Dt:	03/29/2005
Publication #:	US20050167650	Pub Dt:	08/04/2005
Title:	TRANSISTOR HAVING MULTIPLE CHANNELS

Patent #:	7345545	Issue Dt:	03/18/2008	Application #:	11092070	Filing Dt:	03/28/2005
Publication #:	US20060217078	Pub Dt:	09/28/2006
Title:	ENHANCEMENT MODE TRANSCEIVER AND SWITCHED GAIN AMPLIFIER INTEGRATED CIRCUIT

Patent #:	7074664	Issue Dt:	07/11/2006	Application #:	11092418	Filing Dt:	03/29/2005
Title:	DUAL METAL GATE ELECTRODE SEMICONDUCTOR FABRICATION PROCESS AND STRUCTURE THEREOF

Patent #:	7241691	Issue Dt:	07/10/2007	Application #:	11092469	Filing Dt:	03/28/2005
Publication #:	US20060216934	Pub Dt:	09/28/2006
Title:	CONDUCTING METAL OXIDE WITH ADDITIVE AS P-MOS DEVICE ELECTRODE

Patent #:	7374971	Issue Dt:	05/20/2008	Application #:	11110283	Filing Dt:	04/20/2005
Publication #:	US20060237850	Pub Dt:	10/26/2006
Title:	SEMICONDUCTOR DIE EDGE RECONDITIONING

Patent #:	7341915	Issue Dt:	03/11/2008	Application #:	11142057	Filing Dt:	05/31/2005
Publication #:	US20060270164	Pub Dt:	11/30/2006
Title:	METHOD OF MAKING PLANAR DOUBLE GATE SILICON-ON-INSULATOR STRUCTURES

Patent #:	7387946	Issue Dt:	06/17/2008	Application #:	11146825	Filing Dt:	06/07/2005
Publication #:	US20060276004	Pub Dt:	12/07/2006
Title:	METHOD OF FABRICATING A SUBSTRATE FOR A PLANAR, DOUBLE-GATED, TRANSISTOR PROCESS

Patent #:	7622309	Issue Dt:	11/24/2009	Application #:	11168837	Filing Dt:	06/28/2005
Publication #:	US20060292711	Pub Dt:	12/28/2006
Title:	MECHANICAL INTEGRITY EVALUATION OF LOW-K DEVICES WITH BUMP SHEAR

Patent #:	7314798	Issue Dt:	01/01/2008	Application #:	11188583	Filing Dt:	07/25/2005
Publication #:	US20070020831	Pub Dt:	01/25/2007
Title:	METHOD OF FABRICATING A NONVOLATILE STORAGE ARRAY WITH CONTINUOUS CONTROL GATE EMPLOYING HOT CARRIER INJECTION PROGRAMMING

Patent #:	7323389	Issue Dt:	01/29/2008	Application #:	11190411	Filing Dt:	07/27/2005
Publication #:	US20070026615	Pub Dt:	02/01/2007
Title:	METHOD OF FORMING A FINFET STRUCTURE

Patent #:	7179682	Issue Dt:	02/20/2007	Application #:	11191132	Filing Dt:	07/27/2005
Publication #:	US20060087038	Pub Dt:	04/27/2006
Title:	PACKAGED DEVICE AND METHOD OF FORMING SAME

Patent #:	7538000	Issue Dt:	05/26/2009	Application #:	11193675	Filing Dt:	07/28/2005
Publication #:	US20070023817	Pub Dt:	02/01/2007
Title:	METHOD OF FORMING DOUBLE GATE TRANSISTORS HAVING VARYING GATE DIELECTRIC THICKNESSES

Patent #:	7354831	Issue Dt:	04/08/2008	Application #:	11199482	Filing Dt:	08/08/2005
Publication #:	US20070029586	Pub Dt:	02/08/2007
Title:	MULTI-CHANNEL TRANSISTOR STRUCTURE AND METHOD OF MAKING THEREOF

Patent #:	7339241	Issue Dt:	03/04/2008	Application #:	11216974	Filing Dt:	08/31/2005
Publication #:	US20070045735	Pub Dt:	03/01/2007
Title:	FINFET STRUCTURE WITH CONTACTS

Patent #:	7264986	Issue Dt:	09/04/2007	Application #:	11239783	Filing Dt:	09/30/2005
Publication #:	US20070075445	Pub Dt:	04/05/2007
Title:	MICROELECTRONIC ASSEMBLY AND METHOD FOR FORMING THE SAME

Patent #:	7653448	Issue Dt:	01/26/2010	Application #:	11240314	Filing Dt:	09/30/2005
Publication #:	US20070076120	Pub Dt:	04/05/2007
Title:	NICAM PROCESSING METHOD

Patent #:	7916796	Issue Dt:	03/29/2011	Application #:	11254166	Filing Dt:	10/19/2005
Publication #:	US20070086527	Pub Dt:	04/19/2007
Title:	REGION CLUSTERING BASED ERROR CONCEALMENT FOR VIDEO DATA

Patent #:	7435625	Issue Dt:	10/14/2008	Application #:	11257802	Filing Dt:	10/24/2005
Publication #:	US20070090542	Pub Dt:	04/26/2007
Title:	SEMICONDUCTOR DEVICE WITH REDUCED PACKAGE CROSS-TALK AND LOSS

Patent #:	7575975	Issue Dt:	08/18/2009	Application #:	11263120	Filing Dt:	10/31/2005
Publication #:	US20070099353	Pub Dt:	05/03/2007
Title:	METHOD FOR FORMING A PLANAR AND VERTICAL SEMICONDUCTOR STRUCTURE HAVING A STRAINED SEMICONDUTOR LAYER

Patent #:	7432122	Issue Dt:	10/07/2008	Application #:	11327686	Filing Dt:	01/06/2006
Publication #:	US20070158703	Pub Dt:	07/12/2007
Title:	ELECTRONIC DEVICE AND A PROCESS FOR FORMING THE ELECTRONIC DEVICE

Patent #:	7323373	Issue Dt:	01/29/2008	Application #:	11339133	Filing Dt:	01/25/2006
Publication #:	US20070172996	Pub Dt:	07/26/2007
Title:	METHOD OF FORMING A SEMICONDUCTOR DEVICE WITH DECREASED UNDERCUTTING OF SEMICONDUCTOR MATERIAL

Patent #:	7544980	Issue Dt:	06/09/2009	Application #:	11342155	Filing Dt:	01/27/2006
Publication #:	US20070176223	Pub Dt:	08/02/2007
Title:	SPLIT GATE MEMORY CELL IN A FINFET

Patent #:	7403071	Issue Dt:	07/22/2008	Application #:	11374870	Filing Dt:	03/14/2006
Publication #:	US20070216482	Pub Dt:	09/20/2007
Title:	HIGH LINEARITY AND LOW NOISE AMPLIFIER WITH CONTINUOUSLY VARIABLE GAIN CONTROL

Patent #:	7456055	Issue Dt:	11/25/2008	Application #:	11375890	Filing Dt:	03/15/2006
Publication #:	US20070218628	Pub Dt:	09/20/2007
Title:	PROCESS FOR FORMING AN ELECTRONIC DEVICE INCLUDING SEMICONDUCTOR FINS

Patent #:	7574564	Issue Dt:	08/11/2009	Application #:	11382903	Filing Dt:	05/11/2006
Publication #:	US20070266207	Pub Dt:	11/15/2007
Title:	REPLACEMENT POINTER CONTROL FOR SET ASSOCIATIVE CACHE AND METHOD

Patent #:	7808117	Issue Dt:	10/05/2010	Application #:	11383653	Filing Dt:	05/16/2006
Publication #:	US20070267755	Pub Dt:	11/22/2007
Title:	INTEGRATED CIRCUIT HAVING PADS AND INPUT/OUTPUT (I/O) CELLS

Patent #:	7442591	Issue Dt:	10/28/2008	Application #:	11406638	Filing Dt:	04/19/2006
Publication #:	US20070249103	Pub Dt:	10/25/2007
Title:	METHOD OF MAKING A MULTI-GATE DEVICE

Patent #:	7670895	Issue Dt:	03/02/2010	Application #:	11409633	Filing Dt:	04/24/2006
Publication #:	US20070246793	Pub Dt:	10/25/2007
Title:	PROCESS OF FORMING AN ELECTRONIC DEVICE INCLUDING A SEMICONDUCTOR LAYER AND ANOTHER LAYER ADJACENT TO AN OPENING WITHIN THE SEMICONDUCTOR LAYER

Patent #:	7655550	Issue Dt:	02/02/2010	Application #:	11427980	Filing Dt:	06/30/2006
Publication #:	US20080001202	Pub Dt:	01/03/2008
Title:	A METHOD OF MAKING METAL GATE TRANSISTORS

Patent #:	7803670	Issue Dt:	09/28/2010	Application #:	11458902	Filing Dt:	07/20/2006
Publication #:	US20080020515	Pub Dt:	01/24/2008
Title:	TWISTED DUAL-SUBSTRATE ORIENTATION (DSO) SUBSTRATES

Patent #:	7788471	Issue Dt:	08/31/2010	Application #:	11522634	Filing Dt:	09/18/2006
Publication #:	US20080072010	Pub Dt:	03/20/2008
Title:	DATA PROCESSOR AND METHODS THEREOF

Patent #:	7378298	Issue Dt:	05/27/2008	Application #:	11524457	Filing Dt:	09/20/2006
Publication #:	US20070099341	Pub Dt:	05/03/2007
Title:	METHOD OF MAKING STACKED DIE PACKAGE

Patent #:	8320460	Issue Dt:	11/27/2012	Application #:	11532701	Filing Dt:	09/18/2006
Publication #:	US20080069239	Pub Dt:	03/20/2008
Title:	DYADIC SPATIAL RE-SAMPLING FILTERS FOR INTER-LAYER TEXTURE PREDICTIONS IN SCALABLE IMAGE PROCESSING

Patent #:	8049313	Issue Dt:	11/01/2011	Application #:	11533410	Filing Dt:	09/20/2006
Publication #:	US20080067645	Pub Dt:	03/20/2008
Title:	HEAT SPREADER FOR SEMICONDUCTOR PACKAGE

Patent #:	7489026	Issue Dt:	02/10/2009	Application #:	11590327	Filing Dt:	10/31/2006
Publication #:	US20080099899	Pub Dt:	05/01/2008
Title:	METHODS AND APPARATUS FOR A QUAD FLAT NO-LEAD (QFN) PACKAGE

Patent #:	7579860	Issue Dt:	08/25/2009	Application #:	11592411	Filing Dt:	11/02/2006
Publication #:	US20080122669	Pub Dt:	05/29/2008
Title:	DIGITAL BANDGAP REFERENCE AND METHOD FOR PRODUCING REFERENCE SIGNAL

Patent #:	7802241	Issue Dt:	09/21/2010	Application #:	11609102	Filing Dt:	12/11/2006
Publication #:	US20070136720	Pub Dt:	06/14/2007
Title:	METHOD FOR ESTIMATING PROCESSOR ENERGY USAGE

Patent #:	7632715	Issue Dt:	12/15/2009	Application #:	11620074	Filing Dt:	01/05/2007
Publication #:	US20080164593	Pub Dt:	07/10/2008
Title:	METHOD OF PACKAGING SEMICONDUCTOR DEVICES

Patent #:	7944969	Issue Dt:	05/17/2011	Application #:	11620540	Filing Dt:	01/05/2007
Publication #:	US20080165857	Pub Dt:	07/10/2008
Title:	METHOD AND SYSTEM FOR SAMPLING VIDEO DATA

Patent #:	7285855	Issue Dt:	10/23/2007	Application #:	11625350	Filing Dt:	01/22/2007
Publication #:	US20070114664	Pub Dt:	05/24/2007
Title:	PACKAGED DEVICE AND METHOD OF FORMING SAME

Patent #:	7579279	Issue Dt:	08/25/2009	Application #:	11670176	Filing Dt:	02/01/2007
Publication #:	US20080038994	Pub Dt:	02/14/2008
Title:	METHOD TO PASSIVATE CONDUCTIVE SURFACES DURING SEMICONDUCTOR PROCESSING

Patent #:	7683483	Issue Dt:	03/23/2010	Application #:	11671048	Filing Dt:	02/05/2007
Publication #:	US20080185686	Pub Dt:	08/07/2008
Title:	ELECTRONIC DEVICE WITH CONNECTION BUMPS

Patent #:	7554185	Issue Dt:	06/30/2009	Application #:	11718396	Filing Dt:	05/02/2007
Publication #:	US20080111248	Pub Dt:	05/15/2008
Title:	FLIP CHIP AND WIRE BOND SEMICONDUCTOR PACKAGE

Patent #:	7648858	Issue Dt:	01/19/2010	Application #:	11765170	Filing Dt:	06/19/2007
Publication #:	US20080315371	Pub Dt:	12/25/2008
Title:	METHODS AND APPARATUS FOR EMI SHIELDING IN MULTI-CHIP MODULES

Patent #:	7520170	Issue Dt:	04/21/2009	Application #:	11775853	Filing Dt:	07/10/2007
Publication #:	US20090013754	Pub Dt:	01/15/2009
Title:	OUTPUT CORRECTION CIRCUIT FOR THREE-AXIS ACCELEROMETER

Patent #:	8015470	Issue Dt:	09/06/2011	Application #:	11779499	Filing Dt:	07/18/2007
Publication #:	US20090024901	Pub Dt:	01/22/2009
Title:	APPARATUS AND METHOD FOR DECODING BURSTS OF CODED INFORMATION

Patent #:	7595226	Issue Dt:	09/29/2009	Application #:	11846671	Filing Dt:	08/29/2007
Publication #:	US20090061564	Pub Dt:	03/05/2009
Title:	METHOD OF PACKAGING AN INTEGRATED CIRCUIT DIE

Patent #:	7836283	Issue Dt:	11/16/2010	Application #:	11848826	Filing Dt:	08/31/2007
Publication #:	US20090063805	Pub Dt:	03/05/2009
Title:	DATA ACQUISITION MESSAGING USING SPECIAL PURPOSE REGISTERS

Patent #:	7583216	Issue Dt:	09/01/2009	Application #:	11863631	Filing Dt:	09/28/2007
Publication #:	US20090085782	Pub Dt:	04/02/2009
Title:	ADJUSTABLE DAC AND APPLICATIONS THEREOF

Patent #:	7820538	Issue Dt:	10/26/2010	Application #:	11911931	Filing Dt:	10/18/2007
Publication #:	US20080194092	Pub Dt:	08/14/2008
Title:	METHOD OF FABRICATING A MOS DEVICE WITH NON-SIO2 GATE DIELECTRIC

Patent #:	7608893	Issue Dt:	10/27/2009	Application #:	12037147	Filing Dt:	02/26/2008
Publication #:	US20080142853	Pub Dt:	06/19/2008
Title:	MULTI-CHANNEL TRANSISTOR STRUCTURE AND METHOD OF MAKING THEREOF

Patent #:	7742340	Issue Dt:	06/22/2010	Application #:	12048683	Filing Dt:	03/14/2008
Publication #:	US20090231925	Pub Dt:	09/17/2009
Title:	READ REFERENCE TECHNIQUE WITH CURRENT DEGRADATION PROTECTION

Patent #:	8532424	Issue Dt:	09/10/2013	Application #:	12094572	Filing Dt:	05/21/2008
Publication #:	US20090022415	Pub Dt:	01/22/2009
Title:	METHOD AND SYSTEM FOR FILTERING IMAGE DATA

Patent #:	7799657	Issue Dt:	09/21/2010	Application #:	12122837	Filing Dt:	05/19/2008
Publication #:	US20080213973	Pub Dt:	09/04/2008
Title:	METHOD OF FABRICATING A SUBSTRATE FOR A PLANAR, DOUBLE-GATED, TRANSISTOR PROCESS

Patent #:	7910482	Issue Dt:	03/22/2011	Application #:	12130158	Filing Dt:	05/30/2008
Publication #:	US20090294919	Pub Dt:	12/03/2009
Title:	METHOD OF FORMING A FINFET AND STRUCTURE

Patent #:	8711154	Issue Dt:	04/29/2014	Application #:	12135638	Filing Dt:	06/09/2008
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Title:	System and Method for Parallel Video Processing in Multicore Devices

Patent #:	8850446	Issue Dt:	09/30/2014	Application #:	12142028	Filing Dt:	06/19/2008
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Title:	SYSTEM AND METHOD FOR USING A TASK STARVATION INDICATION TO PREVENT STARVATIONS OF TASKS IN A MULTIPLE PROCESSING ENTITY SYSTEM

Patent #:	8041132	Issue Dt:	10/18/2011	Application #:	12147850	Filing Dt:	06/27/2008
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Title:	SYSTEM AND METHOD FOR LOAD BALANCING A VIDEO SIGNAL IN A MULTI-CORE PROCESSOR

Patent #:	8296548	Issue Dt:	10/23/2012	Application #:	12161518	Filing Dt:	07/18/2008
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Title:	DEVICE AND METHOD FOR FINDING EXTREME VALUES IN A DATA BLOCK

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Title:	ELECTRONIC DEVICE INCLUDING A GATED DIODE

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Title:	METHODS FOR FORMING QUAD FLAT NO-LEAD (QFN) PACKAGES

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Title:	ULTRA-THIN DIE AND METHOD OF FABRICATING SAME

100

Patent #:	7969026	Issue Dt:	06/28/2011	Application #:	12212028	Filing Dt:	09/17/2008
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Title:	FLEXIBLE CARRIER FOR HIGH VOLUME ELECTRONIC PACKAGE FABRICATION

Assignor

NORTH STAR INNOVATIONS INC.

Exec Dt:

10/06/2016

Assignee

TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

NO.8, LI-HSIN RD. 6, HSINCHU SCIENCE PARK,

HSINCHU, TAIWAN

Correspondence name and address
	JIANQ CHYUN INTELLECTUAL PROPERTY OFFICE
	7F.-1, NO. 100, ROOSEVELT RD., SEC. 2,
	TAIPEI, 100 TAIWAN

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