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Total properties:
17
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Patent #:
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|
Issue Dt:
|
11/09/1993
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Application #:
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07622833
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Filing Dt:
|
01/07/1991
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Title:
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ROUTING STRUCTURES FOR A CUSTOMIZABLE INTEGRATED CIRCUIT
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|
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Patent #:
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|
Issue Dt:
|
08/13/1996
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Application #:
|
08081553
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Filing Dt:
|
06/23/1993
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Title:
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PERSONALIZABLE GATE ARRAY DEVICES
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Patent #:
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|
Issue Dt:
|
07/30/1996
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Application #:
|
08133373
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Filing Dt:
|
10/08/1993
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Title:
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PERSONALIZABLE MULTI-CHIP CARRIER INCLUDING REMOVABLE FUSES
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Patent #:
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Issue Dt:
|
04/08/1997
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Application #:
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08404042
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Filing Dt:
|
03/14/1995
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Title:
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PERSONALIZABLE GATE ARRAY DEVICES
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Patent #:
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|
Issue Dt:
|
10/15/1996
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Application #:
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08429701
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Filing Dt:
|
04/27/1995
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Title:
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MAPPING OF GATE ARRAYS
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Patent #:
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|
Issue Dt:
|
11/04/1997
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Application #:
|
08516990
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Filing Dt:
|
08/18/1995
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Title:
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CELL FORMING PART OF A CUSTOMIZABLE LOGIC ARRAY
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Patent #:
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Issue Dt:
|
05/11/1999
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Application #:
|
08616097
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Filing Dt:
|
03/14/1996
|
|
Title:
|
CUSTOMIZABLE INTEGRATED CIRCUIT DEVICE
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|
|
|
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Patent #:
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|
Issue Dt:
|
11/21/2000
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Application #:
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09005604
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Filing Dt:
|
01/12/1998
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Title:
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LOW VOLTAGE DEVICE OPERABLE WITH A HIGH VOLTAGE SUPPLY
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|
|
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Patent #:
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|
Issue Dt:
|
09/25/2001
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Application #:
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09595085
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Filing Dt:
|
06/16/2000
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Title:
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Configurable cell for customizable logic array device
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|
|
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Patent #:
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|
Issue Dt:
|
08/02/2005
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Application #:
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10311135
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Filing Dt:
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07/24/2003
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Publication #:
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Pub Dt:
|
02/12/2004
| | | | |
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Title:
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CONFIGURABLE CELL FOR CUSTOMIZABLE LOGIC ARRAY DEVICE
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|
|
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Patent #:
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|
Issue Dt:
|
06/07/2005
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Application #:
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10416144
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Filing Dt:
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11/24/2003
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Publication #:
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Pub Dt:
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05/13/2004
| | | | |
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Title:
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SINGLE METAL PROGRAMMABILITY IN A CUSTOMIZABLE INTEGRATED CIRCUIT DEVICE
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|
|
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Patent #:
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|
Issue Dt:
|
03/04/2008
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Application #:
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11229331
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Filing Dt:
|
09/16/2005
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Title:
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IN-CIRCUIT DEVICE, SYSTEM AND METHOD TO PARALLELIZE DESIGN AND VERIFICATION OF APPLICATION-SPECIFIC INTEGRATED CIRCUITS ("ASICS") HAVING EMBEDDED SPECIALIZED FUNCTION CIRCUITS
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Patent #:
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Issue Dt:
|
03/31/2009
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Application #:
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11499899
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Filing Dt:
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08/03/2006
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Publication #:
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Pub Dt:
|
02/07/2008
| | | | |
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Title:
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CELLS OF A CUSTOMIZABLE LOGIC ARRAY DEVICE HAVING INDEPENDENTLY ACCESSIBLE CIRCUIT ELEMENTS
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|
|
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Patent #:
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|
Issue Dt:
|
06/08/2010
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Application #:
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11499913
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Filing Dt:
|
08/03/2006
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|
Publication #:
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Pub Dt:
|
02/07/2008
| | | | |
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Title:
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METHODS AND COMPUTER READABLE MEDIA IMPLEMENTING A MODIFIED ROUTING GRID TO INCREASE ROUTING DENSITIES OF CUSTOMIZABLE LOGIC ARRAY DEVICES
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|
|
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Patent #:
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|
Issue Dt:
|
03/03/2009
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Application #:
|
11524578
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Filing Dt:
|
09/20/2006
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|
Title:
|
METHOD OF DEVELOPING APPLICATION-SPECIFIC INTEGRATED CIRCUIT DEVICES
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/09/2010
|
Application #:
|
12082100
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Filing Dt:
|
04/07/2008
|
|
Publication #:
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|
Pub Dt:
|
10/08/2009
| | | | |
|
Title:
|
METHOD AND APPARATUS FOR DQS POSTAMBLE DETECTION AND DRIFT COMPENSATION IN A DOUBLE DATA RATE (DDR) PHYSICAL INTERFACE
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|
|
|
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Patent #:
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|
Issue Dt:
|
03/09/2010
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Application #:
|
12082100
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Filing Dt:
|
04/07/2008
|
|
Publication #:
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Pub Dt:
|
10/08/2009
| | | | |
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Title:
|
METHOD AND APPARATUS FOR DQS POSTAMBLE DETECTION AND DRIFT COMPENSATION IN A DOUBLE DATA RATE (DDR) PHYSICAL INTERFACE
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