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Reel/Frame:042041/0743   Pages: 7
Recorded: 04/18/2017
Attorney Dkt #:SAND-01766US2
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 1
1
Patent #:
Issue Dt:
02/06/2018
Application #:
15430888
Filing Dt:
02/13/2017
Publication #:
Pub Dt:
06/01/2017
Title:
METHOD OF FABRICATING MEMORY ARRAY HAVING DIVIDED APART BIT LINES AND PARTIALLY DIVIDED BIT LINE SELECTOR SWITCHES
Assignors
1
Exec Dt:
11/11/2014
2
Exec Dt:
11/11/2014
3
Exec Dt:
11/11/2014
4
Exec Dt:
11/11/2014
Assignee
1
951 SANDISK DRIVE
MILPITAS, CALIFORNIA 95035
Correspondence name and address
VIERRA MAGEN MARCUS LLP
575 MARKET STREET, SUITE 3750
SAN FRANCISCO, CA 94105

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