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Reel/Frame:042356/0257   Pages: 3
Recorded: 05/12/2017
Attorney Dkt #:T&A-GENERAL/Z-1704(USMA)N
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 1
1
Patent #:
Issue Dt:
08/01/2006
Application #:
10930845
Filing Dt:
09/01/2004
Publication #:
Pub Dt:
02/03/2005
Title:
METHOD FOR MANUFACTURING SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
Assignors
1
Exec Dt:
05/17/2002
2
Exec Dt:
05/17/2002
3
Exec Dt:
05/17/2002
4
Exec Dt:
05/17/2002
5
Exec Dt:
05/17/2002
Assignees
1
6, KANDA SURUGADAI 4-CHOME, CHIYODA-KU
TOKYO, JAPAN
2
22-1, JOSUIHONCHO 5-CHOME, KODAIRA-SHI
TOKYO, JAPAN
3
1-1, NISHIYOKOTEMACHI, TAKASAKI-SHI
GUNMA, JAPAN
Correspondence name and address
MATTINGLY & MALUR, PC
1800 DIAGONAL ROAD
SUITE 210
ALEXANDRIA, VA 22314

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