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Reel/Frame:042416/0448   Pages: 7
Recorded: 05/17/2017
Attorney Dkt #:AMD TO SPANSION TRANSFER
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 38
1
Patent #:
6232663
Issue Dt:
05/15/2001
Application #:
08904630
Filing Dt:
08/01/1997
Title:
SEMICONDUCTOR DEVICE HAVING INTERLAYER INSULATOR AND METHOD FOR FABRICATING THEREOF
2
Patent #:
6177312
Issue Dt:
01/23/2001
Application #:
09048459
Filing Dt:
03/26/1998
Title:
METHOD FOR REMOVING CONTAMINATE NITROGEN FROM THE PERIPHERAL GATE REGION OF A NON-VOLATILE MEMORY DEVICE DURING PRODUCTION OF SUCH DEVICE
3
Patent #:
6057193
Issue Dt:
05/02/2000
Application #:
09061515
Filing Dt:
04/16/1998
Title:
ELIMINATION OF POLY CAP FOR EASY POLY1 CONTACT FOR NAND PRODUCT
4
Patent #:
6312991
Issue Dt:
11/06/2001
Application #:
09531582
Filing Dt:
03/21/2000
Title:
Elimination of poly cap for easy poly 1 contact for nand product
5
Patent #:
7365389
Issue Dt:
04/29/2008
Application #:
11008233
Filing Dt:
12/10/2004
Title:
MEMORY CELL HAVING ENHANCED HIGH-K DIELECTRIC
6
Patent #:
8319266
Issue Dt:
11/27/2012
Application #:
11008240
Filing Dt:
12/10/2004
Title:
ETCH STOP LAYER FOR MEMORY CELL RELIABILITY IMPROVEMENT
7
Patent #:
8125018
Issue Dt:
02/28/2012
Application #:
11033588
Filing Dt:
01/12/2005
Publication #:
US20060151821
Pub Dt:
07/13/2006
Title:
MEMORY DEVICE HAVING TRAPEZOIDAL BITLINES AND METHOD OF FABRICATING SAME
8
Patent #:
7294573
Issue Dt:
11/13/2007
Application #:
11035188
Filing Dt:
01/13/2005
Title:
METHOD FOR CONTROLLING POLY 1 THICKNESS AND UNIFORMITY IN A MEMORY ARRAY FABRICATION PROCESS
9
Patent #:
7306988
Issue Dt:
12/11/2007
Application #:
11063138
Filing Dt:
02/22/2005
Title:
MEMORY CELL AND METHOD OF MAKING THE MEMORY CELL
10
Patent #:
7202540
Issue Dt:
04/10/2007
Application #:
11066567
Filing Dt:
02/28/2005
Publication #:
US20050230714
Pub Dt:
10/20/2005
Title:
SEMICONDUCTOR MEMORY DEVICE
11
Patent #:
8022468
Issue Dt:
09/20/2011
Application #:
11091519
Filing Dt:
03/29/2005
Title:
ULTRAVIOLET RADIATION BLOCKING INTERLAYER DIELECTRIC
12
Patent #:
7341956
Issue Dt:
03/11/2008
Application #:
11100563
Filing Dt:
04/07/2005
Title:
DISPOSABLE HARD MASK FOR FORMING BIT LINES
13
Patent #:
8367493
Issue Dt:
02/05/2013
Application #:
11109719
Filing Dt:
04/20/2005
Title:
VOID FREE INTERLAYER DIELECTRIC
14
Patent #:
7476604
Issue Dt:
01/13/2009
Application #:
11128391
Filing Dt:
05/13/2005
Title:
AGGRESSIVE CLEANING PROCESS FOR SEMICONDUCTOR DEVICE CONTACT FORMATION
15
Patent #:
7786003
Issue Dt:
08/31/2010
Application #:
11136569
Filing Dt:
05/25/2005
Title:
BURIED SILICIDE LOCAL INTERCONNECT WITH SIDEWALL SPACERS AND METHOD FOR MAKING THE SAME
16
Patent #:
7300886
Issue Dt:
11/27/2007
Application #:
11147208
Filing Dt:
06/08/2005
Title:
INTERLAYER DIELECTRIC FOR CHARGE LOSS IMPROVEMENT
17
Patent #:
7307027
Issue Dt:
12/11/2007
Application #:
11201378
Filing Dt:
08/11/2005
Title:
VOID FREE INTERLAYER DIELECTRIC
18
Patent #:
7884030
Issue Dt:
02/08/2011
Application #:
11408086
Filing Dt:
04/21/2006
Title:
GAP-FILLING WITH UNIFORM PROPERTIES
19
Patent #:
7675104
Issue Dt:
03/09/2010
Application #:
11461131
Filing Dt:
07/31/2006
Publication #:
US20080023751
Pub Dt:
01/31/2008
Title:
INTEGRATED CIRCUIT MEMORY SYSTEM EMPLOYING SILICON RICH LAYERS
20
Patent #:
8232175
Issue Dt:
07/31/2012
Application #:
11521204
Filing Dt:
09/14/2006
Publication #:
US20080123401
Pub Dt:
05/29/2008
Title:
DAMASCENE METAL-INSULATOR-METAL (MIM) DEVICE WITH IMPROVED SCALEABILITY
21
Patent #:
8143661
Issue Dt:
03/27/2012
Application #:
11539984
Filing Dt:
10/10/2006
Publication #:
US20080083946
Pub Dt:
04/10/2008
Title:
MEMORY CELL SYSTEM WITH CHARGE TRAP
22
Patent #:
8564041
Issue Dt:
10/22/2013
Application #:
11551532
Filing Dt:
10/20/2006
Publication #:
US20080096348
Pub Dt:
04/24/2008
Title:
CONTACTS FOR SEMICONDUCTOR DEVICES
23
Patent #:
8445966
Issue Dt:
05/21/2013
Application #:
11614053
Filing Dt:
12/20/2006
Publication #:
US20080151590
Pub Dt:
06/26/2008
Title:
METHOD AND APPARATUS FOR PROTECTION AGAINST PROCESS-INDUCED CHARGING
24
Patent #:
7670959
Issue Dt:
03/02/2010
Application #:
11616085
Filing Dt:
12/26/2006
Publication #:
US20080153298
Pub Dt:
06/26/2008
Title:
MEMORY DEVICE ETCH METHODS
25
Patent #:
7759745
Issue Dt:
07/20/2010
Application #:
11656437
Filing Dt:
01/23/2007
Publication #:
US20070114617
Pub Dt:
05/24/2007
Title:
SEMICONDUCTOR MEMORY DEVICE
26
Patent #:
7482226
Issue Dt:
01/27/2009
Application #:
11656438
Filing Dt:
01/23/2007
Publication #:
US20070117303
Pub Dt:
05/24/2007
Title:
SEMICONDUCTOR MEMORY DEVICE
27
Patent #:
8236693
Issue Dt:
08/07/2012
Application #:
11748743
Filing Dt:
05/15/2007
Publication #:
US20080286921
Pub Dt:
11/20/2008
Title:
METHODS OF FORMING SILICIDES OF DIFFERENT THICKNESSES ON DIFFERENT STRUCTURES
28
Patent #:
NONE
Issue Dt:
Application #:
11958646
Filing Dt:
12/18/2007
Publication #:
US20080150011
Pub Dt:
06/26/2008
Title:
INTEGRATED CIRCUIT SYSTEM WITH MEMORY SYSTEM
29
Patent #:
7972951
Issue Dt:
07/05/2011
Application #:
12688477
Filing Dt:
01/15/2010
Publication #:
US20100120239
Pub Dt:
05/13/2010
Title:
MEMORY DEVICE ETCH METHODS
30
Patent #:
8049334
Issue Dt:
11/01/2011
Application #:
12843131
Filing Dt:
07/26/2010
Title:
BURIED SILICIDE LOCAL INTERCONNECT WITH SIDEWALL SPACERS AND METHOD FOR MAKING THE SAME
31
Patent #:
8415256
Issue Dt:
04/09/2013
Application #:
12982364
Filing Dt:
12/30/2010
Title:
GAP-FILLING WITH UNIFORM PROPERTIES
32
Patent #:
8368219
Issue Dt:
02/05/2013
Application #:
13281491
Filing Dt:
10/26/2011
Publication #:
US20120038051
Pub Dt:
02/16/2012
Title:
BURIED SILICIDE LOCAL INTERCONNECT WITH SIDEWALL SPACERS AND METHOD FOR MAKING THE SAME
33
Patent #:
8957472
Issue Dt:
02/17/2015
Application #:
13357252
Filing Dt:
01/24/2012
Publication #:
US20120122285
Pub Dt:
05/17/2012
Title:
MEMORY DEVICE HAVING TRAPEZOIDAL BITLINES AND METHOD OF FABRICATING SAME
34
Patent #:
9343666
Issue Dt:
05/17/2016
Application #:
13529284
Filing Dt:
06/21/2012
Publication #:
US20120276706
Pub Dt:
11/01/2012
Title:
DAMASCENE METAL-INSULATOR-METAL (MIM) DEVICE WITH IMPROVED SCALEABILITY
35
Patent #:
8658496
Issue Dt:
02/25/2014
Application #:
13617291
Filing Dt:
09/14/2012
Publication #:
US20130078795
Pub Dt:
03/28/2013
Title:
ETCH STOP LAYER FOR MEMORY CELL RELIABILITY IMPROVEMENT
36
Patent #:
8614475
Issue Dt:
12/24/2013
Application #:
13732096
Filing Dt:
12/31/2012
Publication #:
US20130140720
Pub Dt:
06/06/2013
Title:
VOID FREE INTERLAYER DIELECTRIC
37
Patent #:
9318373
Issue Dt:
04/19/2016
Application #:
13866915
Filing Dt:
04/19/2013
Publication #:
US20130237022
Pub Dt:
09/12/2013
Title:
METHOD AND APPARATUS FOR PROTECTION AGAINST PROCESS-INDUCED CHARGING
38
Patent #:
10516044
Issue Dt:
12/24/2019
Application #:
14059077
Filing Dt:
10/21/2013
Publication #:
US20140042514
Pub Dt:
02/13/2014
Title:
CONTACTS FOR SEMICONDUCTOR DEVICES
Assignor
1
ADVANCED MICRO DEVICES, INC.
Exec Dt:
05/09/2017
Assignee
1
SPANSION LLC
198 CHAMPION COURT
SAN JOSE, CALIFORNIA 95134
Correspondence name and address
CYPRESS SEMICONDUCTOR CORPORATION
198 CHAMPION COURT
SAN JOSE, CA 95134

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