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101
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Patent #:
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Issue Dt:
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12/08/1998
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Application #:
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08856259
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Filing Dt:
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05/14/1997
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Title:
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LC OSCILLATOR WITH DELAY TUNING
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Patent #:
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Issue Dt:
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08/31/1999
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Application #:
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08878162
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Filing Dt:
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06/18/1997
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Title:
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ANALOG DELAY CIRCUIT
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Patent #:
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Issue Dt:
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10/19/1999
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Application #:
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08910456
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Filing Dt:
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08/05/1997
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Title:
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INTEGRATED CIRCUIT TRANSFORMER WITH INDUCTOR SUBSTRATE ISOLATION
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Patent #:
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Issue Dt:
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03/14/2000
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Application #:
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09063526
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Filing Dt:
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04/21/1998
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Title:
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COMPLEMENTARY METAL-OXIDE SEMICONDUCTOR
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Patent #:
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Issue Dt:
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01/11/2000
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Application #:
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09063527
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Filing Dt:
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04/21/1998
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Title:
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CONTROL CIRCUIT FOR A COMPLEMENTARY METAL-OXIDE SEMICONDUCTOR VOLTAGE CONTROLLED OSCILLATOR
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Patent #:
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Issue Dt:
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09/19/2000
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Application #:
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09140840
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Filing Dt:
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08/27/1998
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Title:
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HIGH FREQUENCY CMOS CLOCK RECOVERY CIRCUIT
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Patent #:
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Issue Dt:
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01/28/2003
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Application #:
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09288000
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Filing Dt:
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04/07/1999
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Title:
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APPARATUS AND METHOD FOR MULTIPLE SERIAL DATA SYNCHRONIZATION USING CHANNEL-LOCK FIFO BUFFERS OPTIMIZED FOR JITTER
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Patent #:
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Issue Dt:
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08/22/2000
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Application #:
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09306553
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Filing Dt:
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05/06/1999
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Title:
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INTEGRATED CIRCUIT AND METHOD FOR LOW NOISE FREQUENCY SYNTHESIS
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Patent #:
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Issue Dt:
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01/20/2004
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Application #:
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09420976
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Filing Dt:
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10/20/1999
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Title:
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ELASTIC STORE CIRCUIT WITH STATIC PHASE OFFSET
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Patent #:
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Issue Dt:
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09/30/2003
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Application #:
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09420983
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Filing Dt:
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10/20/1999
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Title:
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ELASTIC STORE CIRCUIT WITH VERNIER CLOCK DELAY
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Patent #:
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Issue Dt:
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06/17/2003
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Application #:
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09483520
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Filing Dt:
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01/14/2000
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Title:
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SYSTEM FOR ASYNCHRONOUSLY TRANSFERRING TIMED DATA USING FIRST AND SECOND CLOCK SIGNALS FOR READING AND WRITING RESPECTIVELY WHEN BOTH CLOCK SIGNALS MAINTAINING PREDETERMINED PHASE OFFSET
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Patent #:
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Issue Dt:
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10/29/2002
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Application #:
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09497253
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Filing Dt:
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02/03/2000
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Title:
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DIFFERENTIAL OUTPUT DRIVER CIRCUIT AND METHOD FOR SAME
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Patent #:
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Issue Dt:
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01/28/2003
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Application #:
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09547689
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Filing Dt:
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04/12/2000
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Title:
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VARIABLE FREQUENCY OSCILLATOR UTILIZING SELECTIVELY COMBINED DUAL DELAY PATHS
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Patent #:
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Issue Dt:
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09/03/2002
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Application #:
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09616125
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Filing Dt:
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07/14/2000
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Title:
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PARTIALLY-SYNCRONOUS HIGH-SPEED COUNTER CIRCUITS
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Patent #:
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Issue Dt:
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07/02/2002
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Application #:
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09662443
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Filing Dt:
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09/15/2000
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Title:
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EQUAL DELAY CURRENT-MODE LOGIC CIRCUIT
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Patent #:
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Issue Dt:
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01/27/2004
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Application #:
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09662444
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Filing Dt:
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09/15/2000
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Title:
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RING OSCILLATOR WITH RANDOM NOISE CANCELLATION
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Patent #:
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Issue Dt:
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08/03/2004
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Application #:
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09665929
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Filing Dt:
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09/20/2000
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Title:
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HALF-RATE PHASE DETECTOR WITH REDUCED TIMING REQUIREMENTS
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Patent #:
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Issue Dt:
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10/07/2003
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Application #:
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09666353
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Filing Dt:
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09/20/2000
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Title:
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PROGRAMMABLE PHASE LOCKED-LOOP FILTER ARCHITECTURE FOR A RANGE SELECTABLE BANDWIDTH
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Patent #:
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Issue Dt:
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01/27/2004
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Application #:
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09667264
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Filing Dt:
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09/22/2000
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Title:
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DUAL-LOOP SYSTEM AND METHOD FOR FREQUENCY ACQUISITION AND TRACKING
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Patent #:
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Issue Dt:
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10/22/2002
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Application #:
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09708819
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Filing Dt:
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11/08/2000
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Title:
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PHASE-LOCKED LOOP SYSTEM AND METHOD USING AN AUTO-RANGING, FREQUENCY SWEEP WINDOW VOLTAGE CONTROLLED OSCILLATOR
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Patent #:
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Issue Dt:
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01/07/2003
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Application #:
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09708915
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Filing Dt:
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11/08/2000
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Title:
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VOLTAGE CONTROLLED OSCILLATOR WITH SELECTABLE FREQUENCY RANGE
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Patent #:
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Issue Dt:
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03/30/2004
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Application #:
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09745764
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Filing Dt:
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12/22/2000
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Title:
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FEEDBACK SYSTEM AND METHOD FOR OPTIMIZING THE RECEPTION OF MULTIDIMENSIONAL DIGITAL FRAME STRUCTURE COMMUNICATIONS
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Patent #:
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Issue Dt:
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01/25/2005
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Application #:
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09745774
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Filing Dt:
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12/22/2000
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Title:
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SYSTEM AND METHOD FOR PROGRAMMING SYNCHRONIZATION CRITERIA IN A MULTIDIMENSIONAL DIGITAL FRAME STRUCTURE
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Patent #:
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Issue Dt:
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08/16/2005
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Application #:
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09745793
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Filing Dt:
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12/22/2000
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Title:
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SYSTEM AND METHOD FOR SELECTIVELY BROADCASTING A MULTIDIMENSIONAL DIGITAL FRAME STRUCTURE
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Patent #:
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Issue Dt:
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05/30/2006
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Application #:
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09746152
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Filing Dt:
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12/22/2000
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Title:
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SYSTEM AND METHOD FOR PROGRAMMING THE QUANTITY OF FRAME SYNCHRONIZATION WORDS IN A MULTIDIMENSIONAL DIGITAL FRAME STRUCTURE
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Patent #:
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Issue Dt:
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01/02/2007
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Application #:
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09746159
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Filing Dt:
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12/22/2000
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Title:
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SYSTEM AND METHOD FOR TRANSLATING OVERHEAD BYTES IN A MULTIDIMENSIONAL DIGITAL FRAME STRUCTURE
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Patent #:
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Issue Dt:
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12/28/2004
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Application #:
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09747072
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Filing Dt:
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12/22/2000
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Title:
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SYSTEM AND METHOD FOR PROGRAMMING LOSS OF SYNCHRONIZATION IN A MULTIDIMENSIONAL DIGITAL FRAME STRUCTURE
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Patent #:
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Issue Dt:
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04/04/2006
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Application #:
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09747124
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Filing Dt:
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12/22/2000
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Title:
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SYSTEM AND METHOD FOR SELECTIVELY SCRAMBLING MULTIDIMENSIONAL DIGITAL FRAME STRUCTURE COMMUNICATIONS
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Patent #:
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Issue Dt:
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03/29/2005
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Application #:
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09753183
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Filing Dt:
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01/02/2001
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Title:
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BIDIRECTIONAL LINE SWITCH RING SYSTEM AND METHOD
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Patent #:
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Issue Dt:
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04/19/2005
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Application #:
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09753184
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Filing Dt:
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01/02/2001
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Title:
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SYSTEM AND METHOD FOR DIAGNOSTIC MULTICAST SWITCHING
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Patent #:
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Issue Dt:
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11/01/2005
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Application #:
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09753185
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Filing Dt:
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01/02/2001
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Title:
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SYSTEM AND METHOD FOR REDUNDANT PATH CONNECTIONS IN DIGITAL COMMUNICATIONS NETWORK
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Patent #:
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Issue Dt:
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10/14/2003
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Application #:
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09760132
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Filing Dt:
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01/12/2001
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Title:
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SYSTEM AND METHOD FOR DETERMINING FREQUENCY TOLERANCE WITHOUT A REFERENCE
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Patent #:
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Issue Dt:
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10/22/2002
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Application #:
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09771241
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Filing Dt:
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01/26/2001
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Title:
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SELECTABLE EQUALIZATION SYSTEM AND METHOD
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Patent #:
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Issue Dt:
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12/28/2004
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Application #:
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09825102
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Filing Dt:
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04/03/2001
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Publication #:
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Pub Dt:
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10/03/2002
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Title:
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DS3 DESYNCHRONIZER WITH A MODULE FOR PROVIDING INFORMLY GAPPED DATA SIGNAL TO A PLL MODULE FOR PROVIDING A SMOOTH OUTPUT DATA SIGNAL
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Patent #:
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Issue Dt:
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05/03/2005
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Application #:
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09875758
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Filing Dt:
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06/06/2001
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Title:
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POINTER GENERATOR DESIGN THAT PROVIDES MULTIPLE OUTPUTS THAT CAN BE SYNCHRONIZED TO DIFFERENT CLOCKS
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Patent #:
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Issue Dt:
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04/19/2005
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Application #:
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09876297
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Filing Dt:
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06/07/2001
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Publication #:
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Pub Dt:
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12/12/2002
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Title:
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POINTER ADJUSTMENT WANDER AND JITTER REDUCTION APPARATUS FOR A DESYNCHRONIZER
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Patent #:
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Issue Dt:
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05/10/2005
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Application #:
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09957162
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Filing Dt:
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09/19/2001
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Title:
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METHODS AND APPARATUS FOR DETERMINING WHETHER ELECTRONIC DEVICES ARE COMMUNICATIVELY COMPATIBLE
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Patent #:
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Issue Dt:
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04/22/2003
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Application #:
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09966388
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Filing Dt:
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09/27/2001
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Title:
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SOURCE FOLLOWER FOR LOW VOLTAGE DIFFERENTIAL SIGNALING
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Patent #:
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Issue Dt:
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03/25/2003
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Application #:
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09982156
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Filing Dt:
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10/18/2001
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Title:
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METHODS AND APPARATUS FOR PRODUCING A REFERENCE FREQUENCY SIGNAL WITH USE OF A REFERENCE FREQUENCY QUADRUPLER HAVING FREQUENCY SELECTION CONTROLS
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Patent #:
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Issue Dt:
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05/03/2005
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Application #:
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10016540
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Filing Dt:
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10/26/2001
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Title:
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PARALLEL DATA BUS WITH BIT POSITION ENCODED ON THE CLOCK WIRE
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Patent #:
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Issue Dt:
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04/04/2006
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Application #:
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10020426
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Filing Dt:
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12/07/2001
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Publication #:
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Pub Dt:
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06/12/2003
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Title:
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SYSTEM AND METHOD FOR NON - CAUSAL CHANNEL EQUALIZATION
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Patent #:
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Issue Dt:
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06/21/2005
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Application #:
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10023019
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Filing Dt:
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12/18/2001
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Title:
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SYSTEM AND METHOD FOR SECURE NETWORK PROVISIONING BY LOCKING TO PREVENT LOADING OF SUBSEQUENTLY RECEIVED CONFIGURATION DATA
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Patent #:
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Issue Dt:
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06/06/2006
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Application #:
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10023675
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Filing Dt:
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12/18/2001
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Title:
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SYSTEM AND METHOD FOR PARALLELING DIGITAL WRAPPER DATA STREAMS
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Patent #:
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Issue Dt:
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05/02/2006
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Application #:
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10036951
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Filing Dt:
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12/21/2001
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Title:
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BUFFER SEMAPHORE SYSTEM AND METHOD
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Patent #:
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Issue Dt:
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01/14/2003
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Application #:
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10044320
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Filing Dt:
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01/10/2002
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Title:
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SYSTEM AND METHOD FOR MEASURING PSEUDORANDOM NRZ DATA STREAM RATES
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Patent #:
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Issue Dt:
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04/22/2008
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Application #:
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10054525
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Filing Dt:
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01/22/2002
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Title:
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TRANSMISSION OF DATA FRAMES AS A PLURALITY OF SUBFRAMES OVER A PLURALITY OF CHANNELS
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Patent #:
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Issue Dt:
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12/16/2003
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Application #:
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10061735
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Filing Dt:
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01/31/2002
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Title:
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WIDE-BANDWIDTH DIFFERENTIAL SIGNAL AMPLIFIER
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Patent #:
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Issue Dt:
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11/01/2005
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Application #:
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10066966
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Filing Dt:
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02/04/2002
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Title:
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SYSTEMS AND METHODS FOR NON-CAUSAL CHANNEL EQUALIZATION IN AN ASYMMETRICAL NOISE ENVIRONMENT
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Patent #:
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Issue Dt:
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09/12/2006
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Application #:
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10077274
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Filing Dt:
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02/15/2002
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Title:
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SYSTEM AND METHOD FOR ADJUSTING A NON-RETURN TO ZERO DATA STREAM INPUT THRESHOLD
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Patent #:
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Issue Dt:
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07/05/2005
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Application #:
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10077332
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Filing Dt:
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02/15/2002
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Title:
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SYSTEM AND METHOD FOR NON-CAUSAL CHANNEL EQUALIZATION USING ERROR STATISTIC DRIVEN THRESHOLDS
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Patent #:
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Issue Dt:
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01/10/2006
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Application #:
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10083942
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Filing Dt:
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02/27/2002
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Title:
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SYSTEM AND METHOD FOR GENERATING A REFERENCE CLOCK
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Patent #:
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Issue Dt:
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05/20/2003
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Application #:
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10085458
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Filing Dt:
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02/26/2002
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Title:
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CONFIGURABLE TRIPLE PHASE-LOCKED LOOP CIRCUIT AND METHOD
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Patent #:
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Issue Dt:
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04/08/2003
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Application #:
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10085613
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Filing Dt:
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02/26/2002
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Title:
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CONFIGURABLE MULTIPLEXING CIRCUIT AND METHOD
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Patent #:
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Issue Dt:
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10/24/2006
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Application #:
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10092064
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Filing Dt:
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03/05/2002
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Publication #:
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Pub Dt:
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09/11/2003
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Title:
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SYSTEM TO PROVIDE FRACTIONAL BANDWIDTH DATA COMMUNICATIONS SERVICES
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Patent #:
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Issue Dt:
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07/22/2003
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Application #:
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10114835
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Filing Dt:
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04/03/2002
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Title:
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CASCADABLE FREQUENCY DOUBLER HAVING STABLE OPERATION OVER VARIED MANUFACTURING PROCESSES AND ENVIRONMENTAL OPERATING CONDITIONS
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07/15/2003
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Application #:
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10115359
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Filing Dt:
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04/03/2002
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Title:
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PRECISION DIGITAL DELAY ELEMENT HAVING STABLE OPERATION OVER VARIED MANUFACTURING PROCESSES AND ENVIRONMENTAL OPERATING CONDITIONS
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Issue Dt:
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11/21/2006
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Application #:
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10120598
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Filing Dt:
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04/09/2002
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Title:
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DISTRIBUTED CLOCK NETWORK USING ALL-DIGITAL MASTER-SLAVE DELAY LOCK LOOPS
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Patent #:
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Issue Dt:
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11/23/2004
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Application #:
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10121013
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Filing Dt:
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04/09/2002
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Title:
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NO RESONANCE MODE BANG-BANG PHASE DETECTOR
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Issue Dt:
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12/02/2003
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Application #:
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10132425
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Filing Dt:
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04/25/2002
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Title:
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METHOD AND CIRCUIT TO REDUCE JITTER GENERATION IN A PLL USING A REFERENCE QUADRUPLER, EQUALIZER, AND PHASE DETECTOR WITH CONTROL FOR MULTIPLE FREQUENCIES
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05/25/2004
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Application #:
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10132462
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Filing Dt:
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04/25/2002
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Title:
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METHOD AND CIRCUIT TO REDUCE JITTER GENERATION IN A PLL USING A REFERENCE QUADRUPLER AND AN EQUALIZER
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04/13/2004
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10132463
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Filing Dt:
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04/25/2002
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Title:
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METHOD AND CIRCUIT FOR PRODUCING A REFERENCE FREQUENCY SIGNAL USING A REFERENCE FREQUENCY DOUBLER HAVING FREQUENCY SELECTION CONTROLS
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Patent #:
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05/20/2003
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10135112
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Filing Dt:
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04/30/2002
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Title:
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INTEGRATED XOR/MULTIPLEXER FOR HIGH SPEED PHASE DETECTION
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Patent #:
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Issue Dt:
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11/04/2003
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Application #:
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10135415
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Filing Dt:
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04/30/2002
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Title:
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INTEGRATED XOR/SUMMER/MULTIPLEXER FOR HIGH SPEED PHASE DETECTION
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Patent #:
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Issue Dt:
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11/21/2006
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Application #:
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10150301
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Filing Dt:
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05/17/2002
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Title:
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SYSTEM AND METHOD FOR FIVE-LEVEL NON-CASUAL CHANNEL EQUALIZATION
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Patent #:
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Issue Dt:
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12/04/2007
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Application #:
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10151792
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Filing Dt:
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05/21/2002
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Publication #:
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Pub Dt:
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11/27/2003
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Title:
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PROTOCOL-MAPPING NETWORK ACCESS DEVICE WITH USER-PROVISIONABLE WIDE AREA NETWORK FLOW CONTROL
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Patent #:
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Issue Dt:
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09/12/2006
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Application #:
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10170994
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06/13/2002
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Title:
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DIGITAL INFORMATION HIDING TECHNIQUES FOR USE WITH DATA STREAMS CARRIED OVER A DATA COMMUNICATION NETWORK
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Patent #:
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05/16/2006
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10193961
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07/12/2002
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Publication #:
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Pub Dt:
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06/12/2003
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SYSTEM AND METHOD FOR TEMPORAL ANALYSIS OF SERIAL DATA
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Patent #:
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Issue Dt:
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05/09/2006
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Application #:
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10193962
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Filing Dt:
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07/12/2002
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Publication #:
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Pub Dt:
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01/15/2004
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Title:
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FULL RATE ERROR DETECTION CIRCUIT FOR USE WITH EXTERNAL CIRCUITRY
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Patent #:
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Issue Dt:
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06/01/2004
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Application #:
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10217215
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Filing Dt:
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08/12/2002
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Title:
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SYSTEM AND METHOD FOR COMPARATOR THRESHOLD ADJUSTMENT
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Patent #:
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Issue Dt:
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09/05/2006
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Application #:
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10218804
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Filing Dt:
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08/14/2002
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Title:
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SYSTEM AND METHOD FOR HALF-RATE CLOCK PHASE DETECTION
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Patent #:
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Issue Dt:
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02/24/2004
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Application #:
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10218946
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Filing Dt:
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08/14/2002
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Title:
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SYSTEM AND METHOD FOR VOLTAGE CONTROLLED OSCILLATOR PHASE INTERPOLATION
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Patent #:
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Issue Dt:
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05/30/2006
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Application #:
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10262334
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Filing Dt:
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10/01/2002
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Publication #:
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Pub Dt:
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06/12/2003
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Title:
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FEED-FORWARD/FEEDBACK SYSTEM AND METHOD FOR NON-CAUSAL CHANNEL EQUALIZATION
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Patent #:
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Issue Dt:
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09/09/2003
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Application #:
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10282547
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Filing Dt:
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10/29/2002
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Title:
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SYSTEM AND METHOD FOR THRESHOLD BIAS OFFSET VOLTAGE CANCELLATION IN A COMPARATOR
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Patent #:
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Issue Dt:
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12/19/2006
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Application #:
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10290127
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Filing Dt:
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11/07/2002
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Title:
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HOGGE PHASE DETECTOR WITH ADJUSTABLE PHASE OUTPUT
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Patent #:
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Issue Dt:
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12/12/2006
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Application #:
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10317439
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Filing Dt:
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12/12/2002
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Title:
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NON-CAUSAL CHANNEL EQUALIZATION
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Patent #:
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Issue Dt:
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09/05/2006
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Application #:
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10324615
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Filing Dt:
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12/18/2002
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Title:
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DC BALANCED ERROR CORRECTION CODING
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Patent #:
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Issue Dt:
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05/01/2007
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Application #:
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10346550
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Filing Dt:
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01/17/2003
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Publication #:
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Pub Dt:
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12/11/2003
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Title:
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JITTER AND WANDER REDUCTION APPARATUS
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Patent #:
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Issue Dt:
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04/05/2005
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Application #:
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10382638
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Filing Dt:
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03/05/2003
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Title:
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DUAL VOLTAGE-CONTROLLED OSCILLATOR STRUCTURE WITH POWER-DOWN FEATURE
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Patent #:
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Issue Dt:
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03/27/2007
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Application #:
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10382954
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Filing Dt:
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03/05/2003
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Title:
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SERIALIZER WITH PROGRAMMABLE DELAY ELEMENTS
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Patent #:
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Issue Dt:
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11/22/2005
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Application #:
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10383400
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Filing Dt:
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03/07/2003
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Title:
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PHASE ADJUSTMENT SYSTEM AND METHOD FOR NON-CAUSAL CHANNEL EQUALIZATION
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Patent #:
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Issue Dt:
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06/28/2005
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Application #:
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10387014
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Filing Dt:
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03/11/2003
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Title:
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CIRCUIT WITH VOLTAGE CLAMPING FOR BIAS TRANSISTOR TO ALLOW POWER SUPPLY OVER-VOLTAGE
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Patent #:
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Issue Dt:
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08/07/2007
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Application #:
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10394844
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Filing Dt:
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03/21/2003
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Title:
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DIGITALLY ADJUSTED HIGH SPEED ANALOG EQUALIZER
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Patent #:
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Issue Dt:
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03/31/2009
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Application #:
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10395843
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Filing Dt:
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03/24/2003
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Publication #:
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Pub Dt:
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10/14/2004
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Title:
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10 GBE LAN SIGNAL MAPPING TO OTU2 SIGNAL
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Patent #:
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Issue Dt:
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09/21/2004
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Application #:
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10402022
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Filing Dt:
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03/27/2003
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Title:
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LOOP-BACK CLOCK PHASE GENERATOR
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Patent #:
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Issue Dt:
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11/30/2004
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Application #:
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10403606
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Filing Dt:
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03/31/2003
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Title:
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HIGH-PERFORMANCE LOW-NOISE CHARGE-PUMP FOR VOLTAGE CONTROLLED OSCILLATOR APPLICATIONS
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Patent #:
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Issue Dt:
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10/30/2007
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Application #:
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10413167
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Filing Dt:
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04/14/2003
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Title:
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SYSTEM AND METHOD FOR CODING A DIGITAL WRAPPER FRAME
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Patent #:
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Issue Dt:
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01/22/2008
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Application #:
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10638340
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Filing Dt:
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08/12/2003
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Publication #:
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Pub Dt:
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12/23/2004
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Title:
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DIFFERENTIAL RECEIVER CIRCUIT WITH ELECTRONIC DISPERSION COMPENSATION FOR OPTICAL COMMUNICATIONS SYSTEMS
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Patent #:
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Issue Dt:
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02/27/2007
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Application #:
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10638386
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Filing Dt:
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08/12/2003
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Publication #:
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Pub Dt:
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12/23/2004
| | | | |
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Title:
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HIGH SPEED CIRCUITS FOR ELECTRONIC DISPERSION COMPENSATION
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Patent #:
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Issue Dt:
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03/13/2007
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Application #:
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10638387
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Filing Dt:
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08/12/2003
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Publication #:
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Pub Dt:
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12/23/2004
| | | | |
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Title:
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DIFFERENTIAL RECEIVER CIRCUIT WITH ELECTRONIC DISPERSION COMPENSATION
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Patent #:
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Issue Dt:
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04/17/2007
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Application #:
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10652333
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Filing Dt:
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08/29/2003
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Title:
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MODIFIED GAIN NON-CAUSAL CHANNEL EQUALIZATION USING FEED-FORWARD AND FEEDBACK COMPENSATION
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Patent #:
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Issue Dt:
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06/06/2006
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Application #:
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10823060
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Filing Dt:
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04/13/2004
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Title:
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HIGH SPEED LINEAR HALF-RATE PHASE DETECTOR
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Patent #:
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Issue Dt:
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05/05/2009
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Application #:
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10984231
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Filing Dt:
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11/08/2004
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Publication #:
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Pub Dt:
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02/16/2006
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Title:
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CIRCUIT FOR ADAPTIVE SAMPLING EDGE POSITION CONTROL AND A METHOD THEREFOR
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Patent #:
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Issue Dt:
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07/14/2009
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Application #:
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11395858
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Filing Dt:
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03/31/2006
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Publication #:
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Pub Dt:
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10/04/2007
| | | | |
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Title:
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OPTICAL TRANSCEIVER WITH ELECTRICAL RING DISTRIBUTION INTERFACE
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Patent #:
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Issue Dt:
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01/06/2009
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Application #:
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11402750
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Filing Dt:
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04/12/2006
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Publication #:
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Pub Dt:
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10/18/2007
| | | | |
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Title:
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TIMER WITH PERIODIC CHANNEL SERVICE
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Patent #:
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Issue Dt:
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09/15/2009
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Application #:
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11525656
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Filing Dt:
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09/22/2006
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Publication #:
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Pub Dt:
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03/27/2008
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Title:
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SAMPLED ACCUMULATION SYSTEM AND METHOD FOR JITTER ATTENUATION
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Patent #:
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Issue Dt:
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11/25/2008
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Application #:
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11541176
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Filing Dt:
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09/29/2006
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Publication #:
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Pub Dt:
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01/25/2007
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Title:
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TIMESHARED JITTER ATTENUATOR IN MULTI-CHANNEL MAPPING APPLICATIONS
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Patent #:
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Issue Dt:
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10/21/2008
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Application #:
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11648920
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Filing Dt:
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01/03/2007
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Publication #:
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Pub Dt:
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05/17/2007
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Title:
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MODULATED JITTER ATTENUATION FILTER
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Patent #:
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Issue Dt:
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04/28/2009
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Application #:
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11888921
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Filing Dt:
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08/04/2007
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Publication #:
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Pub Dt:
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02/05/2009
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Title:
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MULTI-LEVEL SLEW AND SWING CONTROL BUFFER
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Patent #:
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Issue Dt:
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07/21/2009
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Application #:
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12040765
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Filing Dt:
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02/29/2008
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Title:
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THERMAL ELECTRIC LOGIC CIRCUIT
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Patent #:
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Issue Dt:
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02/09/2010
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Application #:
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12120109
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05/13/2008
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Publication #:
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Pub Dt:
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08/20/2009
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Title:
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THERMAL ELECTRIC NOR GATE
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