Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
|
| Reel/Frame: | 042487/0530 | |
| Pages: | 6 |
| | Recorded: | 05/17/2017 | | |
| Attorney Dkt #: | YOR920150014US2(864 CON) |
| Conveyance: | CORRECTIVE ASSIGNMENT TO CORRECT THE INVENTOR (4), DEVENDRA K. SADANA, SIGNATURE DATE PREVIOUSLY RECORDED ON REEL 041476 FRAME 0072. ASSIGNOR(S) HEREBY CONFIRMS THE INVENTOR, DEVENDRA K. SADANA'S SIGNATURE DATE SHOULD BE 02/05/2015 NOT 02/25/2015. |
|
|
Total properties:
1
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/31/2018
|
Application #:
|
15450649
|
Filing Dt:
|
03/06/2017
|
|
Publication #:
|
|
Pub Dt:
|
06/22/2017
| | | | |
|
Title:
|
JUNCTION INTERLAYER DIELECTRIC FOR REDUCING LEAKAGE CURRENT IN SEMICONDUCTOR DEVICES
|
|
|
Assignee
|
|
|
|
|
| NEW ORCHARD ROAD |
| ARMONK, NEW YORK 10504 |
|
|
Correspondence name and address
|
| |
TUTUNJIAN & BITETTO, P.C.
|
| |
NEW ORCHARD ROAD
|
| |
ARMONK, NY 10504
|
Search Results as of:
05/09/2024 09:55 PM
If you have any comments or questions concerning the data displayed,
contact
PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified:
August 25, 2017 v.2.6
|
