skip navigationU S P T O SealUnited States Patent and Trademark Office AOTW logo
Home|Site Index|Search|Guides|Contacts|eBusiness|eBiz alerts|News|Help
Assignments on the Web > Patent Query
Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:042719/0315   Pages: 3
Recorded: 06/15/2017
Attorney Dkt #:109676.70409US
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 1
1
Patent #:
Issue Dt:
07/02/2019
Application #:
15622805
Filing Dt:
06/14/2017
Publication #:
Pub Dt:
12/21/2017
Title:
Semiconductor LSI Design Device and Design Method
Assignors
1
Exec Dt:
04/24/2017
2
Exec Dt:
04/24/2017
3
Exec Dt:
05/16/2017
4
Exec Dt:
04/26/2017
5
Exec Dt:
04/26/2017
6
Exec Dt:
04/26/2017
7
Exec Dt:
04/25/2017
Assignee
1
6-6, MARUNOUCHI 1-CHOME
CHIYODA-KU, TOKYO, JAPAN
Correspondence name and address
CROWELL & MORING LLP
1001 PENNSYLVANIA AVENUE, N.W.
WASHINGTON, DC 20004

Search Results as of: 04/28/2024 11:30 PM
If you have any comments or questions concerning the data displayed, contact PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified: August 25, 2017 v.2.6
| .HOME | INDEX| SEARCH | eBUSINESS | CONTACT US | PRIVACY STATEMENT