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Reel/Frame:043638/0393   Pages: 11
Recorded: 09/20/2017
Attorney Dkt #:T&A-GEN/Z-1704(USMA)-3951
Conveyance: MERGER (SEE DOCUMENT FOR DETAILS).
Total properties: 13
1
Patent #:
Issue Dt:
05/24/2005
Application #:
10440102
Filing Dt:
05/19/2003
Publication #:
Pub Dt:
12/04/2003
Title:
FABRICATION METHOD OF SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE
2
Patent #:
Issue Dt:
05/02/2006
Application #:
10682028
Filing Dt:
10/10/2003
Publication #:
Pub Dt:
08/26/2004
Title:
FABRICATION METHOD OF SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
3
Patent #:
Issue Dt:
03/21/2006
Application #:
10812869
Filing Dt:
03/31/2004
Publication #:
Pub Dt:
01/13/2005
Title:
METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE
4
Patent #:
Issue Dt:
09/18/2007
Application #:
10901999
Filing Dt:
07/30/2004
Publication #:
Pub Dt:
03/24/2005
Title:
METHOD OF FABRICATION OF SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
5
Patent #:
Issue Dt:
04/01/2008
Application #:
11000415
Filing Dt:
12/01/2004
Publication #:
Pub Dt:
05/05/2005
Title:
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND IMAGING SYSTEM
6
Patent #:
Issue Dt:
05/27/2008
Application #:
11320888
Filing Dt:
12/30/2005
Publication #:
Pub Dt:
05/18/2006
Title:
FABRICATION METHOD OF SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
7
Patent #:
Issue Dt:
07/20/2010
Application #:
11837168
Filing Dt:
08/10/2007
Publication #:
Pub Dt:
12/13/2007
Title:
FABRICATION METHOD OF SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
8
Patent #:
Issue Dt:
11/04/2014
Application #:
11969154
Filing Dt:
01/03/2008
Publication #:
Pub Dt:
06/05/2008
Title:
SEMICONDUCTOR DEVICE HAVING STRAINED SILICON FILM
9
Patent #:
Issue Dt:
03/23/2010
Application #:
12118348
Filing Dt:
05/09/2008
Publication #:
Pub Dt:
01/01/2009
Title:
FABRICATION METHOD OF SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
10
Patent #:
Issue Dt:
02/21/2012
Application #:
12729102
Filing Dt:
03/22/2010
Publication #:
Pub Dt:
09/16/2010
Title:
FABRICATION METHOD OF SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
11
Patent #:
Issue Dt:
01/04/2011
Application #:
12836432
Filing Dt:
07/14/2010
Publication #:
Pub Dt:
11/04/2010
Title:
FABRICATION METHOD OF SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
12
Patent #:
Issue Dt:
12/13/2011
Application #:
12956524
Filing Dt:
11/30/2010
Publication #:
Pub Dt:
03/24/2011
Title:
FABRICATION METHOD OF SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
13
Patent #:
Issue Dt:
02/04/2014
Application #:
13607864
Filing Dt:
09/10/2012
Publication #:
Pub Dt:
12/27/2012
Title:
FABRICATION METHOD OF SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
Assignor
1
Exec Dt:
10/01/2013
Assignee
1
11-3, SHINBASHI 5-CHOME, MINATO-KU
TOKYO, JAPAN
Correspondence name and address
MATTINGLY & MALUR, PC
1800 DIAGONAL ROAD
SUITE 210
ALEXANDRIA, VA 22314

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