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Reel/Frame:044209/0047   Pages: 69
Recorded: 09/21/2017
Attorney Dkt #:FSL NXP CORRECTIVE ASSGN
Conveyance: CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE PREVIOUSLY RECORDED AT REEL: 040632 FRAME: 0001. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME.
Total properties: 1087
Page 1 of 11
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1
Patent #:
6319730
Issue Dt:
11/20/2001
Application #:
09354522
Filing Dt:
07/15/1999
Title:
METHOD OF FABRICATING A SEMICONDUCTOR STRUCTURE INCLUDING A METAL OXIDE INTERFACE
2
Patent #:
6291319
Issue Dt:
09/18/2001
Application #:
09465622
Filing Dt:
12/17/1999
Title:
METHOD FOR FABRICATING A SEMICONDUCTOR STRUCTURE HAVING A STABLE CRYSTALLINE INTERFACE WITH SILICON
3
Patent #:
6392257
Issue Dt:
05/21/2002
Application #:
09502023
Filing Dt:
02/10/2000
Title:
SEMICONDUCTOR STRUCTURE, SEMICONDUCTOR DEVICE, COMMUNICATING DEVICE, INTEGRATED CIRCUIT, AND PROCESS FOR FABRICATING THE SAME
4
Patent #:
6693033
Issue Dt:
02/17/2004
Application #:
09983854
Filing Dt:
10/26/2001
Publication #:
US20020072253
Pub Dt:
06/13/2002
Title:
METHOD OF REMOVING AN AMORPHOUS OXIDE FROM A MONOCRYSTALLINE SURFACE
5
Patent #:
7067856
Issue Dt:
06/27/2006
Application #:
10768108
Filing Dt:
02/02/2004
Publication #:
US20040149203
Pub Dt:
08/05/2004
Title:
SEMICONDUCTOR STRUCTURE, SEMICONDUCTOR DEVICE, COMMUNICATING DEVICE, INTEGRATED CIRCUIT, AND PROCESS FOR FABRICATING THE SAME
6
Patent #:
7547505
Issue Dt:
06/16/2009
Application #:
11038838
Filing Dt:
01/20/2005
Publication #:
US20060160034
Pub Dt:
07/20/2006
Title:
METHODS OF FORMING CAPPING LAYERS ON REFLECTIVE MATERIALS
7
Patent #:
8307196
Issue Dt:
11/06/2012
Application #:
11278725
Filing Dt:
04/05/2006
Publication #:
US20070239968
Pub Dt:
10/11/2007
Title:
DATA PROCESSING SYSTEM HAVING BIT EXACT INSTRUCTIONS AND METHODS THEREFOR
8
Patent #:
7365587
Issue Dt:
04/29/2008
Application #:
11279018
Filing Dt:
04/07/2006
Publication #:
US20070236263
Pub Dt:
10/11/2007
Title:
CONTENTION-FREE KEEPER CIRCUIT AND A METHOD FOR CONTENTION ELIMINATION
9
Patent #:
7391659
Issue Dt:
06/24/2008
Application #:
11341809
Filing Dt:
01/27/2006
Publication #:
US20070177440
Pub Dt:
08/02/2007
Title:
METHOD FOR MULTIPLE STEP PROGRAMMING A MEMORY CELL
10
Patent #:
7317222
Issue Dt:
01/08/2008
Application #:
11341813
Filing Dt:
01/27/2006
Publication #:
US20070176226
Pub Dt:
08/02/2007
Title:
MEMORY CELL USING A DIELECTRIC HAVING NON-UNIFORM THICKNESS
11
Patent #:
7767588
Issue Dt:
08/03/2010
Application #:
11364128
Filing Dt:
02/28/2006
Publication #:
US20070202708
Pub Dt:
08/30/2007
Title:
METHOD FOR FORMING A DEPOSITED OXIDE LAYER
12
Patent #:
7439105
Issue Dt:
10/21/2008
Application #:
11366279
Filing Dt:
03/02/2006
Publication #:
US20070207603
Pub Dt:
09/06/2007
Title:
METAL GATE WITH ZIRCONIUM
13
Patent #:
7483327
Issue Dt:
01/27/2009
Application #:
11366286
Filing Dt:
03/02/2006
Publication #:
US20070220388
Pub Dt:
09/20/2007
Title:
APPARATUS AND METHOD FOR ADJUSTING AN OPERATING PARAMETER OF AN INTEGRATED CIRCUIT
14
Patent #:
7289352
Issue Dt:
10/30/2007
Application #:
11372495
Filing Dt:
03/10/2006
Publication #:
US20070211516
Pub Dt:
09/13/2007
Title:
SEMICONDUCTOR STORAGE DEVICE
15
Patent #:
7479422
Issue Dt:
01/20/2009
Application #:
11373536
Filing Dt:
03/10/2006
Publication #:
US20070210314
Pub Dt:
09/13/2007
Title:
SEMICONDUCTOR DEVICE WITH STRESSORS AND METHOD THEREFOR
16
Patent #:
7442590
Issue Dt:
10/28/2008
Application #:
11380530
Filing Dt:
04/27/2006
Publication #:
US20070254435
Pub Dt:
11/01/2007
Title:
METHOD FOR FORMING A SEMICONDUCTOR DEVICE HAVING A FIN AND STRUCTURE THEREOF
17
Patent #:
7430151
Issue Dt:
09/30/2008
Application #:
11392402
Filing Dt:
03/29/2006
Publication #:
US20070237021
Pub Dt:
10/11/2007
Title:
MEMORY WITH CLOCKED SENSE AMPLIFIER
18
Patent #:
7498864
Issue Dt:
03/03/2009
Application #:
11397747
Filing Dt:
04/04/2006
Publication #:
US20070229141
Pub Dt:
10/04/2007
Title:
ELECTRONIC FUSE FOR OVERCURRENT PROTECTION
19
Patent #:
7555075
Issue Dt:
06/30/2009
Application #:
11400458
Filing Dt:
04/07/2006
Publication #:
US20070237271
Pub Dt:
10/11/2007
Title:
ADJUSTABLE NOISE SUPPRESSION SYSTEM
20
Patent #:
7525866
Issue Dt:
04/28/2009
Application #:
11406585
Filing Dt:
04/19/2006
Publication #:
US20070247886
Pub Dt:
10/25/2007
Title:
MEMORY CIRCUIT
21
Patent #:
7829447
Issue Dt:
11/09/2010
Application #:
11419304
Filing Dt:
05/19/2006
Publication #:
US20070269969
Pub Dt:
11/22/2007
Title:
SEMICONDUCTOR STRUCTURE PATTERN FORMATION
22
Patent #:
7615866
Issue Dt:
11/10/2009
Application #:
11419798
Filing Dt:
05/23/2006
Publication #:
US20070275549
Pub Dt:
11/29/2007
Title:
CONTACT SURROUNDED BY PASSIVATION AND POLYMIDE AND METHOD THEREFOR
23
Patent #:
7369450
Issue Dt:
05/06/2008
Application #:
11420558
Filing Dt:
05/26/2006
Publication #:
US20070279990
Pub Dt:
12/06/2007
Title:
NONVOLATILE MEMORY HAVING LATCHING SENSE AMPLIFIER AND METHOD OF OPERATION
24
Patent #:
7279959
Issue Dt:
10/09/2007
Application #:
11420559
Filing Dt:
05/26/2006
Title:
CHARGE PUMP SYSTEM WITH REDUCED RIPPLE AND METHOD THEREFOR
25
Patent #:
7386821
Issue Dt:
06/10/2008
Application #:
11423240
Filing Dt:
06/09/2006
Publication #:
US20080005717
Pub Dt:
01/03/2008
Title:
PRIMITIVE CELL METHOD FOR FRONT END PHYSICAL DESIGN
26
Patent #:
7985122
Issue Dt:
07/26/2011
Application #:
11423760
Filing Dt:
06/13/2006
Publication #:
US20070287361
Pub Dt:
12/13/2007
Title:
METHOD OF POLISHING A LAYER USING A POLISHING PAD
27
Patent #:
7292495
Issue Dt:
11/06/2007
Application #:
11427610
Filing Dt:
06/29/2006
Title:
INTEGRATED CIRCUIT HAVING A MEMORY WITH LOW VOLTAGE READ/WRITE OPERATION
28
Patent #:
7629220
Issue Dt:
12/08/2009
Application #:
11428038
Filing Dt:
06/30/2006
Publication #:
US20080003725
Pub Dt:
01/03/2008
Title:
METHOD FOR FORMING A SEMICONDUCTOR DEVICE AND STRUCTURE THEREOF
29
Patent #:
7675806
Issue Dt:
03/09/2010
Application #:
11435942
Filing Dt:
05/17/2006
Publication #:
US20070280026
Pub Dt:
12/06/2007
Title:
LOW VOLTAGE MEMORY DEVICE AND METHOD THEREOF
30
Patent #:
7649781
Issue Dt:
01/19/2010
Application #:
11435944
Filing Dt:
05/17/2006
Publication #:
US20080043525
Pub Dt:
02/21/2008
Title:
BIT CELL REFERENCE DEVICE AND METHODS THEREOF
31
Patent #:
7647573
Issue Dt:
01/12/2010
Application #:
11442196
Filing Dt:
05/26/2006
Publication #:
US20070277135
Pub Dt:
11/29/2007
Title:
METHOD AND DEVICE FOR TESTING DELAY PATHS OF AN INTEGRATED CIRCUIT
32
Patent #:
7611955
Issue Dt:
11/03/2009
Application #:
11454403
Filing Dt:
06/15/2006
Publication #:
US20070293013
Pub Dt:
12/20/2007
Title:
METHOD OF FORMING A BIPOLAR TRANSISTOR AND SEMICONDUCTOR COMPONENT THEREOF
33
Patent #:
7442616
Issue Dt:
10/28/2008
Application #:
11454654
Filing Dt:
06/15/2006
Publication #:
US20070290231
Pub Dt:
12/20/2007
Title:
METHOD OF MANUFACTURING A BIPOLAR TRANSISTOR AND BIPOLAR TRANSISTOR THEREOF
34
Patent #:
7638386
Issue Dt:
12/29/2009
Application #:
11455025
Filing Dt:
06/15/2006
Publication #:
US20070293004
Pub Dt:
12/20/2007
Title:
INTEGRATED CMOS AND BIPOLAR DEVICES METHOD AND STRUCTURE
35
Patent #:
7545702
Issue Dt:
06/09/2009
Application #:
11459170
Filing Dt:
07/21/2006
Publication #:
US20080022064
Pub Dt:
01/24/2008
Title:
MEMORY PIPELINING IN AN INTEGRATED CIRCUIT MEMORY DEVICE USING SHARED WORDLINES
36
Patent #:
7627795
Issue Dt:
12/01/2009
Application #:
11460086
Filing Dt:
07/26/2006
Publication #:
US20080052572
Pub Dt:
02/28/2008
Title:
PIPELINED DATA PROCESSOR WITH DETERMINISTIC SIGNATURE GENERATION
37
Patent #:
7823033
Issue Dt:
10/26/2010
Application #:
11460090
Filing Dt:
07/26/2006
Publication #:
US20080126769
Pub Dt:
05/29/2008
Title:
DATA PROCESSING WITH RECONFIGURABLE REGISTERS
38
Patent #:
7471582
Issue Dt:
12/30/2008
Application #:
11460745
Filing Dt:
07/28/2006
Publication #:
US20080025111
Pub Dt:
01/31/2008
Title:
MEMORY CIRCUIT USING A REFERENCE FOR SENSING
39
Patent #:
7479465
Issue Dt:
01/20/2009
Application #:
11460748
Filing Dt:
07/28/2006
Publication #:
US20080026599
Pub Dt:
01/31/2008
Title:
TRANSFER OF STRESS TO A LAYER
40
Patent #:
7799644
Issue Dt:
09/21/2010
Application #:
11460782
Filing Dt:
07/28/2006
Publication #:
US20080026529
Pub Dt:
01/31/2008
Title:
TRANSISTOR WITH ASYMMETRY FOR DATA STORAGE CIRCUITRY
41
Patent #:
7292485
Issue Dt:
11/06/2007
Application #:
11461200
Filing Dt:
07/31/2006
Title:
SRAM HAVING VARIABLE POWER SUPPLY AND METHOD THEREFOR
42
Patent #:
7668029
Issue Dt:
02/23/2010
Application #:
11464124
Filing Dt:
08/11/2006
Publication #:
US20080037343
Pub Dt:
02/14/2008
Title:
MEMORY HAVING SENSE TIME OF VARIABLE DURATION
43
Patent #:
8191085
Issue Dt:
05/29/2012
Application #:
11467988
Filing Dt:
08/29/2006
Publication #:
US20080126744
Pub Dt:
05/29/2008
Title:
METHOD AND APPARATUS FOR LOADING OR STORING MULTIPLE REGISTERS IN A DATA PROCESSING SYSTEM
44
Patent #:
7523373
Issue Dt:
04/21/2009
Application #:
11468458
Filing Dt:
08/30/2006
Publication #:
US20080082873
Pub Dt:
04/03/2008
Title:
MINIMUM MEMORY OPERATING VOLTAGE TECHNIQUE
45
Patent #:
7443223
Issue Dt:
10/28/2008
Application #:
11468815
Filing Dt:
08/31/2006
Publication #:
US20080054980
Pub Dt:
03/06/2008
Title:
LEVEL SHIFTING CIRCUIT
46
Patent #:
8046567
Issue Dt:
10/25/2011
Application #:
11470721
Filing Dt:
09/07/2006
Publication #:
US20070083738
Pub Dt:
04/12/2007
Title:
MULTI-THREADED PROCESSOR ARCHITECTURE
47
Patent #:
7434039
Issue Dt:
10/07/2008
Application #:
11470728
Filing Dt:
09/07/2006
Publication #:
US20070061633
Pub Dt:
03/15/2007
Title:
COMPUTER PROCESSOR CAPABLE OF RESPONDING WITH COMPARABLE EFFICIENCY TO BOTH SOFTWARE-STATE-INDEPENDENT AND STATE-DEPENDENT EVENTS
48
Patent #:
7910441
Issue Dt:
03/22/2011
Application #:
11489793
Filing Dt:
07/19/2006
Publication #:
US20080121997
Pub Dt:
05/29/2008
Title:
MULTI-GATE SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME
49
Patent #:
7556992
Issue Dt:
07/07/2009
Application #:
11496106
Filing Dt:
07/31/2006
Publication #:
US20080023803
Pub Dt:
01/31/2008
Title:
METHOD FOR FORMING VERTICAL STRUCTURES IN A SEMICONDUCTOR DEVICE
50
Patent #:
7812448
Issue Dt:
10/12/2010
Application #:
11501096
Filing Dt:
08/07/2006
Publication #:
US20080029887
Pub Dt:
02/07/2008
Title:
ELECTRONIC DEVICE INCLUDING A CONDUCTIVE STUD OVER A BONDING PAD REGION
51
Patent #:
7550318
Issue Dt:
06/23/2009
Application #:
11502679
Filing Dt:
08/11/2006
Publication #:
US20080038912
Pub Dt:
02/14/2008
Title:
INTERCONNECT FOR IMPROVED DIE TO SUBSTRATE ELECTRICAL COUPLING
52
Patent #:
7595257
Issue Dt:
09/29/2009
Application #:
11508610
Filing Dt:
08/22/2006
Publication #:
US20080048177
Pub Dt:
02/28/2008
Title:
PROCESS OF FORMING AN ELECTRONIC DEVICE INCLUDING A BARRIER LAYER
53
Patent #:
7704838
Issue Dt:
04/27/2010
Application #:
11510401
Filing Dt:
08/25/2006
Publication #:
US20080050902
Pub Dt:
02/28/2008
Title:
METHOD FOR FORMING AN INDEPENDENT BOTTOM GATE CONNECTION FOR BURIED INTERCONNECTION INCLUDING BOTTOM GATE OF A PLANAR DOUBLE GATE MOSFET
54
Patent #:
7598517
Issue Dt:
10/06/2009
Application #:
11510547
Filing Dt:
08/25/2006
Publication #:
US20080050877
Pub Dt:
02/28/2008
Title:
SUPERJUNCTION TRENCH DEVICE AND METHOD
55
Patent #:
7592230
Issue Dt:
09/22/2009
Application #:
11510552
Filing Dt:
08/25/2006
Publication #:
US20080048258
Pub Dt:
02/28/2008
Title:
TRENCH POWER DEVICE AND METHOD
56
Patent #:
7589945
Issue Dt:
09/15/2009
Application #:
11513638
Filing Dt:
08/31/2006
Publication #:
US20080062596
Pub Dt:
03/13/2008
Title:
DISTRIBUTED ELECTROSTATIC DISCHARGE PROTECTION CIRCUIT WITH VARYING CLAMP SIZE
57
Patent #:
8291417
Issue Dt:
10/16/2012
Application #:
11530051
Filing Dt:
09/08/2006
Publication #:
US20080127187
Pub Dt:
05/29/2008
Title:
TRACE BUFFER WITH A PROCESSOR
58
Patent #:
7554841
Issue Dt:
06/30/2009
Application #:
11534715
Filing Dt:
09/25/2006
Publication #:
US20080073722
Pub Dt:
03/27/2008
Title:
CIRCUIT FOR STORING INFORMATION IN AN INTEGRATED CIRCUIT AND METHOD THEREFOR
59
Patent #:
7414449
Issue Dt:
08/19/2008
Application #:
11538639
Filing Dt:
10/04/2006
Publication #:
US20080084235
Pub Dt:
04/10/2008
Title:
DYNAMIC SCANNABLE LATCH AND METHOD OF OPERATION
60
Patent #:
7678620
Issue Dt:
03/16/2010
Application #:
11538862
Filing Dt:
10/05/2006
Publication #:
US20080085574
Pub Dt:
04/10/2008
Title:
ANTIFUSE ONE TIME PROGRAMMABLE MEMORY ARRAY AND METHOD OF MANUFACTURE
61
Patent #:
7436025
Issue Dt:
10/14/2008
Application #:
11540770
Filing Dt:
09/29/2006
Publication #:
US20080079122
Pub Dt:
04/03/2008
Title:
TERMINATION STRUCTURES FOR SUPER JUNCTION DEVICES
62
Patent #:
7572723
Issue Dt:
08/11/2009
Application #:
11552821
Filing Dt:
10/25/2006
Publication #:
US20080099799
Pub Dt:
05/01/2008
Title:
MICROPAD FOR BONDING AND A METHOD THEREFOR
63
Patent #:
7608898
Issue Dt:
10/27/2009
Application #:
11554851
Filing Dt:
10/31/2006
Publication #:
US20080099808
Pub Dt:
05/01/2008
Title:
ONE TRANSISTOR DRAM CELL STRUCTURE
64
Patent #:
7682912
Issue Dt:
03/23/2010
Application #:
11554859
Filing Dt:
10/31/2006
Publication #:
US20080102607
Pub Dt:
05/01/2008
Title:
III-V COMPOUND SEMICONDUCTOR DEVICE WITH A SURFACE LAYER IN ACCESS REGIONS HAVING CHARGE OF POLARITY OPPOSITE TO CHANNEL CHARGE AND METHOD OF MAKING THE SAME
65
Patent #:
7820519
Issue Dt:
10/26/2010
Application #:
11556544
Filing Dt:
11/03/2006
Publication #:
US20080124889
Pub Dt:
05/29/2008
Title:
PROCESS OF FORMING AN ELECTRONIC DEVICE INCLUDING A CONDUCTIVE STRUCTURE EXTENDING THROUGH A BURIED INSULATING LAYER
66
Patent #:
8188543
Issue Dt:
05/29/2012
Application #:
11556576
Filing Dt:
11/03/2006
Publication #:
US20080122025
Pub Dt:
05/29/2008
Title:
ELECTRONIC DEVICE INCLUDING A CONDUCTIVE STRUCTURE EXTENDING THROUGH A BURIED INSULATING LAYER
67
Patent #:
8390026
Issue Dt:
03/05/2013
Application #:
11559642
Filing Dt:
11/14/2006
Publication #:
US20080111153
Pub Dt:
05/15/2008
Title:
ELECTRONIC DEVICE INCLUDING A HETEROJUNCTION REGION
68
Patent #:
7564716
Issue Dt:
07/21/2009
Application #:
11560554
Filing Dt:
11/16/2006
Publication #:
US20080117685
Pub Dt:
05/22/2008
Title:
MEMORY DEVICE WITH RETAINED INDICATOR OF READ REFERENCE LEVEL
69
Patent #:
7626842
Issue Dt:
12/01/2009
Application #:
11560607
Filing Dt:
11/16/2006
Publication #:
US20080117662
Pub Dt:
05/22/2008
Title:
PHOTON-BASED MEMORY DEVICE AND METHOD THEREOF
70
Patent #:
7696016
Issue Dt:
04/13/2010
Application #:
11561232
Filing Dt:
11/17/2006
Publication #:
US20080116560
Pub Dt:
05/22/2008
Title:
METHOD OF PACKAGING A DEVICE HAVING A TANGIBLE ELEMENT AND DEVICE THEREOF
71
Patent #:
7476563
Issue Dt:
01/13/2009
Application #:
11561241
Filing Dt:
11/17/2006
Publication #:
US20080119013
Pub Dt:
05/22/2008
Title:
METHOD OF PACKAGING A DEVICE USING A DIELECTRIC LAYER
72
Patent #:
7623404
Issue Dt:
11/24/2009
Application #:
11561449
Filing Dt:
11/20/2006
Publication #:
US20080117707
Pub Dt:
05/22/2008
Title:
MEMORY DEVICE HAVING CONCURRENT WRITE AND READ CYCLES AND METHOD THEREOF
73
Patent #:
7571404
Issue Dt:
08/04/2009
Application #:
11566915
Filing Dt:
12/05/2006
Publication #:
US20080134103
Pub Dt:
06/05/2008
Title:
FAST ON-CHIP DECOUPLING CAPACITANCE BUDGETING METHOD AND DEVICE FOR REDUCED POWER SUPPLY NOISE
74
Patent #:
7674656
Issue Dt:
03/09/2010
Application #:
11567249
Filing Dt:
12/06/2006
Publication #:
US20080138938
Pub Dt:
06/12/2008
Title:
DIE POSITIONING FOR PACKAGED INTEGRATED CIRCUITS
75
Patent #:
7630693
Issue Dt:
12/08/2009
Application #:
11600351
Filing Dt:
11/16/2006
Publication #:
US20080119214
Pub Dt:
05/22/2008
Title:
TRANSMITTER WITH IMPROVED POWER EFFICIENCY
76
Patent #:
7598596
Issue Dt:
10/06/2009
Application #:
11602639
Filing Dt:
11/21/2006
Publication #:
US20080116535
Pub Dt:
05/22/2008
Title:
METHODS AND APPARATUS FOR A DUAL-METAL MAGNETIC SHIELD STRUCTURE
77
Patent #:
8569858
Issue Dt:
10/29/2013
Application #:
11613326
Filing Dt:
12/20/2006
Publication #:
US20080150072
Pub Dt:
06/26/2008
Title:
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Title:
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Title:
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Title:
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Title:
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Title:
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Title:
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Assignor
1
FREESCALE SEMICONDUCTOR INC.
Exec Dt:
11/07/2016
Assignee
1
NXP USA, INC.
6501 WILLIAM CANNON DRIVE WEST
AUSTIN, TEXAS 78735
Correspondence name and address
NXP USA, INC.
6501 WILLIAM CANNON DRIVE WEST
AUSTIN, TX 78735

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