Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
|
| Reel/Frame: | 044755/0807 | |
| Pages: | 5 |
| | Recorded: | 01/29/2018 | | |
| Attorney Dkt #: | CD17058 |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
|
|
Total properties:
1
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/26/2019
|
Application #:
|
15848327
|
Filing Dt:
|
12/20/2017
|
|
Publication #:
|
|
Pub Dt:
|
01/24/2019
| | | | |
|
Title:
|
Method of Forming High-Voltage Transistor with Thin Gate Poly
|
|
|
Assignee
|
|
|
|
|
| 198 CHAMPION COURT |
| SAN JOSE, CALIFORNIA 95134 |
|
|
Correspondence name and address
|
| |
CYPRESS SEMICONDUCTOR CORPORATION
|
| |
198 CHAMPION COURT
|
| |
SAN JOSE, CA 95134
|
Search Results as of:
05/09/2024 11:27 PM
If you have any comments or questions concerning the data displayed,
contact
PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified:
August 25, 2017 v.2.6
|
