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Patent Assignment Details
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Reel/Frame:044782/0408   Pages: 5
Recorded: 01/31/2018
Attorney Dkt #:100100.010001
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 2
1
Patent #:
Issue Dt:
11/04/2003
Application #:
10226520
Filing Dt:
08/22/2002
Title:
METHOD OF MANUFACTURING AN INTEGRATED CIRCUIT WITH DIELECTRIC DIFFUSION BARRIER LAYER FORMED BETWEEN INTERCONNECTS AND INTERLAYER DIELECTRIC LAYERS
2
Patent #:
Issue Dt:
12/27/2005
Application #:
10608883
Filing Dt:
06/26/2003
Title:
INTEGRATED CIRCUIT WITH DIELECTRIC DIFFUSION BARRIER LAYER FORMED BETWEEN INTERCONNECTS AND INTERLAYER DIELECTRIC LAYERS
Assignors
1
Exec Dt:
06/01/2001
2
Exec Dt:
05/31/2001
3
Exec Dt:
05/31/2001
Assignee
1
ONE AMD PLACE
P.O. BOX 3453
SUNNYVALE, CALIFORNIA 94088-3453
Correspondence name and address
CHRISTOPHER J. RECKAMP
311 S. WACKER DRIVE
FAEGRE BAKER DANIELS LLP
CHICAGO, IL 60606

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