|
Total properties:
16
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/28/1999
|
Application #:
|
08946760
|
Filing Dt:
|
10/09/1997
|
|
Title:
|
METHOD AND SYSTEM FOR DIMINISHING PHASE SHIFT BETWEEN TWO SIGNALS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/13/2002
|
Application #:
|
08964676
|
Filing Dt:
|
11/05/1997
|
|
Title:
|
METHOD AND APPARATUS FOR PROTECTION SWITCHING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/16/1999
|
Application #:
|
08966606
|
Filing Dt:
|
11/10/1997
|
|
Title:
|
CIRCUITS AND METHODS FOR A PHASE LOCK LOOP FOR SYNCHRONOUS REFERENCE CLOCKS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/05/2000
|
Application #:
|
09013644
|
Filing Dt:
|
01/26/1998
|
|
Title:
|
CIRCUIT AND METHOD FOR SERVICE CLOCK RECOVERY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/10/2001
|
Application #:
|
09026580
|
Filing Dt:
|
02/20/1998
|
|
Title:
|
SHARED MEDIA COMMUNICATIONS IN A VIRTUAL CONNECTION NETWORK
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/18/2002
|
Application #:
|
09026837
|
Filing Dt:
|
02/20/1998
|
|
Title:
|
CIRCUIT AND METHOD FOR SHAPING TRAFFIC IN A VIRTUAL CONNECTION NETWORK
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/15/2001
|
Application #:
|
09027156
|
Filing Dt:
|
02/20/1998
|
|
Title:
|
SYSTEM AND METHOD FOR A RING NETWORK WITH VIRTUAL PATH CONNECTIONS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/25/2005
|
Application #:
|
09376809
|
Filing Dt:
|
08/18/1999
|
|
Title:
|
SHARED MANAGEMENT OF A NETWORK ENTITY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/22/2005
|
Application #:
|
09410402
|
Filing Dt:
|
10/01/1999
|
|
Title:
|
PROTECTION SWITCHING OF VIRTUAL CONNECTIONS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/13/2004
|
Application #:
|
09443662
|
Filing Dt:
|
11/19/1999
|
|
Title:
|
ADAPTIVE CLOCK RECOVERY FOR CIRCUIT EMULATION SERVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/06/2005
|
Application #:
|
09696462
|
Filing Dt:
|
10/25/2000
|
|
Title:
|
PROTECTION SWITCHING OF VIRTUAL CONNECTIONS AT THE DATA LINK LAYER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/26/2002
|
Application #:
|
09727245
|
Filing Dt:
|
11/30/2000
|
|
Publication #:
|
|
Pub Dt:
|
03/29/2001
| | | | |
|
Title:
|
Circuit and method for service clock recovery
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/12/2006
|
Application #:
|
09921945
|
Filing Dt:
|
08/03/2001
|
|
Publication #:
|
|
Pub Dt:
|
04/03/2003
| | | | |
|
Title:
|
CIRCUIT AND METHOD FOR SERVICE CLOCK RECOVERY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/16/2003
|
Application #:
|
10087521
|
Filing Dt:
|
03/01/2002
|
|
Publication #:
|
|
Pub Dt:
|
12/05/2002
| | | | |
|
Title:
|
DIRECT DIGITAL SYNTHESIZER PHASE LOCKED LOOP
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/01/2011
|
Application #:
|
10087610
|
Filing Dt:
|
03/01/2002
|
|
Publication #:
|
|
Pub Dt:
|
12/19/2002
| | | | |
|
Title:
|
DIGITAL PLL WITH CONDITIONAL HOLDOVER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/21/2012
|
Application #:
|
12528718
|
Filing Dt:
|
08/26/2009
|
|
Publication #:
|
|
Pub Dt:
|
06/17/2010
| | | | |
|
Title:
|
CARRIER SYSTEM FOR MOUNTING TELECOMMUNICATION AND DATA TECHNOLOGY DEVICES
|
|
