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Patent Assignment Details
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Reel/Frame:044886/0001   Pages: 107
Recorded: 12/17/2017
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 1129
Page 12 of 12
Pages: 1 2 3 4 5 6 7 8 9 10 11 12
1
Patent #:
7898038
Issue Dt:
03/01/2011
Application #:
12476994
Filing Dt:
06/02/2009
Publication #:
US20090236668
Pub Dt:
09/24/2009
Title:
METHOD TO IMPROVE WRITER LEAKAGE IN SIGE BIPOLAR DEVICE
2
Patent #:
7981305
Issue Dt:
07/19/2011
Application #:
12506090
Filing Dt:
07/20/2009
Publication #:
US20090280585
Pub Dt:
11/12/2009
Title:
HIGH-DENSITY FIELD EMISSION ELEMENTS AND A METHOD FOR FORMING SAID EMISSION ELEMENTS
3
Patent #:
7948036
Issue Dt:
05/24/2011
Application #:
12506746
Filing Dt:
07/21/2009
Publication #:
US20090294856
Pub Dt:
12/03/2009
Title:
I/O AND POWER ESD PROTECTION CIRCUITS BY ENHANCING SUBSTRATE-BIAS IN DEEP-SUBMICRON CMOS PROCESS
4
Patent #:
8318606
Issue Dt:
11/27/2012
Application #:
12546855
Filing Dt:
08/25/2009
Publication #:
US20110053378
Pub Dt:
03/03/2011
Title:
DIELECTRIC ETCHING
5
Patent #:
7927940
Issue Dt:
04/19/2011
Application #:
12555082
Filing Dt:
09/08/2009
Publication #:
US20090325353
Pub Dt:
12/31/2009
Title:
METHOD OF MANUFACTURING A LATERALLY DIFFUSED METAL OXIDE SEMICONDUCTOR DEVICE
6
Patent #:
8021955
Issue Dt:
09/20/2011
Application #:
12574426
Filing Dt:
10/06/2009
Title:
METHOD CHARACTERIZING MATERIALS FOR A TRENCH ISOLATION STRUCTURE HAVING LOW TRENCH PARASITIC CAPACITANCE
7
Patent #:
7911006
Issue Dt:
03/22/2011
Application #:
12610733
Filing Dt:
11/02/2009
Publication #:
US20100044767
Pub Dt:
02/25/2010
Title:
STRUCTURE AND FABRICATION METHOD FOR CAPACITORS INTEGRATIBLE WITH VERTICAL REPLACEMENT GATE TRANSISTORS
8
Patent #:
8039923
Issue Dt:
10/18/2011
Application #:
12616050
Filing Dt:
11/10/2009
Publication #:
US20100061036
Pub Dt:
03/11/2010
Title:
INTERDIGITATED CAPACITORS
9
Patent #:
8106480
Issue Dt:
01/31/2012
Application #:
12652560
Filing Dt:
01/05/2010
Publication #:
US20100102418
Pub Dt:
04/29/2010
Title:
BIPOLAR DEVICE HAVING IMPROVED CAPACITANCE
10
Patent #:
NONE
Issue Dt:
Application #:
12680017
Filing Dt:
03/25/2010
Publication #:
US20100264478
Pub Dt:
10/21/2010
Title:
METHOD TO REDUCE TRENCH CAPACITOR LEAKAGE FOR RANDOM ACCESS MEMORY DEVICE
11
Patent #:
8030199
Issue Dt:
10/04/2011
Application #:
12689749
Filing Dt:
01/19/2010
Publication #:
US20100120216
Pub Dt:
05/13/2010
Title:
TRANSISTOR FABRICATION METHOD
12
Patent #:
7910425
Issue Dt:
03/22/2011
Application #:
12727304
Filing Dt:
03/19/2010
Publication #:
US20100173459
Pub Dt:
07/08/2010
Title:
MULTIPLE DOPING LEVEL BIPOLAR JUNCTIONS TRANSISTORS AND METHOD FOR FORMING
13
Patent #:
8227319
Issue Dt:
07/24/2012
Application #:
12728412
Filing Dt:
03/22/2010
Publication #:
US20110230031
Pub Dt:
09/22/2011
Title:
BIPOLAR JUNCTION TRANSISTOR HAVING A HIGH GERMANIUM CONCENTRATION IN A SILICON-GERMANIUM LAYER AND A METHOD FOR FORMING THE BIPOLAR JUNCTION TRANSISTOR
14
Patent #:
8084313
Issue Dt:
12/27/2011
Application #:
12832110
Filing Dt:
07/08/2010
Publication #:
US20100273301
Pub Dt:
10/28/2010
Title:
THERMALLY STABLE BICMOS FABRICATION METHOD AND BIPOLAR JUNCTION TRNASISTORS FORMED ACCORDING TO THE METHOD
15
Patent #:
8411399
Issue Dt:
04/02/2013
Application #:
12839148
Filing Dt:
07/19/2010
Publication #:
US20110051304
Pub Dt:
03/03/2011
Title:
DEFECTIVITY-IMMUNE TECHNIQUE OF IMPLEMENTING MIM-BASED DECOUPLING CAPACITORS
16
Patent #:
8527912
Issue Dt:
09/03/2013
Application #:
12890336
Filing Dt:
09/24/2010
Publication #:
US20110016436
Pub Dt:
01/20/2011
Title:
Digitally Obtaining Contours of Fabricated Polygons
17
Patent #:
8017512
Issue Dt:
09/13/2011
Application #:
12912791
Filing Dt:
10/27/2010
Publication #:
US20110039398
Pub Dt:
02/17/2011
Title:
EFFICIENT POWER MANAGEMENT METHOD IN INTEGRATED CIRCUIT THROUGH A NANOTUBE STRUCTURE
18
Patent #:
8289051
Issue Dt:
10/16/2012
Application #:
12947948
Filing Dt:
11/17/2010
Publication #:
US20120119785
Pub Dt:
05/17/2012
Title:
INPUT/OUTPUT CORE DESIGN AND METHOD OF MANUFACTURE THEREFOR
19
Patent #:
8143120
Issue Dt:
03/27/2012
Application #:
13026528
Filing Dt:
02/14/2011
Publication #:
US20110133289
Pub Dt:
06/09/2011
Title:
MULTIPLE DOPING LEVEL BIPOLAR JUNCTIONS TRANSISTORS AND METHOD FOR FORMING
20
Patent #:
8269280
Issue Dt:
09/18/2012
Application #:
13110581
Filing Dt:
05/18/2011
Publication #:
US20110215410
Pub Dt:
09/08/2011
Title:
I/O AND POWER ESD PROTECTION CIRCUITS BY ENHANCING SUBSTRATE-BIAS IN DEEP-SUBMICRON CMOS PROCESS
21
Patent #:
8610215
Issue Dt:
12/17/2013
Application #:
13119005
Filing Dt:
03/15/2011
Publication #:
US20110163419
Pub Dt:
07/07/2011
Title:
ALLOTROPIC OR MORPHOLOGIC CHANGE IN SILICON INDUCED BY ELECTROMAGNETIC RADIATION FOR RESISTANCE TURNING OF INTEGRATED CIRCUITS
22
Patent #:
8105912
Issue Dt:
01/31/2012
Application #:
13149122
Filing Dt:
05/31/2011
Publication #:
US20110230032
Pub Dt:
09/22/2011
Title:
HIGH VOLTAGE TOLERANT METAL-OXIDE-SEMICONDUCTOR DEVICE
23
Patent #:
8377633
Issue Dt:
02/19/2013
Application #:
13253554
Filing Dt:
10/05/2011
Publication #:
US20120038896
Pub Dt:
02/16/2012
Title:
MASKLESS VORTEX PHASE SHIFT OPTICAL DIRECT WRITE LITHOGRAPHY
24
Patent #:
NONE
Issue Dt:
Application #:
13348415
Filing Dt:
01/11/2012
Publication #:
US20120115299
Pub Dt:
05/10/2012
Title:
BIPOLAR JUNCTION TRANSISTOR HAVING A HIGH GERMANIUM CONCENTRATION IN A SILICON-GERMANIUM LAYER AND A METHOD FOR FORMING THE BIPOLAR JUNCTION TRANSISTOR
25
Patent #:
8440512
Issue Dt:
05/14/2013
Application #:
13368985
Filing Dt:
02/08/2012
Publication #:
US20120139059
Pub Dt:
06/07/2012
Title:
CIRCUITS AND METHODS FOR IMPROVED FET MATCHING
26
Patent #:
8648445
Issue Dt:
02/11/2014
Application #:
13428540
Filing Dt:
03/23/2012
Publication #:
US20120175702
Pub Dt:
07/12/2012
Title:
METAL-OXIDE-SEMICONDUCTOR DEVICE HAVING TRENCHED DIFFUSION REGION AND METHOD OF FORMING SAME
27
Patent #:
NONE
Issue Dt:
Application #:
13443691
Filing Dt:
04/10/2012
Publication #:
US20120194217
Pub Dt:
08/02/2012
Title:
INPUT/OUTPUT CORE DESIGN AND METHOD OF MANUFACTURE THEREFOR
28
Patent #:
9188848
Issue Dt:
11/17/2015
Application #:
13722648
Filing Dt:
12/20/2012
Publication #:
US20130107240
Pub Dt:
05/02/2013
Title:
Maskless Vortex Phase Shift Optical Direct Write Lithography
29
Patent #:
NONE
Issue Dt:
Application #:
14073526
Filing Dt:
11/06/2013
Publication #:
US20140065791
Pub Dt:
03/06/2014
Title:
ALLOTROPIC OR MORPHOLOGIC CHANGE IN SILICON INDUCED BY ELECTROMAGNETIC RADIATION FOR RESISTANCE TURNING OF INTEGRATED CIRCUITS
Assignors
1
AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Exec Dt:
12/08/2017
2
BROADCOM CORPORATION
Exec Dt:
12/08/2017
Assignee
1
BELL SEMICONDUCTOR, LLC
401 N. MICHIGAN AVE.
SUITE 1600
CHICAGO, ILLINOIS 60611
Correspondence name and address
CHAD S. HILYARD
401 N. MICHIGAN AVE.
SUITE 1600
CHICAGO, IL 60611

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