|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/14/1999
|
Application #:
|
08592870
|
Filing Dt:
|
01/24/1996
|
|
Title:
|
LOW STRESS, HIGHLY CONFORMAL CVD METAL THIN FILM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/09/1999
|
Application #:
|
08595021
|
Filing Dt:
|
01/31/1996
|
|
Title:
|
MICROELECTRONIC DEVICE WITH THIN FILM ELECTROSTATIC DISCHARGE PROTECTION STRUCTURE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/02/1998
|
Application #:
|
08596894
|
Filing Dt:
|
01/25/1996
|
|
Title:
|
VARIABLE WIDTH LOW PROFILE GATE ARRAY INPUT/OUTPUT ARCHITECTURE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/18/1997
|
Application #:
|
08604867
|
Filing Dt:
|
02/14/1996
|
|
Title:
|
METHOD FOR FORMING COMPOSITE TRENCH-FIN CAPACITORS FOR DRAMS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/10/1998
|
Application #:
|
08610026
|
Filing Dt:
|
03/04/1996
|
|
Title:
|
A HETEROJUNCTION BIPOLAR TRANSISTOR HAVING MONO CRYSTALLING SIGE INTRINSIC BASE AND POLYCRYSTALLINE SIGE AND SI EXTRINSIC BASE REGIONS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/15/1997
|
Application #:
|
08610646
|
Filing Dt:
|
03/04/1996
|
|
Title:
|
METHOD FOR MAKING A HETEROJUNCTION BIPOLAR TRANSISTOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/20/1997
|
Application #:
|
08612337
|
Filing Dt:
|
03/06/1996
|
|
Title:
|
METHOD OF MAKING COMBINED JFET & MOS TRANSISTOR DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/09/1998
|
Application #:
|
08620964
|
Filing Dt:
|
03/22/1996
|
|
Title:
|
PROCESS FOR FORMING ISOLATION REGIONS IN AN INTEGRATED CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/09/1998
|
Application #:
|
08622795
|
Filing Dt:
|
03/27/1996
|
|
Title:
|
HOLOGRAPHIC METHOD FOR GENERATING THREE DIMENSIONAL CONFORMAL PHOTO-LITHOGRAPHIC MASKS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/06/1998
|
Application #:
|
08622797
|
Filing Dt:
|
03/27/1996
|
|
Title:
|
HOLOGRAPHIC METHOD FOR GENERATING THREE DIMENSIONAL CONFORMAL PHOTO- LITHOGRAPHIC MASKS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/19/1999
|
Application #:
|
08623470
|
Filing Dt:
|
03/28/1996
|
|
Title:
|
METHOD AND APPARATUS FOR PROTECTING FUNCTIONS IMBEDDED WITHIN AN INTEGRATED CIRCUIT FROM REVERSE ENGINEERING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/05/1997
|
Application #:
|
08627622
|
Filing Dt:
|
04/04/1996
|
|
Title:
|
PROCESS MONITOR USING IMPEDANCE CONTROLLED I/O CONTROLLER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/22/1998
|
Application #:
|
08644086
|
Filing Dt:
|
05/09/1996
|
|
Title:
|
METHOD FOR MAKING A CAPACITOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/14/1998
|
Application #:
|
08650476
|
Filing Dt:
|
05/20/1996
|
|
Title:
|
METHOD OF FORMING POLYSILICON LOGAL INTERCONNECTS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/12/1999
|
Application #:
|
08651018
|
Filing Dt:
|
05/21/1996
|
|
Title:
|
METHOD FOR FABRICATING A LOW TRIGGER VOLTAGE SILICON CONTROLLED RECTIFIER AND THICK FIELD DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/20/1998
|
Application #:
|
08653264
|
Filing Dt:
|
05/24/1996
|
|
Title:
|
METHOD AND APPARATUS FOR FORMING DIELECTRIC FILMS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/23/1997
|
Application #:
|
08664227
|
Filing Dt:
|
06/07/1996
|
|
Title:
|
METHOD FOR PRODUCING TAPERED LINES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/04/1997
|
Application #:
|
08674956
|
Filing Dt:
|
07/03/1996
|
|
Title:
|
METHOD OF MAKING A LOW NOISE SEMICONDUCTOR DEVICE COMPRISING A SCREENING MEASUREMENT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/10/1998
|
Application #:
|
08675026
|
Filing Dt:
|
07/03/1996
|
|
Title:
|
SINGLE-POLYSILICON CMOS ACTIVE PIXEL IMAGE SENSOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/10/1998
|
Application #:
|
08677078
|
Filing Dt:
|
07/09/1996
|
|
Title:
|
SEMICONDUCTOR WITH CONTROLLED AMOUNT OF NOBLE GAS IONS TO REDUCE CHANNELING AND/OR DIFFUSION OF A BORON DOPANT FORMING P- LDD REGION OF A PMOS DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/26/1998
|
Application #:
|
08678718
|
Filing Dt:
|
07/11/1996
|
|
Title:
|
RAPID THERMAL PROCESSING USING A NARROWBAND INFRARED SOURCE AND FEEDBACK
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/13/1998
|
Application #:
|
08678971
|
Filing Dt:
|
07/12/1996
|
|
Title:
|
METHOD OF FABRICATING A SEGMENTED EMITTER LOW NOISE TRANSISTOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/12/1997
|
Application #:
|
08683291
|
Filing Dt:
|
07/18/1996
|
|
Title:
|
METHOD OF MAKING HIGH-SPEED DOUBLE-HETEROSTRUCTURE BIPOLAR TRANSISTOR DEVICES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/17/1998
|
Application #:
|
08684022
|
Filing Dt:
|
07/19/1996
|
|
Title:
|
METHOD FOR FORMING MINIMUM AREA STRUCTURES FOR SUB-MICRON CMOS ESD PROTECTION IN INTEGRATED CIRCUIT STRUCTURES WITHOUT EXTRA IMPLANT AND MASK STEPS, AND ARTICLES FORMED THEREBY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/18/1997
|
Application #:
|
08685772
|
Filing Dt:
|
07/24/1996
|
|
Title:
|
INTEGRATED CIRCUIT STRUCTURE HAVING REDUCED CROSS-TALK AND METHOD OF MAKING SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/02/1999
|
Application #:
|
08690592
|
Filing Dt:
|
07/31/1996
|
|
Title:
|
FORMATION OF GRADIENT DOPED PROFILE REGION BETWEEN CHANNEL REGION AND HEAVILY DOPED SOURCE/DRAIN CONTACT REGION OF MOS DEVICE IN INTEGRATED CIRCUIT STRUCTURE USING A RE-ENTRANT GATE ELECTRODE AND A HIGHER DOSE DRAIN IMPLANTATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/02/1997
|
Application #:
|
08695569
|
Filing Dt:
|
08/12/1996
|
|
Title:
|
PROCESS FOR MAKING IMPROVED MOS STRUCTURE WITH HOT CARRIER REDUCTION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/09/1999
|
Application #:
|
08696445
|
Filing Dt:
|
08/13/1996
|
|
Title:
|
SUBSONIC TO SUPERSONIC AND ULTRASONIC CONDITIONING OF A POLISHING PAD IN A CHEMICAL MECHANICAL POLISHING APPARATUS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/17/1998
|
Application #:
|
08697402
|
Filing Dt:
|
08/23/1996
|
|
Title:
|
ARTICLE COMPRISING SPINEL-STRUCTURE MATERIAL ON A SUBSTRATE, AND METHOD OF MAKIKG THE ARTICLE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/18/1999
|
Application #:
|
08701476
|
Filing Dt:
|
08/22/1996
|
|
Title:
|
FUNCTIONAL OBIC ANALYSIS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/19/1999
|
Application #:
|
08702073
|
Filing Dt:
|
08/23/1996
|
|
Title:
|
AN ORGANIC THIN FILM TRANSISTOR AND HAVING A PHTHALOCYANINE SEMICONDUCTOR LAYER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/02/1999
|
Application #:
|
08703756
|
Filing Dt:
|
08/27/1996
|
|
Title:
|
PROCESS FOR DEVICE FABRICATION IN WHICH THE PLASMA ETCH IS CONTROLLED BY MONITORING OPTICAL EMISSION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/09/1998
|
Application #:
|
08704472
|
Filing Dt:
|
08/20/1996
|
|
Title:
|
SELF-ALIGNED TWIN WELL PROCESS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/12/1999
|
Application #:
|
08705936
|
Filing Dt:
|
08/30/1996
|
|
Title:
|
IN-SITU DOPED SILICON LAYERS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/10/1998
|
Application #:
|
08714909
|
Filing Dt:
|
09/17/1996
|
|
Title:
|
PROCESS FOR FABRICATING A DEVICE USING POLARIZED LIGHT TO DETERMINE FILM THICKNESS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/02/1997
|
Application #:
|
08716829
|
Filing Dt:
|
09/05/1996
|
|
Title:
|
N-CHANNEL FIELD-EFECT TRANSISTOR INCLUDING A THIN-FILM FULLERENE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/08/1998
|
Application #:
|
08718113
|
Filing Dt:
|
09/18/1996
|
|
Title:
|
DETECTING BREAKDOWN IN DIELECTRIC LAYERS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/27/1998
|
Application #:
|
08718852
|
Filing Dt:
|
09/24/1996
|
|
Title:
|
METHOD OF MAKING A BARRIER METAL TECHNOLOGY FOR TUNGSTEN PLUG INTERCONNECTION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/21/1999
|
Application #:
|
08723140
|
Filing Dt:
|
10/01/1996
|
|
Title:
|
MICROELECTRONIC PACKAGE WITH POLYMER ESD PROTECTION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/14/1998
|
Application #:
|
08727726
|
Filing Dt:
|
10/07/1996
|
|
Title:
|
THIN FILM METALLIZATION FOR BARIUM NANOTITANATE SUBSTRATES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/10/1998
|
Application #:
|
08730809
|
Filing Dt:
|
10/17/1996
|
|
Title:
|
METHOD FOR IDENTIFYING ORDER SKIPPING IN SPECTROREFLECTIVE FILM MEASUREMENT EQUIPMENT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/02/1999
|
Application #:
|
08746184
|
Filing Dt:
|
11/06/1996
|
|
Title:
|
METHOD FOR COATING HETEROGENEOUS SUBSTRATES WITH HOMOGENEOUS LAYERS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/01/1998
|
Application #:
|
08748372
|
Filing Dt:
|
11/13/1996
|
|
Title:
|
I/O DRIVER DESIGN FOR SIMULTANEOUS SWITCHING NOISE MINIMIZATION AND ESD PERFORMANCE ENHANCEMENT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/10/2002
|
Application #:
|
08749719
|
Filing Dt:
|
11/15/1996
|
|
Title:
|
WAFER HANDLING APPARATUS AND METHOD
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/07/1998
|
Application #:
|
08751472
|
Filing Dt:
|
11/19/1996
|
|
Title:
|
INTEGRATED CIRCUIT DEVICE WITH INDUCTOR INCORPORATED THEREIN
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/28/1998
|
Application #:
|
08752234
|
Filing Dt:
|
11/19/1996
|
|
Title:
|
FIELD EMISSION DEVICES EMPLOYING ENHANCED DIAMOND FIELD EMITTERS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/22/1998
|
Application #:
|
08752235
|
Filing Dt:
|
11/19/1996
|
|
Title:
|
FIELD EMISSION DEVICES EMPLOYING ENHANCED DIAMOND FIELD EMITTERS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/02/1999
|
Application #:
|
08753859
|
Filing Dt:
|
12/03/1996
|
|
Title:
|
PROCESS FOR MAKING COMPOSITE FILMS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/16/1999
|
Application #:
|
08754696
|
Filing Dt:
|
11/21/1996
|
|
Title:
|
PROCESS FOR FORMING SELF-ALIGNED CONDUCTIVE PLUGS IN MULTIPLE INSULATION LEVELS IN INTEGRATED CIRCUIT STRUCTURES AND RESULTING PRODUCT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/23/1998
|
Application #:
|
08760466
|
Filing Dt:
|
12/05/1996
|
|
Title:
|
BARRIER LAYER FOR VIA OR CONTACT OPENING OF INTEGRATED CIRCUIT STRUCTURE AND METHOD OF MAKING SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/13/1999
|
Application #:
|
08761052
|
Filing Dt:
|
12/05/1996
|
|
Title:
|
P-CHANNEL MOS TRANSISTOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/23/1999
|
Application #:
|
08761761
|
Filing Dt:
|
12/05/1996
|
|
Title:
|
METHOD FOR ARTIFICIALLY-INDUCING REVERSE SHORT-CHANNEL EFFECTS IN DEEP SUB-MICRON CMOS DEVICES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/13/1998
|
Application #:
|
08763373
|
Filing Dt:
|
12/13/1996
|
|
Title:
|
VARIABLE STEP HEIGHT CONTROL OF LITHOGRAPHIC PATTERNING THROUGH TRANSMITTED LIGHT INTENSITY VARIATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/13/1999
|
Application #:
|
08767153
|
Filing Dt:
|
12/16/1996
|
|
Title:
|
DIELECTRIC MATERIAL COMPRESSING TA205 DOPED WITH TI02 AND DEVICES EMPLOYING SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/02/1999
|
Application #:
|
08767698
|
Filing Dt:
|
12/17/1996
|
|
Title:
|
ELECTRODE ASSEMBLY FOR PLASMA REACTOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/07/1998
|
Application #:
|
08767758
|
Filing Dt:
|
12/17/1996
|
|
Title:
|
METHOD OF POLISHING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/23/1998
|
Application #:
|
08768845
|
Filing Dt:
|
12/18/1996
|
|
Title:
|
SELF-ALIGNED TWIN WELL PROCESS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/13/1998
|
Application #:
|
08768905
|
Filing Dt:
|
12/17/1996
|
|
Title:
|
SIMPLE BICMOS PROCESS FOR CREATION OF LOW TRIGGER VOLTAGE SCR AND ZENER DIODE PAD PROTECTION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/17/1998
|
Application #:
|
08769717
|
Filing Dt:
|
12/18/1996
|
|
Title:
|
METHOD OF FORMING PLANARIZED LAYERS IN AN INTEGRATED CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/30/2001
|
Application #:
|
08770046
|
Filing Dt:
|
12/19/1996
|
|
Title:
|
FETS HAVING LIGHTLY DOPED DRAIN REGIONS THAT ARE SHAPED WITH COUNTER AND NONCOUNTER DOPANT ELEMENTS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/23/1998
|
Application #:
|
08772310
|
Filing Dt:
|
12/23/1996
|
|
Title:
|
ON THE USE OF NON-SPHERICAL CARRIERS FOR SUBSTRATE CHEMI-MECHANICAL POLISHING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/05/1999
|
Application #:
|
08773471
|
Filing Dt:
|
12/23/1996
|
|
Title:
|
METHOD FOR TUNGSTEN NUCLEATION FROM WF6 USING TITANIUM AS A REDUCING AGENT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/02/1999
|
Application #:
|
08774036
|
Filing Dt:
|
12/27/1996
|
|
Title:
|
METHOD FOR BI-LAYER PROGRAMMABLE RESISTOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/25/2000
|
Application #:
|
08775490
|
Filing Dt:
|
12/31/1996
|
|
Title:
|
INTEGRATED CIRCUIT WITH TWIN TUB
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/28/1999
|
Application #:
|
08775790
|
Filing Dt:
|
12/31/1996
|
|
Title:
|
METHOD OF MAKING A DIELECTRIC FOR AN INTERGRATED CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/03/1998
|
Application #:
|
08777008
|
Filing Dt:
|
01/07/1997
|
|
Title:
|
RESIST MATERIALS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/07/1998
|
Application #:
|
08781992
|
Filing Dt:
|
01/06/1997
|
|
Title:
|
POLYMORPHIC RECTILINEAR THIEVING PAD
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/09/1999
|
Application #:
|
08786695
|
Filing Dt:
|
01/22/1997
|
|
Title:
|
SIMPLIFIED HOLE INTERCONNECT PROCESS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/04/2000
|
Application #:
|
08787992
|
Filing Dt:
|
01/23/1997
|
|
Title:
|
PROCESS FOR FORMING METAL SILICIDE CONTACTS USING AMORPHIZATION OF EXPOSED SILICON WHILE MINIMIZING DEVICE DEGRADATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/12/2000
|
Application #:
|
08791244
|
Filing Dt:
|
01/30/1997
|
|
Title:
|
METHOD OF FABRICATING INSULATED-GATE FILED-EFFECT TRANSISTORS HAVING DIFFERENT GATE CAPACITANCES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/30/1998
|
Application #:
|
08792479
|
Filing Dt:
|
01/31/1997
|
|
Title:
|
MICROELECTRONIC CIRCUIT INCLUDING SILICIDED FIELD-EFFECT TRANSISTOR ELEMENTS THAT BIFUNCTION AS INTERCONNECTS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/16/1998
|
Application #:
|
08798580
|
Filing Dt:
|
02/10/1997
|
|
Title:
|
APPARATUS AND METHOD FOR MEASURING THE ORIENTATION OF A SINGLE CRYSTAL SURFACE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/01/1998
|
Application #:
|
08803703
|
Filing Dt:
|
02/21/1997
|
|
Title:
|
ENERGY-SENSITIVE RESIST MATERIAL AND A PROCESS FOR DEVICE FABRICATION USING AN ENERGY-SENSITIVE RESIST MATERIAL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/14/2001
|
Application #:
|
08805404
|
Filing Dt:
|
02/24/1997
|
|
Title:
|
SHADOW MASK DEPOSITION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/19/1999
|
Application #:
|
08807209
|
Filing Dt:
|
02/28/1997
|
|
Title:
|
FIELD EFFECT DEVICES AND CAPACITORS WITH IMPROVED THIN FILM DIELECTRICS AND METHOD FOR MAKING SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/04/1998
|
Application #:
|
08811818
|
Filing Dt:
|
03/04/1997
|
|
Title:
|
METHOD FOR ELIMINATING PEELING AT END EDGE OF SEMICONDUCTOR SUBSTRATE IN METAL ORGANIC CHEMICAL VAPOR DEPOSITION OF TITANIUM NITRIDE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/09/1999
|
Application #:
|
08813732
|
Filing Dt:
|
03/07/1997
|
|
Title:
|
ENERGY-SENSITIVE RESIST MATERIAL AND A PROCESS FOR DEVICE FABRICATION USING AN ENERGY-SENSITIVE RESIST MATERIAL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/10/1999
|
Application #:
|
08814051
|
Filing Dt:
|
03/06/1997
|
|
Title:
|
THIN FILM TANTALUM OXIDE CAPACITORS AND RESULTING PRODUCT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/17/1999
|
Application #:
|
08814670
|
Filing Dt:
|
03/11/1997
|
|
Title:
|
METHOD FOR FORMING A HIGH QUALITY ULTRATHIN GATE OXIDE LAYER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/12/1999
|
Application #:
|
08816185
|
Filing Dt:
|
03/12/1997
|
|
Title:
|
INTEGRATED CIRCUIT HAVING AMORPHOOUS SILICIDE LAYER IN CONTACTS AND VIAS AND METHOD OF MANUFACTURE THEREOF
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/15/1999
|
Application #:
|
08820063
|
Filing Dt:
|
03/18/1997
|
|
Title:
|
SEMICONDUCTOR DEVICE HAVING ALUMINUM CONTACTS OR VIAS AND METHOD OF MANUFACTURE THEREFOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/03/2001
|
Application #:
|
08823305
|
Filing Dt:
|
03/21/1997
|
|
Title:
|
TUNABLE DIELECTRIC CONSTANT OXIDE AND METHOD OF MANUFACTURE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/06/1998
|
Application #:
|
08823829
|
Filing Dt:
|
03/25/1997
|
|
Title:
|
PRODUCT RESULTING FROM SELECTIVE DEPOSITION OF POLYSILICON OVER SINGLE CRYSTAL SILICON SUBSTRATE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/14/1998
|
Application #:
|
08832245
|
Filing Dt:
|
04/03/1997
|
|
Title:
|
PROCESS FOR FABRICATING A MODERATE-DEPTH DIFFUSED EMITTER BIPOLAR TRANSISTOR IN A BICMOS DEVICE WITHOUT USING AN ADDITIONAL MASK
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/11/1999
|
Application #:
|
08833597
|
Filing Dt:
|
04/07/1997
|
|
Title:
|
PROCESS FOR FORMING IMPROVED COBALT SILICIDE LAYER ON INTEGRATED CIRCUIT STRUCTURE USING TWO CAPPING LAYERS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/11/1999
|
Application #:
|
08834261
|
Filing Dt:
|
04/15/1997
|
|
Title:
|
SYSTEMS AND METHODS FOR DETERMINING SEMICONDUCTOR WAFER TEMPERATURE AND CALIBRATING A VAPOR DEPOSITION DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/23/1999
|
Application #:
|
08841947
|
Filing Dt:
|
04/08/1997
|
|
Title:
|
PRE-CONDITIONING POLISHING PADS FOR CHEMICAL-MECHANICAL POLISHING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/24/1999
|
Application #:
|
08846769
|
Filing Dt:
|
04/30/1997
|
|
Title:
|
PHOTOSENSING DEVICE WITH IMPROVED SPECTRAL RESPONSE AND LOW TRERMAL LEAKAGE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/08/2000
|
Application #:
|
08847704
|
Filing Dt:
|
04/28/1997
|
|
Title:
|
DEUTERATED DIELECTRIC AND POLYSILICON FILM-BASED SEMICONDUCTOR DEVICES AND METHOD OF MANUFACTURE THEREOF
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/25/2000
|
Application #:
|
08848141
|
Filing Dt:
|
04/28/1997
|
|
Title:
|
COMPLEMENTARY FIELD EFFECT DEVICES FOR ELIMINATING OR REDUCING DIODE EFFECT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/29/1998
|
Application #:
|
08851846
|
Filing Dt:
|
05/06/1997
|
|
Title:
|
GAS CONTROL TECHNIQUE FOR LIMITING SURGING OF GAS INTO A CVD CHAMBER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/29/1999
|
Application #:
|
08853210
|
Filing Dt:
|
05/09/1997
|
|
Title:
|
PROCESS FOR FORMING GATE OXIDES POSSESSING DIFFERENT THICKNESSES ON A SEMICONDUCTOR SUBSTRATE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/16/1998
|
Application #:
|
08853582
|
Filing Dt:
|
05/09/1997
|
|
Title:
|
INTEGRATED CIRCUIT DEVICE WITH ISOLATED CIRCUIT ELEMENTS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/25/1998
|
Application #:
|
08857079
|
Filing Dt:
|
05/15/1997
|
|
Title:
|
METHOD FOR FORMING CONDUCTORS IN INTEGRATED CIRCUITS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/24/1998
|
Application #:
|
08862226
|
Filing Dt:
|
05/23/1997
|
|
Title:
|
PROCESS FOR CONTROLLING DOPANT DIFFUSION IN A SEMICONDUCTOR LAYER AND SEMICONDUCTOR LAYER FORMED THEREBY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/02/1999
|
Application #:
|
08862907
|
Filing Dt:
|
05/23/1997
|
|
Title:
|
CAPACITOR COMPRISING IMPROVED TAOX-BASED DIELECTRIC
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/20/1998
|
Application #:
|
08863713
|
Filing Dt:
|
05/27/1997
|
|
Title:
|
AN ELECTRONIC COMPONENT FOR AN INTEGRATED CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/06/1999
|
Application #:
|
08867286
|
Filing Dt:
|
06/02/1997
|
|
Title:
|
INTEGRATED CIRCUIT WITH ON-CHIP GROUND BASE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/14/1999
|
Application #:
|
08871385
|
Filing Dt:
|
06/09/1997
|
|
Title:
|
BIPOLAR HAVING GRADED OR MODULATED COLLECTOR PROCESS FOR MAKING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/12/2000
|
Application #:
|
08872250
|
Filing Dt:
|
06/10/1997
|
|
Title:
|
MICROMAGNETIC DEVICE FOR POWER PROCESING APPLICATIONS AND METHOD OF MANUFACTURE THEREFOR
|
|
