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Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:044886/0001   Pages: 107
Recorded: 12/17/2017
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 1129
Page 5 of 12
Pages: 1 2 3 4 5 6 7 8 9 10 11 12
1
Patent #:
Issue Dt:
06/26/2001
Application #:
09280103
Filing Dt:
03/29/1999
Title:
DEVICE COMPRISING N-CHANNEL SEMICONDUCTOR MATERIAL
2
Patent #:
Issue Dt:
11/27/2001
Application #:
09280387
Filing Dt:
03/29/1999
Title:
CAPACITOR FOR AN INTEGRATED CIRCUIT
3
Patent #:
Issue Dt:
11/13/2001
Application #:
09281642
Filing Dt:
03/31/1999
Title:
MANUFACTURING AND ENGINEERING DATA BASE
4
Patent #:
Issue Dt:
04/30/2002
Application #:
09283528
Filing Dt:
04/01/1999
Title:
LITHOGRAPHIC PROCESS FOR DEVICE FABRICATION USING DARK-FIELD ILLUMINATION
5
Patent #:
Issue Dt:
04/17/2001
Application #:
09286430
Filing Dt:
04/06/1999
Title:
MOBIUS STRIP BELT FOR LINEAR CMP TOOLS
6
Patent #:
Issue Dt:
04/11/2000
Application #:
09286869
Filing Dt:
04/06/1999
Title:
APPARATUS AND METHOD FOR CONTINUOUS DELIVERY AND CONDITIONING OF A POLISHING SLURRY
7
Patent #:
Issue Dt:
11/20/2001
Application #:
09291781
Filing Dt:
04/14/1999
Title:
EMBEDDED THIN FILM PASSIVE COMPONENTS
8
Patent #:
Issue Dt:
04/03/2001
Application #:
09292079
Filing Dt:
04/14/1999
Title:
REDUCTION OF PLASMA DAMAGE AT CONTACT ETCH IN MOS INTEGRATED CIRCUITS
9
Patent #:
Issue Dt:
02/20/2001
Application #:
09292860
Filing Dt:
04/16/1999
Title:
MICROMAGNETIC DEVICE HAVING AN ANISOTROPIC FERROMAGNETIC CORE AND METHOD OF MANUFACTURE THEREFOR
10
Patent #:
Issue Dt:
10/22/2002
Application #:
09296001
Filing Dt:
04/21/1999
Publication #:
Pub Dt:
01/03/2002
Title:
DEVICE COMPRISING THERMALLY STABLE, LOW DIELECTRIC CONSTANT MATERIAL
11
Patent #:
Issue Dt:
02/20/2001
Application #:
09298068
Filing Dt:
04/22/1999
Title:
METHOD OF FORMING A MULTI-LAYERED DUAL-POLYSILICON STRUCTURE
12
Patent #:
Issue Dt:
05/18/2004
Application #:
09305722
Filing Dt:
05/05/1999
Title:
HIGH-RESOLUTION METHOD FOR PATTERNING A SUBSTRATE WITH MICRO-PRINTING
13
Patent #:
Issue Dt:
06/15/2004
Application #:
09310388
Filing Dt:
05/12/1999
Title:
DAMASCENE CAPACITORS FOR INTEGRATED CIRCUITS
14
Patent #:
Issue Dt:
12/10/2002
Application #:
09310701
Filing Dt:
05/07/1999
Title:
IMPROVED WEHNELT GUN FOR ELECTRON LITHOGRAPHY
15
Patent #:
Issue Dt:
03/19/2002
Application #:
09311631
Filing Dt:
05/14/1999
Publication #:
Pub Dt:
01/03/2002
Title:
OXIDATION OF SILICON USING FLUORINE IMPLANT
16
Patent #:
Issue Dt:
12/31/2002
Application #:
09312386
Filing Dt:
05/14/1999
Publication #:
Pub Dt:
10/17/2002
Title:
STEPPED ETALON
17
Patent #:
Issue Dt:
08/28/2001
Application #:
09332216
Filing Dt:
06/14/1999
Title:
WAFER CARRIER MODIFICATION FOR REDUCED EXTRACTION FORCE
18
Patent #:
Issue Dt:
07/24/2001
Application #:
09333626
Filing Dt:
06/15/1999
Title:
PROCESS AND APPARATUS FOR MAKING COMPOSITE FILMS
19
Patent #:
Issue Dt:
07/09/2002
Application #:
09334977
Filing Dt:
06/17/1999
Title:
LAYERED DIELECTRIC FILM STRUCTURE SUITABLE FOR GATE DIELECTRIC APPLICATION IN SUB-0.25 uM TECHNOLOGIES
20
Patent #:
Issue Dt:
03/06/2001
Application #:
09335707
Filing Dt:
06/18/1999
Title:
PROCESS FOR FABRICATING VERTICAL TRANSISTORS
21
Patent #:
Issue Dt:
07/03/2001
Application #:
09338143
Filing Dt:
06/22/1999
Title:
INTEGRATED CIRCUIT HAVING A MICROMAGNETIC DEVICE INCLUDING A FERROMAGNETIC CORE AND METHOD OF MANUFACTURE THEREFOR
22
Patent #:
Issue Dt:
11/09/2004
Application #:
09338520
Filing Dt:
06/23/1999
Title:
CATHODE WITH IMPROVED WORK FUNCTION AND METHOD FOR MAKING THE SAME
23
Patent #:
Issue Dt:
04/25/2000
Application #:
09339306
Filing Dt:
06/23/1999
Title:
METHOD OF MAKING INTEGRATED CIRCUITS WITH TUB-TIES
24
Patent #:
Issue Dt:
04/09/2002
Application #:
09345039
Filing Dt:
06/30/1999
Title:
METHOD FOR MAKING AN INTEGRATED CIRCUIT INCLUDING ALIGNMENT MARKS
25
Patent #:
Issue Dt:
07/24/2001
Application #:
09345556
Filing Dt:
06/30/1999
Title:
METHOD FOR MAKING AN INTEGRATED CIRCUIT CAPACITOR INCLUDING TANTALUM PENTOXIDE
26
Patent #:
Issue Dt:
07/10/2001
Application #:
09347313
Filing Dt:
07/02/1999
Title:
METHOD ANALYZING A SEMICONDUCTOR SURFACE USING LINE WIDTH METROLOGY WITH AUTO-CORRELATION OPERATION
27
Patent #:
Issue Dt:
08/28/2001
Application #:
09347487
Filing Dt:
07/02/1999
Title:
METHOD FOR MANUFACTURING A METAL-TO-METAL CAPACITOR UTILIZING ONLY ONE MASKING STEP
28
Patent #:
Issue Dt:
07/02/2002
Application #:
09354657
Filing Dt:
07/16/1999
Title:
VERY LOW MAGNETIC FIELD INTEGRATED CIRCUIT
29
Patent #:
Issue Dt:
07/10/2001
Application #:
09356396
Filing Dt:
07/16/1999
Title:
ZONE PLATES FOR X-RAYS
30
Patent #:
Issue Dt:
07/30/2002
Application #:
09358606
Filing Dt:
07/21/1999
Title:
OFF-AXIS PUPIL APERTURE AND METHOD FOR MAKING THE SAME
31
Patent #:
Issue Dt:
08/14/2001
Application #:
09362648
Filing Dt:
07/27/1999
Title:
PRE-CONDITIONING POLISHING PADS FOR CHEMICAL-MECHANICAL POLISHING
32
Patent #:
Issue Dt:
11/28/2000
Application #:
09363758
Filing Dt:
07/29/1999
Title:
METHOD FOR PRODUCING ORIENTED PIEZOELECTRIC FILMS
33
Patent #:
Issue Dt:
01/16/2001
Application #:
09363781
Filing Dt:
07/29/1999
Title:
MONOLITHIC RESISTOR HAVING DYNAMICALLY CONTROLLABLE IMPEDANCE AND METHOD OF MANUFACTURING THE SAME
34
Patent #:
Issue Dt:
03/20/2001
Application #:
09364366
Filing Dt:
07/30/1999
Title:
METHOD OF MAKING INTEGRATED CIRCUIT CAPACITOR INCLUDING TAPERED PLUG
35
Patent #:
Issue Dt:
11/28/2000
Application #:
09364367
Filing Dt:
07/30/1999
Title:
INTEGRATED CIRCUIT CAPACITOR INCLUDING ANCHORED PLUG
36
Patent #:
Issue Dt:
07/18/2000
Application #:
09365440
Filing Dt:
08/02/1999
Title:
METHOD OF SINGLE STEP DAMASCENE PROCESS FOR DEPOSITION AND GLOBAL PLANARIZATION
37
Patent #:
Issue Dt:
05/06/2003
Application #:
09366388
Filing Dt:
08/03/1999
Title:
METHODS AND APPARATUS FOR TESTING INTEGRATED CIRCUITS
38
Patent #:
Issue Dt:
03/25/2003
Application #:
09369802
Filing Dt:
08/06/1999
Title:
FIELD EMITTING DEVICE COMPRISING FIELD-CONCENTRATING NANOCONDUCTOR ASSEMBLY AND METHOD FOR MAKING THE SAME
39
Patent #:
Issue Dt:
02/25/2003
Application #:
09370501
Filing Dt:
08/09/1999
Title:
LOW THRESHOLD VOLTAGE MOS TRANSISTOR AND METHOD OF MANUFACTURE
40
Patent #:
Issue Dt:
09/11/2001
Application #:
09370912
Filing Dt:
08/06/1999
Title:
METHOD OF MAKING A SEMICONDUCTOR WITH COPPER PASSIVATING FILM
41
Patent #:
Issue Dt:
05/08/2001
Application #:
09370963
Filing Dt:
08/10/1999
Title:
USE OF A GETTER LAYER TO IMPROVE METAL TO METAL CONTACT RESISTANCE AT LOW RADIO FREQUENCY POWER
42
Patent #:
Issue Dt:
05/22/2001
Application #:
09375150
Filing Dt:
08/16/1999
Title:
SILICON-GERMANIUM TRANSISTOR AND ASSOCIATED METHODS
43
Patent #:
Issue Dt:
08/14/2001
Application #:
09376233
Filing Dt:
08/17/1999
Title:
INTEGRATED CIRCUIT DEVICE HAVING A PLANAR INTERLEVEL DIELECTRIC LAYER
44
Patent #:
Issue Dt:
03/27/2001
Application #:
09376696
Filing Dt:
08/18/1999
Title:
WAFER CARRIER HEAD FOR PREVENTION OF UNINTENTIONAL SEMICONDUCTOR WAFER ROTATION
45
Patent #:
Issue Dt:
04/27/2004
Application #:
09377386
Filing Dt:
08/19/1999
Title:
DIFFUSION PREVENTING BARRIER LAYER IN INTEGRATED CIRCUIT INTER-METAL LAYER DIELECTRICS
46
Patent #:
Issue Dt:
02/13/2001
Application #:
09378856
Filing Dt:
08/23/1999
Title:
PROCESS FOR DEUTERIUM PASSIVATION AND HOT CARRIER IMMUNITY
47
Patent #:
Issue Dt:
05/22/2001
Application #:
09382611
Filing Dt:
08/25/1999
Title:
GLOVE BOX FILTER SYSTEM
48
Patent #:
Issue Dt:
08/20/2002
Application #:
09388166
Filing Dt:
09/01/1999
Title:
PROCESS FOR FABRICATING ARTICLE HAVING SUBSTANTIAL THREE-DIMENSIONAL ORDER
49
Patent #:
Issue Dt:
03/26/2002
Application #:
09388203
Filing Dt:
09/01/1999
Title:
STACKED VIA KELVIN RESISTANCE TEST STRUCTURE FOR MEASURING CONTACT ANOMALIES IN MULTI-LEVEL METAL INTEGRATED CIRCUIT TECHNOLOGIES
50
Patent #:
Issue Dt:
02/26/2002
Application #:
09388297
Filing Dt:
09/01/1999
Title:
SEMICONDUCTOR DEVICE HAVING REGIONS OF INSULATING MATERIAL FORMED IN A SEMICONDUCTOR SUBSTRATE AND PROCESS OF MAKING THE DEVICE
51
Patent #:
Issue Dt:
05/14/2002
Application #:
09390181
Filing Dt:
09/07/1999
Title:
PLASMA CONFINEMENT SHIELD
52
Patent #:
Issue Dt:
11/27/2001
Application #:
09393032
Filing Dt:
09/09/1999
Title:
Method For Fabricating Molded Microstructures On Substrates
53
Patent #:
Issue Dt:
09/11/2001
Application #:
09395062
Filing Dt:
09/13/1999
Title:
ALIGNMENT OF OPENINGS IN SEMICONDUCTOR FABRICATION
54
Patent #:
Issue Dt:
12/11/2001
Application #:
09395507
Filing Dt:
09/14/1999
Title:
METHOD AND APPARATUS FOR DETERMINING TEMPERATURE OF A SEMICONDUCTOR WAFER DURING FABRICATION THEREOF
55
Patent #:
Issue Dt:
05/28/2002
Application #:
09397458
Filing Dt:
09/16/1999
Title:
PROCESS FOR IMPROVING LINE WIDTH VARIATIONS BETWEEN TIGHTLY SPACED AND ISOLATED FEATURES IN INTEGRATED CIRCUITS
56
Patent #:
Issue Dt:
06/18/2002
Application #:
09397459
Filing Dt:
09/16/1999
Title:
SEMICONDUCTOR DEVICE HAVING REDUCED LINE WIDTH VARIATIONS BETWEEN TIGHTLY SPACED AND ISOLATED FEATURES
57
Patent #:
Issue Dt:
06/26/2001
Application #:
09397716
Filing Dt:
09/16/1999
Title:
METHOD OF FABRICATING DEVICES USING AN ATTENUATED PHASE-SHIFTING MASK AND AN ATTENUATED PHASE-SHIFTING MASK
58
Patent #:
Issue Dt:
11/07/2000
Application #:
09398977
Filing Dt:
09/17/1999
Title:
MULTILEVEL WIRING STRUCTURE AND METHOD OF FABRICATING A MULTILEVEL WIRING STRUCTURE
59
Patent #:
Issue Dt:
08/28/2001
Application #:
09399621
Filing Dt:
09/20/1999
Title:
CORROSION-RESISTANT POLISHING PAD CONDITONER
60
Patent #:
Issue Dt:
05/29/2001
Application #:
09404702
Filing Dt:
09/23/1999
Title:
SEMICONDUCTOR WAFER FABRICATION
61
Patent #:
Issue Dt:
05/01/2001
Application #:
09405805
Filing Dt:
09/24/1999
Title:
METHOD FOR ENHANCING ANTIREFLECTIVE COATINGS USED IN PHOTOLIGHOGRAPHY OF ELECTRONIC DEVICES
62
Patent #:
Issue Dt:
12/05/2000
Application #:
09407575
Filing Dt:
09/28/1999
Title:
METHOD FOR ENHANCED DIELECTRIC FILM UNIFORMITY
63
Patent #:
Issue Dt:
11/27/2001
Application #:
09408299
Filing Dt:
09/29/1999
Title:
Method of forming capacitor having the lower electrope for preventing undesired pefects at the surface of the metal plug
64
Patent #:
Issue Dt:
11/27/2001
Application #:
09409115
Filing Dt:
09/30/1999
Title:
METHOD FOR MAKING INTEGRATED CIRCUITS INCLUDING FEATURES WITH A RELATIVELY SMALL CRITICAL DIMENSION
65
Patent #:
Issue Dt:
06/25/2002
Application #:
09410686
Filing Dt:
10/01/1999
Title:
PROCESS FOR FABRICATING COPPER INTERCONNECT FOR ULSI INTEGRATED CIRCUITS
66
Patent #:
Issue Dt:
07/22/2003
Application #:
09415529
Filing Dt:
10/08/1999
Title:
METHOD FOR CHEMICAL/MECHANICAL PLANARIZATION OF A SEMICONDUCTOR WAFER HAVING DISSIMILAR METAL PATTERN DENSITIES
67
Patent #:
Issue Dt:
02/13/2001
Application #:
09416336
Filing Dt:
10/12/1999
Title:
METHOD OF MANUFACTURING LATERAL HIGH-Q INDUCTOR FOR SEMICONDUCTOR DEVICES
68
Patent #:
Issue Dt:
09/18/2001
Application #:
09416348
Filing Dt:
10/12/1999
Title:
LATERAL HIGH-Q INDUCTOR FOR SEMICONDUCTOR DEVICES
69
Patent #:
Issue Dt:
08/27/2002
Application #:
09419986
Filing Dt:
10/18/1999
Title:
MICROSTRUCTURE CONTROL OF COPPER INTERCONNECTS
70
Patent #:
Issue Dt:
05/25/2004
Application #:
09420157
Filing Dt:
10/18/1999
Title:
ARTICLE COMPRISING ALIGNED NANOWIRES AND PROCESS FOR FABRICATING ARTICLE
71
Patent #:
Issue Dt:
01/28/2003
Application #:
09420234
Filing Dt:
10/19/1999
Title:
APPARATUS FOR MEASURING THERMOMECHANICAL PROPERTIES OF PHOTO-SENSITIVE MATERIALS
72
Patent #:
Issue Dt:
07/23/2002
Application #:
09425552
Filing Dt:
10/22/1999
Title:
METHOD FOR FORMING INTEGRATED CIRCUIT STRUCTURE HAVING LOW DIELECTRIC CONSTANT MATERIAL AND HAVING SILICON OXYNITRIDE CAPS OVER CLOSELY SPACED APART METAL LINES
73
Patent #:
Issue Dt:
07/03/2001
Application #:
09426017
Filing Dt:
10/25/1999
Title:
REFERENCE THICKNESS ENDPOINT TECHNIQUES FOR POLISHING OPERATIONS
74
Patent #:
Issue Dt:
06/29/2004
Application #:
09426061
Filing Dt:
10/22/1999
Title:
LOW DIELECTRIC CONSTANT SILICON OXIDE-BASED DIELECTRIC LAYER FOR INTEGRATED CIRCUIT STRUCTURES HAVING IMPROVED COMPATIBILITY WITH VIA FILLER MATERIALS, AND METHOD OF MAKING SAME
75
Patent #:
Issue Dt:
10/02/2001
Application #:
09426453
Filing Dt:
10/25/1999
Title:
IN-SITU NANO-INTERCONNECTED CIRCUIT DEVICES AND METHOD FOR MAKING THE SAME
76
Patent #:
Issue Dt:
01/22/2002
Application #:
09426457
Filing Dt:
10/05/1999
Title:
ARTICLE COMPRISING VERTICALLY NANO-INTERCONNECTED CIRCUIT DEVICES AND METHOD FOR MAKING THE SAME
77
Patent #:
Issue Dt:
03/12/2002
Application #:
09427306
Filing Dt:
10/26/1999
Title:
METHOD OF ELIMINATING AGGLOMERATE PARTICLES IN A POLISHING SLURRY
78
Patent #:
Issue Dt:
01/16/2001
Application #:
09427572
Filing Dt:
10/26/1999
Title:
PROCESS FOR FORMING METAL INTERCONNECT STACK FOR INTEGRATED CIRCUIT STRUCTURE
79
Patent #:
Issue Dt:
09/25/2001
Application #:
09430147
Filing Dt:
10/29/1999
Title:
METHOD FOR MAKING INTEGRATED CIRCUITS HAVING FEATURES WITH REDUCED CRITICAL DIMENSIONS
80
Patent #:
Issue Dt:
10/24/2000
Application #:
09430635
Filing Dt:
10/29/1999
Title:
MIGRATION FROM CONTROL WAFER TO PRODUCT WAFER PARTICLE CHECKS
81
Patent #:
Issue Dt:
09/04/2001
Application #:
09434424
Filing Dt:
11/04/1999
Title:
METHOD FOR MAKING FIELD EFFECT DEVICES AND CAPACITORS WITH THIN FILM DIELECTRICS AND RESULTING DEVICES
82
Patent #:
Issue Dt:
07/23/2002
Application #:
09437930
Filing Dt:
11/10/1999
Title:
TESTING INSULATION BETWEEN CONDUCTORS
83
Patent #:
Issue Dt:
11/14/2000
Application #:
09438642
Filing Dt:
11/12/1999
Title:
PROCESS FOR FORMING LOW K SILICON OXIDE DIELECTRIC MATERIAL WHILE SUPPRESSING PRESSURE SPIKING AND INHIBITING INCREASE IN DIELECTRIC CONSTANT
84
Patent #:
Issue Dt:
10/01/2002
Application #:
09439048
Filing Dt:
11/12/1999
Title:
METHOD AND SYSTEM FOR DETERMINING OPERATOR STAFFING
85
Patent #:
Issue Dt:
01/01/2002
Application #:
09441561
Filing Dt:
11/17/1999
Title:
METAL SILICIDE AS A BARRIER FOR MOM CAPACITORS IN CMOS TECHNOLOGIES
86
Patent #:
Issue Dt:
12/18/2001
Application #:
09441676
Filing Dt:
11/17/1999
Title:
METHOD OF FABRICATING A MOM CAPACITOR HAVING A METAL SILICIDE BARRIER
87
Patent #:
Issue Dt:
01/30/2001
Application #:
09442078
Filing Dt:
11/16/1999
Title:
METHOD AND APPARATUS FOR USING ACROSS WAFER BACK PRESSURE DIFFERENTIALS TO INFLUENCE THE PERFORMANCE OF CHEMICAL MECHANICAL POLISHING
88
Patent #:
Issue Dt:
06/12/2001
Application #:
09442688
Filing Dt:
11/18/1999
Title:
DISTRIBUTED COMMUNICATIONS SYSTEM FOR REDUCING EQUIPMENT DOWN-TIME
89
Patent #:
Issue Dt:
04/09/2002
Application #:
09444817
Filing Dt:
11/22/1999
Title:
METHOD OF POLISHING SEMICONDUCTOR STRUCTURES USING A TWO-STEP CHEMICAL MECHANICAL PLANARIZATION WITH SLURRY PARTICLES HAVING DIFFERENT PARTICLE BULK DENSITIES
90
Patent #:
Issue Dt:
06/10/2003
Application #:
09451053
Filing Dt:
11/30/1999
Title:
SURFACE TREATMENT ANNEAL OF HYDROGENATED SILICON-OXY-CARBIDE DIELECTRIC LAYER
91
Patent #:
Issue Dt:
10/02/2001
Application #:
09454257
Filing Dt:
12/02/1999
Title:
SLURRY FILLING A RECESS FORMED DURING SEMICONDUCTOR FABRICATION
92
Patent #:
Issue Dt:
12/11/2001
Application #:
09454909
Filing Dt:
12/03/1999
Title:
METHODS FOR FABRICATING A MULTILEVEL INTERCONNECTION FOR AN INTEGRATED CIRCUIT DEVICE UTILIZING A SELECTIVE OVERLAYER
93
Patent #:
Issue Dt:
03/06/2001
Application #:
09456210
Filing Dt:
12/07/1999
Title:
PROCESS FOR FABRICATING INTEGRATED CIRCUIT DEVICES HAVING THIN FILM TRANSISTORS
94
Patent #:
Issue Dt:
06/10/2003
Application #:
09456224
Filing Dt:
12/07/1999
Title:
METHOD OF FORMING AN ALIGNMENT FEATURE IN OR ON A MULTILAYERED SEMICONDUCTOR STRUCTURE
95
Patent #:
Issue Dt:
08/20/2002
Application #:
09456807
Filing Dt:
12/08/1999
Title:
ARTICLE COMPRISING A DIELECTRIC MATERIAL OF ZR-GE-TI-O OR HF-GE-TI-O AND METHOD OF MAKING THE SAME
96
Patent #:
Issue Dt:
03/25/2003
Application #:
09459708
Filing Dt:
12/13/1999
Title:
CURVILINEAR CHEMICAL MECHANICAL PLANARIZATION DEVICE AND METHOD
97
Patent #:
Issue Dt:
08/21/2001
Application #:
09464225
Filing Dt:
12/15/1999
Title:
CORROSION SENSITIVITY STRUCTURES FOR VIAS AND CONTACT HOLES IN INTEGRATED CIRCUITS
98
Patent #:
Issue Dt:
07/06/2004
Application #:
09464297
Filing Dt:
12/15/1999
Title:
PROCESS FOR ETCHING A CONTROLLABLE THICKNESS OF OXIDE ON AN INTEGRATED CIRCUIT STRUCTURE ON A SEMICONDUCTOR SUBSTRATE USING NITROGEN PLASMA AND PLASMA AND AN RF BIAS APPLIED TO THE SUBSTRATE
99
Patent #:
Issue Dt:
06/08/2004
Application #:
09465880
Filing Dt:
12/16/1999
Title:
METHOD AND APPARATUS FOR THICKNESS CONTROL AND REPRODUCIBILITY OF DIELECTRIC FILM DEPOSITION
100
Patent #:
Issue Dt:
05/08/2001
Application #:
09467340
Filing Dt:
12/20/1999
Title:
NON-LINEAR CIRCUIT ELEMENTS ON INTEGRATED CIRCUITS
Assignors
1
Exec Dt:
12/08/2017
2
Exec Dt:
12/08/2017
Assignee
1
401 N. MICHIGAN AVE.
SUITE 1600
CHICAGO, ILLINOIS 60611
Correspondence name and address
CHAD S. HILYARD
401 N. MICHIGAN AVE.
SUITE 1600
CHICAGO, IL 60611

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