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Reel/Frame:044886/0001   Pages: 107
Recorded: 12/17/2017
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 1129
Page 8 of 12
Pages: 1 2 3 4 5 6 7 8 9 10 11 12
1
Patent #:
NONE
Issue Dt:
Application #:
09968388
Filing Dt:
09/28/2001
Publication #:
Pub Dt:
04/03/2003
Title:
Method of ion implantation for achieving desired dopant concentration
2
Patent #:
Issue Dt:
10/29/2002
Application #:
09968944
Filing Dt:
10/02/2001
Title:
METHOD OF MAKING INTERCONNECT STRUCTURE INCLUDING DIAMOND BARRIER LAYER
3
Patent #:
Issue Dt:
11/11/2003
Application #:
09970392
Filing Dt:
10/03/2001
Publication #:
Pub Dt:
04/10/2003
Title:
LATENT DEFECT CLASSIFICATION SYSTEM
4
Patent #:
Issue Dt:
12/23/2003
Application #:
09972481
Filing Dt:
10/05/2001
Publication #:
Pub Dt:
01/02/2003
Title:
THIN FILM MULTI-LAYER HIGH Q TRANSFORMER FORMED IN A SEMICONDUCTOR SUBSTRATE
5
Patent #:
Issue Dt:
12/02/2003
Application #:
09974008
Filing Dt:
10/10/2001
Title:
HEAVIEST ONLY FAIL POTENTIAL
6
Patent #:
Issue Dt:
02/04/2003
Application #:
09974251
Filing Dt:
10/10/2001
Title:
LIQUID LEVEL HEIGHT MEASUREMENT SYSTEM
7
Patent #:
Issue Dt:
02/24/2004
Application #:
09978871
Filing Dt:
10/15/2001
Publication #:
Pub Dt:
03/28/2002
Title:
INTEGRATED CIRCUIT HAVING A MICROMAGNETIC DEVICE AND METHOD OF MANUFACTURE THEREFOR
8
Patent #:
Issue Dt:
02/21/2006
Application #:
09991202
Filing Dt:
11/14/2001
Title:
SHALLOW TRENCH ISOLATION STRUCTURE WITH LOW TRENCH PARASITIC CAPACITANCE
9
Patent #:
Issue Dt:
06/15/2004
Application #:
09992135
Filing Dt:
11/14/2001
Publication #:
Pub Dt:
05/02/2002
Title:
METHOD OF ELIMINATING AGGLOMERATE PARTICLES IN A POLISHING SLURRY
10
Patent #:
Issue Dt:
04/15/2003
Application #:
09994083
Filing Dt:
11/21/2001
Title:
METHOD AND APPARATUS FOR IMPROVING THE TOLERANCE OF INTEGRATED RESISTORS
11
Patent #:
Issue Dt:
05/11/2004
Application #:
09999848
Filing Dt:
10/24/2001
Title:
SHALLOW TRENCH ISOLATION STRUCTURE FOR LASER THERMAL PROCESSING
12
Patent #:
Issue Dt:
06/24/2003
Application #:
09999872
Filing Dt:
10/19/2001
Title:
FIRST STAGE SALICIDATION OF COBALT DURING COBALT DEPOSITION OR SUBSEQUENT TI OR TIN CAP DEPOSITION USING ENERGY FROM A DIRECTIONAL PLASMA
13
Patent #:
Issue Dt:
03/04/2003
Application #:
10002831
Filing Dt:
10/26/2001
Title:
PROCESS FOR FORMING COMPOSITE OF BARRIER LAYERS OF DIELECTRIC MATERIAL TO INHIBIT MIGRATION OF COPPER FROM COPPER METAL INTERCONNECT OF INTEGRATED CIRCUIT STRUCTURE INTO ADJACENT LAYER OF LOW K DIELECTRIC MATERIAL
14
Patent #:
Issue Dt:
09/02/2003
Application #:
10002981
Filing Dt:
10/26/2001
Title:
PROCESS FOR FORMING INTEGRATED CIRCUIT STRUCTURE COMPRISING LAYER OF LOW K DIELECTRIC MATERIAL HAVING ANTIREFLECTIVE PROPERTIES IN AN UPPER SURFACE
15
Patent #:
Issue Dt:
05/18/2004
Application #:
10003873
Filing Dt:
10/24/2001
Publication #:
Pub Dt:
04/24/2003
Title:
SEMICONDUCTOR DEVICE HAVING A DOPED LATTICE MATCHING LAYER AND A METHOD OF MANUFACTURE THEREFOR
16
Patent #:
Issue Dt:
05/20/2003
Application #:
10004461
Filing Dt:
11/01/2001
Title:
METHOD FOR CREATING SELF-ALIGNED ALLOY CAPPING LAYERS FOR COPPER INTERCONNECT STRUCTURES
17
Patent #:
Issue Dt:
04/22/2003
Application #:
10006540
Filing Dt:
11/30/2001
Title:
METHOD FOR PREVENTING BORDERLESS CONTACT TO WELL LEAKAGE
18
Patent #:
Issue Dt:
01/27/2004
Application #:
10007417
Filing Dt:
10/31/2001
Publication #:
Pub Dt:
05/01/2003
Title:
INTEGRATED CIRCUIT HAVING STRESS MIGRATION TEST STRUCTURE AND METHOD THEREFOR
19
Patent #:
Issue Dt:
06/08/2004
Application #:
10007904
Filing Dt:
10/31/2001
Publication #:
Pub Dt:
05/01/2003
Title:
STRESS MIGRATION TEST STRUCTURE AND METHOD THEREFOR
20
Patent #:
Issue Dt:
03/09/2004
Application #:
10008015
Filing Dt:
11/13/2001
Publication #:
Pub Dt:
05/15/2003
Title:
MICROELECTRONIC DEVICE LAYER DEPOSITED WITH MULTIPLE ELECTROLYTES
21
Patent #:
Issue Dt:
03/16/2004
Application #:
10008170
Filing Dt:
10/19/2001
Title:
HIGH SPEED LOW NOISE TRANSISTOR
22
Patent #:
Issue Dt:
04/06/2004
Application #:
10012847
Filing Dt:
12/10/2001
Title:
METHOD AND APPARATUS FOR DETECTING PRESENCE OF RESIDUAL POLISHING SLURRY SUBSEQUENT TO POLISHING OF A SEMICONDUCTOR WAFER
23
Patent #:
Issue Dt:
09/02/2003
Application #:
10013572
Filing Dt:
12/11/2001
Publication #:
Pub Dt:
06/12/2003
Title:
INTEGRATED INDUCTOR IN SEMICONDUCTOR MANUFACTURING
24
Patent #:
Issue Dt:
05/13/2003
Application #:
10015255
Filing Dt:
12/11/2001
Title:
CONTROL OF REACTION RATE IN FORMATION OF LOW K CARBON-CONTAINING SILICON OXIDE DIELECTRIC MATERIAL USING ORGANOSILANE, UNSUBSTITUTED SILANE, AND HYDROGEN PEROXIDE REACTANTS
25
Patent #:
Issue Dt:
02/03/2004
Application #:
10020084
Filing Dt:
12/13/2001
Title:
ANTI-REFLECTIVE COATINGS FOR USE AT 248 NM AND 193 NM
26
Patent #:
Issue Dt:
03/30/2004
Application #:
10025304
Filing Dt:
12/19/2001
Title:
METHOD OF PREVENTING RESIST POISONING IN DUAL DAMASCENE STRUCTURES
27
Patent #:
Issue Dt:
05/04/2004
Application #:
10026407
Filing Dt:
12/20/2001
Title:
METHOD OF FORMING SIGE GATE ELECTRODE
28
Patent #:
Issue Dt:
09/23/2003
Application #:
10028594
Filing Dt:
12/20/2001
Publication #:
Pub Dt:
10/24/2002
Title:
MICROMAGNETIC DEVICE HAVING ALLOY OF COBALT, PHOSPHORUS AND IRON
29
Patent #:
Issue Dt:
11/09/2004
Application #:
10028614
Filing Dt:
12/21/2001
Publication #:
Pub Dt:
06/26/2003
Title:
METHOD FOR MAKING A BIPOLAR TRANSISTOR WITH AN OXYGEN IMPLANTED EMITTER WINDOW
30
Patent #:
Issue Dt:
11/16/2004
Application #:
10033090
Filing Dt:
10/25/2001
Title:
UNIFORM AIRFLOW DIFFUSER
31
Patent #:
Issue Dt:
01/28/2003
Application #:
10033164
Filing Dt:
10/19/2001
Title:
PROCESS FOR FORMING HIGH DIELECTRIC CONSTANT GATE DIELECTRIC FOR INTEGRATED CIRCUIT STRUCTURE
32
Patent #:
Issue Dt:
11/30/2004
Application #:
10035346
Filing Dt:
12/28/2001
Title:
CMOS VARACTOR WITH CONSTANT DC/DV CHARACTERISTIC
33
Patent #:
Issue Dt:
06/01/2004
Application #:
10035501
Filing Dt:
10/25/2001
Title:
METHOD FOR GROWING THIN FILMS
34
Patent #:
Issue Dt:
04/27/2004
Application #:
10035704
Filing Dt:
10/18/2001
Title:
MULTI-STEP PROCESS FOR FORMING A BARRIER FILM FOR USE IN COPPER LAYER FORMATION
35
Patent #:
Issue Dt:
08/30/2005
Application #:
10036621
Filing Dt:
12/21/2001
Title:
VISCOUS ELECTROPOLISHING SYSTEM
36
Patent #:
Issue Dt:
07/13/2004
Application #:
10038734
Filing Dt:
12/31/2001
Publication #:
Pub Dt:
05/09/2002
Title:
METHOD FOR FABRICATING MOS DEVICE WITH HALO IMPLANTED REGION
37
Patent #:
Issue Dt:
01/11/2005
Application #:
10039508
Filing Dt:
11/09/2001
Title:
ADJUSTABLE TRANSMISSION PHASE SHIFT MASK
38
Patent #:
Issue Dt:
06/10/2003
Application #:
10047516
Filing Dt:
10/26/2001
Publication #:
Pub Dt:
05/15/2003
Title:
METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE EMPLOYING A FLUORINE-BASED ETCH SUBSTANTIALLY FREE OF HYDROGEN
39
Patent #:
Issue Dt:
04/27/2004
Application #:
10053097
Filing Dt:
01/18/2002
Publication #:
Pub Dt:
05/23/2002
Title:
APPARATUS AND METHOD FOR DETERMINING PROCESS WIDTH VARIATIONS IN INTEGRATED CIRCUITS
40
Patent #:
Issue Dt:
01/06/2004
Application #:
10053537
Filing Dt:
11/02/2001
Title:
METHOD FOR RETICLE FORMATION UTILIZING METAL VAPORIZATION
41
Patent #:
Issue Dt:
03/23/2004
Application #:
10055082
Filing Dt:
01/22/2002
Publication #:
Pub Dt:
07/24/2003
Title:
LOW VOLTAGE BREAKDOWN ELEMENT FOR ESD TRIGGER DEVICE
42
Patent #:
Issue Dt:
10/05/2004
Application #:
10055583
Filing Dt:
01/23/2002
Publication #:
Pub Dt:
07/24/2003
Title:
SYSTEM AND METHOD FOR THE ABATEMENT OF TOXIC CONSTITUENTS OF EFFLUENT GASES
43
Patent #:
Issue Dt:
03/23/2004
Application #:
10060002
Filing Dt:
01/29/2002
Title:
MULTI PATTERN RETICLE
44
Patent #:
Issue Dt:
06/22/2004
Application #:
10061519
Filing Dt:
02/01/2002
Title:
ELECTROCHEMICAL PLANARIZATION END POINT DETECTION
45
Patent #:
Issue Dt:
09/16/2003
Application #:
10067299
Filing Dt:
02/07/2002
Title:
VACUUM SEALED RF/MICROWAVE MICRORESONATOR
46
Patent #:
Issue Dt:
12/14/2004
Application #:
10078233
Filing Dt:
02/15/2002
Publication #:
Pub Dt:
08/21/2003
Title:
THICK TRACES FROM MULTIPLE DAMASCENE LAYERS
47
Patent #:
Issue Dt:
05/04/2004
Application #:
10080186
Filing Dt:
02/21/2002
Publication #:
Pub Dt:
07/25/2002
Title:
METHODS OF FABRICATING A METAL-OXIDE-METAL CAPACITOR
48
Patent #:
Issue Dt:
11/25/2003
Application #:
10094520
Filing Dt:
03/08/2002
Publication #:
Pub Dt:
09/11/2003
Title:
THERMAL LOW K DIELECTRICS
49
Patent #:
Issue Dt:
05/11/2004
Application #:
10106128
Filing Dt:
03/19/2002
Publication #:
Pub Dt:
09/25/2003
Title:
ANTI-BINDING DEPOSITION RING
50
Patent #:
Issue Dt:
04/12/2005
Application #:
10117487
Filing Dt:
04/05/2002
Publication #:
Pub Dt:
10/09/2003
Title:
DYNAMIC USE OF PROCESS TEMPERATURE
51
Patent #:
NONE
Issue Dt:
Application #:
10120707
Filing Dt:
04/11/2002
Publication #:
Pub Dt:
09/26/2002
Title:
Process for fabricating copper interconnect for ULSI integrated circuits
52
Patent #:
Issue Dt:
08/31/2004
Application #:
10120767
Filing Dt:
04/10/2002
Publication #:
Pub Dt:
10/16/2003
Title:
METHOD AND APPARATUS FOR DETECTION OF CHEMICAL MECHANICAL PLANARIZATION ENDPOINT AND DEVICE PLANARITY
53
Patent #:
Issue Dt:
06/15/2004
Application #:
10122645
Filing Dt:
04/12/2002
Publication #:
Pub Dt:
10/16/2003
Title:
CALIBRATION STANDARD FOR HIGH RESOLUTION ELECTRON MICROSCOPY
54
Patent #:
Issue Dt:
11/07/2006
Application #:
10123263
Filing Dt:
04/15/2002
Title:
METHOD AND APPARATUS FOR FORMING A MEMORY STRUCTURE HAVING AN ELECTRON AFFINITY REGION
55
Patent #:
Issue Dt:
08/10/2004
Application #:
10128534
Filing Dt:
04/23/2002
Publication #:
Pub Dt:
12/26/2002
Title:
WEB-BASED INTERFACE WITH DEFECT DATABASE TO VIEW AND UPDATE FAILURE EVENTS
56
Patent #:
Issue Dt:
02/06/2007
Application #:
10135383
Filing Dt:
05/01/2002
Publication #:
Pub Dt:
11/06/2003
Title:
METHOD FOR ANALYZING MANUFACTURING DATA
57
Patent #:
Issue Dt:
10/07/2003
Application #:
10140536
Filing Dt:
05/07/2002
Title:
METHOD AND APPARATUS FOR REMOVING WATER VAPOR AS A BYPRODUCT OF CHEMICAL REACTION IN A WAFER PROCESSING CHAMBER
58
Patent #:
Issue Dt:
12/07/2004
Application #:
10140616
Filing Dt:
05/07/2002
Publication #:
Pub Dt:
11/13/2003
Title:
SEMICONDUCTOR DEVICE HAVING AN INTERCONNECT THAT ELECTRICALLY CONNECTS A CONDUCTIVE MATERIAL AND A DOPED LAYER, AND A METHOD OF MANUFACTURE THEREFOR
59
Patent #:
Issue Dt:
01/27/2004
Application #:
10147384
Filing Dt:
05/16/2002
Publication #:
Pub Dt:
10/31/2002
Title:
A SEMICONDUCTOR DEVICE HAVING AN INTERCONNECT LAYER WITH A PLURALITY OF LAYOUT REGIONS HAVING SUBSTANTIALLY UNIFORM DENSITIES OF ACTIVE INTERCONNECTS AND DUMMY FILLS
60
Patent #:
Issue Dt:
09/28/2004
Application #:
10151887
Filing Dt:
05/22/2002
Publication #:
Pub Dt:
11/27/2003
Title:
FABRICATION PROCESS FOR A SEMICONDUCTOR DEVICE HAVING A METAL OXIDE DIELECTRIC MATERIAL WITH A HIGH DIELECTRIC CONSTANT, ANNEALED WITH A BUFFERED ANNEAL PROCESS
61
Patent #:
NONE
Issue Dt:
Application #:
10152879
Filing Dt:
05/21/2002
Publication #:
Pub Dt:
01/23/2003
Title:
Microstructure control of copper interconnects
62
Patent #:
Issue Dt:
09/21/2004
Application #:
10153011
Filing Dt:
05/21/2002
Publication #:
Pub Dt:
09/26/2002
Title:
INTEGRATED CIRCUIT STRUCTURE HAVING LOW DIELECTRIC CONSTANT MATERIAL AND HAVING SILICON OXYNITRIDE CAPS OVER CLOSELY SPACED APART METAL LINES
63
Patent #:
Issue Dt:
09/21/2004
Application #:
10153011
Filing Dt:
05/21/2002
Publication #:
Pub Dt:
09/26/2002
Title:
INTEGRATED CIRCUIT STRUCTURE HAVING LOW DIELECTRIC CONSTANT MATERIAL AND HAVING SILICON OXYNITRIDE CAPS OVER CLOSELY SPACED APART METAL LINES
64
Patent #:
Issue Dt:
02/03/2004
Application #:
10153231
Filing Dt:
05/21/2002
Publication #:
Pub Dt:
11/27/2003
Title:
SEMICONDUCTOR DEVICE BARRIER LAYER
65
Patent #:
Issue Dt:
01/20/2004
Application #:
10155173
Filing Dt:
05/28/2002
Publication #:
Pub Dt:
12/04/2003
Title:
HIGH K DIELECTRIC MATERIAL AND METHOD OF MAKING A HIGH K DIELECTRIC MATERIAL
66
Patent #:
Issue Dt:
03/23/2004
Application #:
10156242
Filing Dt:
05/24/2002
Publication #:
Pub Dt:
11/27/2003
Title:
ABNORMAL PHOTORESIST LINE/SPACE PROFILE DETECTION THROUGH SIGNAL PROCESSING OF METROLOGY WAVEFORM
67
Patent #:
Issue Dt:
03/08/2005
Application #:
10158641
Filing Dt:
05/30/2002
Title:
GROUNDING MECHANISM FOR SEMICONDUCTOR DEVICES
68
Patent #:
Issue Dt:
01/10/2006
Application #:
10158775
Filing Dt:
05/30/2002
Publication #:
Pub Dt:
12/04/2003
Title:
OVERLAY METROLOGY USING SCATTEROMETRY PROFILING
69
Patent #:
Issue Dt:
01/25/2005
Application #:
10159268
Filing Dt:
06/03/2002
Publication #:
Pub Dt:
05/01/2003
Title:
HOLDER, SYSTEM, AND PROCESS FOR IMPROVING OVERLAY IN LITHOGRAPHY
70
Patent #:
Issue Dt:
09/02/2003
Application #:
10160812
Filing Dt:
05/31/2002
Title:
COMPOSITE SPACER SCHEME WITH LOW OVERLAPPED PARASITIC CAPACITANCE
71
Patent #:
Issue Dt:
10/21/2003
Application #:
10164202
Filing Dt:
06/06/2002
Title:
ULTRA THIN BODY VERTICAL REPLACEMENT GATE MOSFET
72
Patent #:
Issue Dt:
04/29/2003
Application #:
10164909
Filing Dt:
06/07/2002
Title:
ARRANGEMENT AND METHOD FOR POLISHING A SURFACE OF A SEMICONDUCTOR WAFER
73
Patent #:
NONE
Issue Dt:
Application #:
10171701
Filing Dt:
06/14/2002
Publication #:
Pub Dt:
01/16/2003
Title:
Coupling capacitance reduction
74
Patent #:
Issue Dt:
07/12/2005
Application #:
10172849
Filing Dt:
06/17/2002
Publication #:
Pub Dt:
12/18/2003
Title:
METHOD TO IMPROVE THE CONTROL OF SOURCE CHEMICALS DELIVERY BY A CARRIER GAS
75
Patent #:
NONE
Issue Dt:
Application #:
10179057
Filing Dt:
06/25/2002
Publication #:
Pub Dt:
12/25/2003
Title:
Method and structure for graded gate oxides on vertical and non-planar surfaces
76
Patent #:
Issue Dt:
11/30/2004
Application #:
10180221
Filing Dt:
06/25/2002
Publication #:
Pub Dt:
12/25/2003
Title:
APPARATUS FOR SCANNING A CRYSTALLINE SAMPLE AND ASSOCIATED METHODS
77
Patent #:
Issue Dt:
08/10/2004
Application #:
10180661
Filing Dt:
06/25/2002
Title:
METHOD AND STRUCTURE FOR FORMING DIELECTRIC LAYERS HAVING REDUCED DIELECTRIC CONSTANTS
78
Patent #:
Issue Dt:
01/25/2005
Application #:
10180910
Filing Dt:
06/25/2002
Publication #:
Pub Dt:
12/25/2003
Title:
CAPACITOR FOR A SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATION THEREFOR
79
Patent #:
Issue Dt:
03/02/2004
Application #:
10185537
Filing Dt:
07/01/2002
Title:
METHOD OF FABRICATING AN INTEGRAL CAPACITOR AND GATE TRANSISTOR HAVING NITRIDE AND OXIDE POLISH STOP LAYERS USING CHEMICAL MECHANICAL POLISHING ELIMINATION
80
Patent #:
Issue Dt:
01/06/2004
Application #:
10194578
Filing Dt:
07/12/2002
Title:
THIN FILM CMOS CALIBRATION STANDARD HAVING PROTECTIVE COVER LAYER
81
Patent #:
Issue Dt:
01/06/2004
Application #:
10195775
Filing Dt:
07/12/2002
Title:
METHOD OF REDUCING PROCESS PLASMA DAMAGE USING OPTICAL SPECTROSCOPY
82
Patent #:
Issue Dt:
09/07/2004
Application #:
10196787
Filing Dt:
07/17/2002
Publication #:
Pub Dt:
11/28/2002
Title:
EXHAUST FLOW CONTROL SYSTEM
83
Patent #:
Issue Dt:
10/19/2004
Application #:
10197956
Filing Dt:
07/16/2002
Title:
ADAPTIVE OFF TESTER SCREENING METHOD BASED ON INTRINSIC DIE PARAMETRIC MEASUREMENTS
84
Patent #:
Issue Dt:
01/04/2005
Application #:
10200233
Filing Dt:
07/23/2002
Publication #:
Pub Dt:
01/29/2004
Title:
PROCESS FOR FABRICATING A MASK
85
Patent #:
Issue Dt:
06/22/2004
Application #:
10200469
Filing Dt:
07/18/2002
Title:
PROCESS AND APPARATUS FOR WAFER EDGE PROFILE CONTROL USING GAS FLOW CONTROL RING
86
Patent #:
Issue Dt:
07/20/2004
Application #:
10207607
Filing Dt:
07/29/2002
Publication #:
Pub Dt:
01/29/2004
Title:
METHOD TO IMPROVE THE RESOLUTION OF A PHOTOLITHOGRAPHY SYSTEM BY USE OF A COUPLING LAYER BETWEEN THE PHOTO RESIST AND THE ARC
87
Patent #:
Issue Dt:
11/25/2003
Application #:
10211674
Filing Dt:
08/02/2002
Publication #:
Pub Dt:
03/27/2003
Title:
CMOS INTEGRATED CIRCUIT HAVING VERTICAL TRANSISTORS AND A PROCESS FOR FABRICATING SAME
88
Patent #:
Issue Dt:
05/27/2003
Application #:
10216425
Filing Dt:
08/08/2002
Title:
METHOD OF REDUCING THE EFFECT OF IMPLANTATION DAMAGE TO SHALLOW TRENCH ISOLATION REGIONS DURING THE FORMATION OF VARIABLE THICKNESS GATE LAYERS
89
Patent #:
NONE
Issue Dt:
Application #:
10224220
Filing Dt:
08/20/2002
Publication #:
Pub Dt:
12/26/2002
Title:
Transistor fabrication method
90
Patent #:
Issue Dt:
03/22/2005
Application #:
10226930
Filing Dt:
08/22/2002
Publication #:
Pub Dt:
03/11/2004
Title:
ELECTRO-MECHANICAL DEVICE HAVING A CHARGE DISSIPATION LAYER AND A METHOD OF MANUFACTURE THEREFOR
91
Patent #:
Issue Dt:
03/01/2005
Application #:
10228859
Filing Dt:
08/27/2002
Publication #:
Pub Dt:
01/09/2003
Title:
CAPACITOR HAVING A TANTALUM LOWER ELECTRODE AND METHOD OF FORMING THE SAME
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Patent #:
Issue Dt:
10/24/2006
Application #:
10234354
Filing Dt:
09/03/2002
Publication #:
Pub Dt:
03/04/2004
Title:
PROTRUDING SPACERS FOR SELF-ALIGNED CONTACTS
93
Patent #:
Issue Dt:
05/11/2004
Application #:
10238073
Filing Dt:
09/09/2002
Publication #:
Pub Dt:
04/03/2003
Title:
DIAMOND BARRIER LAYER
94
Patent #:
Issue Dt:
01/11/2005
Application #:
10242165
Filing Dt:
09/11/2002
Publication #:
Pub Dt:
03/11/2004
Title:
GLOBAL CHIP INTERCONNECT
95
Patent #:
Issue Dt:
04/26/2005
Application #:
10243562
Filing Dt:
09/13/2002
Title:
OPTICAL ERROR MINIMIZATION IN A SEMICONDUCTOR MANUFACTURING APPARATUS
96
Patent #:
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02/15/2005
Application #:
10245219
Filing Dt:
09/17/2002
Title:
LOW-LOSS ON-CHIP TRANSMISSION LINE FOR INTEGRATED CIRCUIT STRUCTURES AND METHOD OF MANUFACTURE
97
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07/31/2007
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10245447
Filing Dt:
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Pub Dt:
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Title:
METHOD FOR FORMING METAL SILICIDE REGIONS IN AN INTEGRATED CIRCUIT
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12/12/2006
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Filing Dt:
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03/25/2004
Title:
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03/30/2004
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Filing Dt:
09/24/2002
Publication #:
Pub Dt:
01/23/2003
Title:
PROCESS FOR PLANARIZATION OF INTEGRATED CIRCUIT STRUCTURE WHICH INHIBITS CRACKING OF LOW DIELECTRIC CONSTANT DIELECTRIC MATERIAL ADJACENT UNDERLYING RAISED STRUCTURES
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Patent #:
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02/10/2004
Application #:
10256466
Filing Dt:
09/27/2002
Publication #:
Pub Dt:
04/03/2003
Title:
HIGH DOPANT CONCENTRATION DIFFUSED RESISTOR AND METHOD OF MANUFACTURE THEREFOR
Assignors
1
Exec Dt:
12/08/2017
2
Exec Dt:
12/08/2017
Assignee
1
401 N. MICHIGAN AVE.
SUITE 1600
CHICAGO, ILLINOIS 60611
Correspondence name and address
CHAD S. HILYARD
401 N. MICHIGAN AVE.
SUITE 1600
CHICAGO, IL 60611

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