Total properties:
1095
Page
7
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11
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1 2 3 4 5 6 7 8 9 10 11
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Patent #:
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Issue Dt:
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04/23/2002
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Application #:
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09695534
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Filing Dt:
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10/24/2000
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Title:
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DIRECT CURRENT DECHUCKING SYSTEM
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Patent #:
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Issue Dt:
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07/09/2002
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Application #:
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09703745
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Filing Dt:
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10/31/2000
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Title:
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PROCESS FOR PLANARIZATION OF METAL-FILLED TRENCHES OF INTEGRATED CIRCUIT STRUCTURES BY FORMING A LAYER OF PLANARIZABLE MATERIAL OVER THE METAL LAYER PRIOR TO PLANARIZING
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Patent #:
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Issue Dt:
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07/23/2002
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Application #:
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09704164
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Filing Dt:
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10/31/2000
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Title:
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PROCESS FOR FORMING LOW K DIELECTRIC MATERIAL BETWEEN METAL LINES
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Patent #:
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Issue Dt:
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07/16/2002
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Application #:
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09704635
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Filing Dt:
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11/01/2000
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Title:
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PROCESS FOR INHIBITING CRACK FORMATION IN LOW DIELECTRIC CONSTANT DIELECTRIC FILMS OF INTEGRATED CIRCUIT STRUCTURE
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Patent #:
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Issue Dt:
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07/08/2003
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Application #:
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09712732
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Filing Dt:
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11/14/2000
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Title:
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SYSTEM AND METHOD FOR REMOVAL OF MATERIAL
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Patent #:
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Issue Dt:
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02/25/2003
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Application #:
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09723434
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Filing Dt:
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11/27/2000
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Title:
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METAL-INSULATOR-METAL CAPACITOR FORMED BY DAMASCENE PROCESSES BETWEEN METAL INTERCONNECT LAYERS AND METHOD OF FORMING SAME
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Patent #:
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Issue Dt:
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08/20/2002
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Application #:
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09723516
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Filing Dt:
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11/28/2000
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Title:
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SILICON NITRIDE AND SILICON DIOXIDE GATE INSULATOR TRANSISTORS AND METHOD OF FORMING SAME IN A HYBRID INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
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09/24/2002
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Application #:
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09723557
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Filing Dt:
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11/28/2000
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Title:
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BARRIER FOR COPPER METALLIZATION
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Patent #:
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Issue Dt:
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02/18/2003
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Application #:
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09724225
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Filing Dt:
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11/28/2000
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Title:
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METHOD OF REDUCING SILICON OXYNITRIDE GATE INSULATOR THICKNESS IN SOME TRANSISTORS OF A HYBIRD INTEGRATED CIRCUIT TO OBTAIN INCREASED DIFFERENTIAL IN GATE INSULATOR THICKNESS WITH OTHER TRANSISTORS OF THE HYBIRD CIRCUIT
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Patent #:
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Issue Dt:
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04/08/2003
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Application #:
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09724444
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Filing Dt:
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11/28/2000
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Title:
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SILICON GERMANIUM CMOS CHANNEL
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Patent #:
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Issue Dt:
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04/29/2003
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Application #:
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09725631
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Filing Dt:
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11/29/2000
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Title:
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DEVICE FREQUENCY MEASUREMENT SYSTEM
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Patent #:
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Issue Dt:
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10/14/2003
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Application #:
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09727014
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Filing Dt:
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11/30/2000
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Publication #:
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Pub Dt:
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05/30/2002
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Title:
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MASS SPECTROMETER PARTICLE COUNTER
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Patent #:
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Issue Dt:
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08/13/2002
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Application #:
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09727195
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Filing Dt:
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11/30/2000
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Publication #:
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Pub Dt:
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05/30/2002
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Title:
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METHOD OF MANUFACTURING AN INTERCONNECT STRUCTURE HAVING A PASSIVATION LAYER FOR PREVENTING SUBSEQUENT PROCESSING REACTIONS
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Patent #:
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Issue Dt:
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12/31/2002
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Application #:
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09728448
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Filing Dt:
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12/01/2000
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Publication #:
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Pub Dt:
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06/06/2002
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Title:
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METHOD FOR MAKING AN INTEGRATED CIRCUIT DEVICE WITH DIELECTRICALLY ISOLATED TUBS AND RELATED CIRCUIT
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Patent #:
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Issue Dt:
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06/10/2003
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Application #:
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09733570
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Filing Dt:
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12/08/2000
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Publication #:
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Pub Dt:
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06/13/2002
| | | | |
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Title:
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METHODS FOR DEUTERIUM SINTERING
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Patent #:
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Issue Dt:
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08/07/2001
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Application #:
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09737504
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Filing Dt:
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12/15/2000
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Publication #:
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Pub Dt:
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05/10/2001
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Title:
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Apparatus for enhancing image contrast using intensity filtration
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Patent #:
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Issue Dt:
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06/10/2003
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Application #:
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09741568
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Filing Dt:
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12/19/2000
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Publication #:
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Pub Dt:
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06/20/2002
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Title:
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CARBON-DOPED HARD MASK AND METHOD OF PASSIVATING STRUCTURES DURING SEMICONDUCTOR DEVICE FABRICATION
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Patent #:
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Issue Dt:
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09/21/2004
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Application #:
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09742314
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Filing Dt:
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12/21/2000
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Publication #:
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Pub Dt:
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06/27/2002
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Title:
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INTER-WIRING-LAYER CAPACITORS
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Patent #:
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Issue Dt:
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10/08/2002
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Application #:
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09747638
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Filing Dt:
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12/22/2000
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Title:
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INTEGRATED CIRCUIT FABRICATION DUAL PLASMA PROCESS WITH SEPARATE INTRODUCTION OF DIFFERENT GASES INTO GAS FLOW
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Patent #:
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Issue Dt:
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08/27/2002
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Application #:
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09750639
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Filing Dt:
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12/28/2000
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Title:
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ARRANGEMENT AND METHOD FOR POLISHING A SURFACE OF A SEMICONDUCTOR WAFER
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Patent #:
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Issue Dt:
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03/12/2002
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Application #:
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09754429
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Filing Dt:
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01/04/2001
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Publication #:
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Pub Dt:
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09/13/2001
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Title:
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Method and apparatus for detecting a planarized outer layer of a semiconductor wafer with a confocal optical system
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Patent #:
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Issue Dt:
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05/04/2004
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Application #:
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09754611
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Filing Dt:
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01/04/2001
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Publication #:
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Pub Dt:
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07/04/2002
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Title:
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MEASUREMENT TECHNIQUE FOR ULTRA-THIN OXIDES
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Patent #:
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Issue Dt:
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04/19/2011
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Application #:
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09755826
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Filing Dt:
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01/04/2001
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Publication #:
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Pub Dt:
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12/13/2001
| | | | |
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Title:
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METHOD OF MANUFACTURING A LATERALLY DIFFUSED METAL OXIDE SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
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12/29/2009
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Application #:
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09755828
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Filing Dt:
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01/04/2001
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Publication #:
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Pub Dt:
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12/06/2001
| | | | |
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Title:
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METHOD FOR MANUFACTURING A LATERALLY DIFFUSED METAL OXIDE SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
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12/16/2003
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Application #:
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09756965
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Filing Dt:
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01/08/2001
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Publication #:
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Pub Dt:
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09/05/2002
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Title:
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NON-CONTACT METHOD FOR DETERMINING QUALITY OF SEMICONDUCTOR DIELECTRICS
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Patent #:
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Issue Dt:
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06/15/2004
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Application #:
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09767477
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Filing Dt:
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01/23/2001
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Publication #:
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Pub Dt:
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07/25/2002
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Title:
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BIPOLAR DEVICE
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Patent #:
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NONE
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Issue Dt:
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Application #:
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09777470
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Filing Dt:
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02/06/2001
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Publication #:
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Pub Dt:
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08/08/2002
| | | | |
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Title:
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Conditioning wheel for conditioning a semiconductor wafer polishing pad and method of manufacture thereof
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Patent #:
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Issue Dt:
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03/09/2004
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Application #:
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09778986
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Filing Dt:
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02/07/2001
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Publication #:
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Pub Dt:
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08/08/2002
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Title:
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CONDITIONING WHEEL FOR CONDITIONING A SEMICONDUCTOR WAFER POLISHING PAD AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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10/08/2002
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Application #:
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09785636
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Filing Dt:
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02/16/2001
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Publication #:
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Pub Dt:
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10/10/2002
| | | | |
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Title:
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METHOD OF MANUFACTURING A POLISHING PAD USING A BEAM
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Patent #:
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Issue Dt:
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09/30/2003
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Application #:
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09789254
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Filing Dt:
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02/20/2001
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Publication #:
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Pub Dt:
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08/23/2001
| | | | |
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Title:
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METHOD FOR FABRICATING A MERGED INTEGRATED CIRCUIT DEVICE
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Patent #:
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Issue Dt:
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11/26/2002
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Application #:
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09790821
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Filing Dt:
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02/22/2001
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Publication #:
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Pub Dt:
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06/28/2001
| | | | |
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Title:
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PROCESS FOR MAKING INTEGRATED CIRCUIT STRUCTURE WITH THIN DIELECTRIC BETWEEN AT LEAST LOCAL INTERCONNECT LEVEL AND FIRST METAL INTERCONNECT LEVEL
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Patent #:
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Issue Dt:
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06/03/2003
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Application #:
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09792683
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Filing Dt:
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02/23/2001
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Publication #:
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Pub Dt:
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08/29/2002
| | | | |
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Title:
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PROCESS FOR FORMING A LOW DIELECTRIC CONSTANT FLUORINE AND CARBON-CONTAINING SILICON OXIDE DIELECTRIC MATERIAL
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Patent #:
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Issue Dt:
|
02/22/2005
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Application #:
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09792685
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Filing Dt:
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02/23/2001
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Publication #:
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Pub Dt:
|
08/29/2002
| | | | |
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Title:
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PROCESS FOR FORMING A LOW DIELECTRIC CONSTANT FLUORINE AND CARBON-CONTAINING SILICON OXIDE DIELECTRIC MATERIAL CHARACTERIZED BY IMPROVED RESISTANCE TO OXIDATION
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Patent #:
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Issue Dt:
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11/18/2003
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Application #:
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09792691
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Filing Dt:
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02/23/2001
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Publication #:
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Pub Dt:
|
08/29/2002
| | | | |
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Title:
|
PROCESS FOR FORMING A LOW DIELECTRIC CONSTANT FLUORINE AND CARBON-CONTAINING SILICON OXIDE DIELECTRIC MATERIAL CHARACTERIZED BY IMPROVED RESISTANCE TO OXIDATION
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Patent #:
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|
Issue Dt:
|
06/25/2002
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Application #:
|
09800049
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Filing Dt:
|
03/05/2001
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Publication #:
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Pub Dt:
|
07/26/2001
| | | | |
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Title:
|
SIMPLIFIED HIGH Q INDUCTOR SUBSTRATE
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Patent #:
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|
Issue Dt:
|
07/01/2003
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Application #:
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09804783
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Filing Dt:
|
03/13/2001
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Publication #:
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Pub Dt:
|
09/19/2002
| | | | |
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Title:
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METAL PLANARIZATION SYSTEM
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Patent #:
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Issue Dt:
|
06/04/2002
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Application #:
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09818799
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Filing Dt:
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03/27/2001
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Publication #:
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Pub Dt:
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09/20/2001
| | | | |
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Title:
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Electron emitters for lithography tools
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Patent #:
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Issue Dt:
|
10/01/2002
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Application #:
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09833251
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Filing Dt:
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04/11/2001
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Title:
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PLATED THROUGH HOLE INTERCONNECTIONS
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Patent #:
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Issue Dt:
|
03/02/2004
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Application #:
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09836365
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Filing Dt:
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04/16/2001
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Publication #:
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Pub Dt:
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12/19/2002
| | | | |
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Title:
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METHOD OF COIL PREPARATION FOR IONIZED METAL PLASMA PROCESS AND METHOD OF MANUFACTURING INTEGRATED CIRCUITS
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Patent #:
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|
Issue Dt:
|
11/29/2005
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Application #:
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09842214
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Filing Dt:
|
04/25/2001
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Publication #:
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Pub Dt:
|
11/14/2002
| | | | |
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Title:
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METHOD OF FABRICATING SUB-MICRON HEMISPHERICAL AND HEMICYLIDRICAL STRUCTURES FROM NON-SPHERICALLY SHAPED TEMPLATES
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Patent #:
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Issue Dt:
|
07/27/2004
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Application #:
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09844352
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Filing Dt:
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04/27/2001
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Title:
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IN SITU LINER BARRIER
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Patent #:
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Issue Dt:
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08/12/2003
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Application #:
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09853317
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Filing Dt:
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05/11/2001
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Publication #:
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Pub Dt:
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11/14/2002
| | | | |
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Title:
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METHOD OF CREATING HYDROGEN ISOTOPE RESERVOIRS IN A SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
|
04/16/2002
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Application #:
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09854753
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Filing Dt:
|
05/15/2001
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|
Publication #:
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Pub Dt:
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10/18/2001
| | | | |
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Title:
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Process for fabricating a projection electron lithography mask and a removable, reusable cover for use therein
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Patent #:
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|
Issue Dt:
|
11/05/2002
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Application #:
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09861839
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Filing Dt:
|
05/21/2001
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Publication #:
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Pub Dt:
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10/04/2001
| | | | |
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Title:
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METHOD FOR PRODUCING DEVICES HAVING PIEZOELECTRIC FILMS
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Patent #:
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Issue Dt:
|
08/26/2003
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Application #:
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09863437
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Filing Dt:
|
05/24/2001
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Publication #:
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Pub Dt:
|
12/12/2002
| | | | |
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Title:
|
PROCESS FOR PATTERNING A MEMBRANE
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Patent #:
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NONE
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Issue Dt:
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Application #:
|
09863979
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Filing Dt:
|
05/23/2001
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Publication #:
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Pub Dt:
|
12/13/2001
| | | | |
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Title:
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Method and apparatus for deposition of porous silica dielectrics
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Patent #:
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Issue Dt:
|
01/14/2003
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Application #:
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09865900
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Filing Dt:
|
05/25/2001
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|
Publication #:
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Pub Dt:
|
11/28/2002
| | | | |
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Title:
|
SELF ALIGNED GATE
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|
|
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Patent #:
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Issue Dt:
|
03/16/2004
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Application #:
|
09867202
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Filing Dt:
|
05/29/2001
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|
Publication #:
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Pub Dt:
|
01/10/2002
| | | | |
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Title:
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METHOD OF FORMING AN ALIGNMENT FEATURE IN OR ON A MULTI-LAYERED SEMICONDUCTOR STRUCTURE
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|
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Patent #:
|
|
Issue Dt:
|
05/06/2003
|
Application #:
|
09870851
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Filing Dt:
|
05/30/2001
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|
Title:
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SLOPED SIDEWALL VIA FOR INTEGRATED CIRCUIT STRUCTURE TO SUPPRESS VIA POISONING AND PROCESS FOR FORMING SAME
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|
|
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Patent #:
|
|
Issue Dt:
|
06/24/2003
|
Application #:
|
09872058
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Filing Dt:
|
05/31/2001
|
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Title:
|
PROCESS FOR FORMING A LOW K CARBON-DOPED SILICON OXIDE DIELECTRIC MATERIAL ON AN INTEGRATED CIRCUIT STRUCTURE
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|
|
|
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Patent #:
|
|
Issue Dt:
|
05/13/2003
|
Application #:
|
09873043
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Filing Dt:
|
05/31/2001
|
|
Title:
|
PROCESS FOR REMOVAL OF RESIST MASK OVER LOW K CARBON-DOPED SILICON OXIDE DIELECTRIC MATERIAL OF AN INTEGRATED CIRCUIT STRUCTURE, AND REMOVAL OF RESIDUES FROM VIA ETCH AND RESIST MASK REMOVAL
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Patent #:
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Issue Dt:
|
11/19/2002
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Application #:
|
09878657
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Filing Dt:
|
06/11/2001
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|
Publication #:
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Pub Dt:
|
10/11/2001
| | | | |
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Title:
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SEMICONDUCTOR DEVICE STRUCTURE INCLUDING A TANTALUM PENTOXIDE LAYER SANDWICHED BETWEEN SILICON NITRIDE LAYERS
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Patent #:
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Issue Dt:
|
01/14/2003
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Application #:
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09878690
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Filing Dt:
|
06/11/2001
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Publication #:
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Pub Dt:
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12/12/2002
| | | | |
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Title:
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METHOD OF FORMING A REVERSE GATE STRUCTURE WITH A SPIN ON GLASS PROCESS
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Patent #:
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Issue Dt:
|
12/24/2002
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Application #:
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09878741
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Filing Dt:
|
06/11/2001
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Title:
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OPTICAL INTENSITY MODIFIER
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Patent #:
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Issue Dt:
|
12/17/2002
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Application #:
|
09879642
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Filing Dt:
|
06/12/2001
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Title:
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METHOD AND APPRATUS FOR REMOVING PHOTORESIST EDGE BEADS FROM THIN FILM SUBSTRATES
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Patent #:
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Issue Dt:
|
03/08/2005
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Application #:
|
09882911
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Filing Dt:
|
06/15/2001
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Publication #:
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Pub Dt:
|
12/19/2002
| | | | |
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Title:
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SEMICONDUCTOR DEVICE HAVING A GHOST SOURCE/DRAIN REGION AND A METHOD OF MANUFACTURE THEREFOR
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Patent #:
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Issue Dt:
|
09/09/2003
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Application #:
|
09885497
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Filing Dt:
|
06/19/2001
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Title:
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METHOD OF SHALLOW TRENCH ISOLATION FORMATION AND PLANARIZATION
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Patent #:
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Issue Dt:
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11/18/2003
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Application #:
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09886780
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Filing Dt:
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06/21/2001
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Publication #:
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Pub Dt:
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11/01/2001
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Title:
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INTEGRATED CIRCUIT HAVING A MICROMAGNETIC DEVICE AND METHOD OF MANUFACTURE THEREFOR
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Patent #:
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Issue Dt:
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04/06/2004
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Application #:
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09887938
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Filing Dt:
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06/22/2001
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Publication #:
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Pub Dt:
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01/02/2003
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Title:
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FERRITE FILM FORMATION METHOD AND APPARATUS
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Patent #:
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Issue Dt:
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06/08/2004
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Application #:
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09888302
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Filing Dt:
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06/21/2001
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Title:
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WAFER HOLDER FOR BACKSIDE VIEWING FRONTSIDE PROBING ON AUTOMATED WAFER PROBE STATIONS
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Patent #:
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Issue Dt:
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08/27/2002
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Application #:
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09894117
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Filing Dt:
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06/28/2001
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Publication #:
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Pub Dt:
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11/01/2001
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Title:
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POLISHING FLUID, POLISHING METHOD, SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE FABRICATION METHOD
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Patent #:
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Issue Dt:
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11/02/2004
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Application #:
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09896363
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Filing Dt:
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06/28/2001
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Title:
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DUAL LAYER BARRIER FILM TECHNIQUES TO PREVENT RESIST POISONING
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Patent #:
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Issue Dt:
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06/10/2003
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Application #:
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09896669
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Filing Dt:
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06/29/2001
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Publication #:
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Pub Dt:
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01/02/2003
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Title:
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ELECTROSTATIC DISCHARGE PROTECTION IN DOUBLE DIFFUSED MOS TRANSISTORS
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Patent #:
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Issue Dt:
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01/20/2004
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Application #:
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09897517
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Filing Dt:
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06/29/2001
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Title:
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SHALLOW JUNCTION FORMATION
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Patent #:
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Issue Dt:
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01/06/2004
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Application #:
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09898194
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Filing Dt:
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07/02/2001
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Title:
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PROCESS FOR REMOVAL OF PHOTORESIST MASK USED FOR MAKING VIAS IN LOW K CARBON-DOPED SILICON OXIDE DIELECTRIC MATERIAL, AND FOR REMOVAL OF ETCH RESIDUES FROM FORMATION OF VIAS AND REMOVAL OF PHOTORESIST MASK
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Patent #:
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Issue Dt:
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06/10/2003
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Application #:
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09898267
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Filing Dt:
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07/03/2001
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Title:
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REDUCED PARTICULATE ETCHING
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Patent #:
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Issue Dt:
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01/28/2003
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Application #:
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09902358
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Filing Dt:
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07/10/2001
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Publication #:
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Pub Dt:
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01/16/2003
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Title:
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DEVICE HAVING A HIGH DIELECTRIC CONSTANT MATERIAL AND A METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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12/03/2002
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Application #:
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09907424
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Filing Dt:
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07/17/2001
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Title:
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BARRIER AND SEED LAYER SYSTEM
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Patent #:
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Issue Dt:
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04/01/2003
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Application #:
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09917365
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Filing Dt:
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07/27/2001
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Publication #:
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Pub Dt:
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11/15/2001
| | | | |
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Title:
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PROCESS FOR MAKING MIXED METAL OXIDES
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Patent #:
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Issue Dt:
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03/23/2004
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Application #:
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09918183
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Filing Dt:
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07/30/2001
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Title:
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WAFER LEVEL DYNAMIC BURN IN
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Patent #:
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Issue Dt:
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01/27/2004
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Application #:
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09927194
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Filing Dt:
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08/10/2001
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Publication #:
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Pub Dt:
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12/13/2001
| | | | |
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Title:
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GAAS MOSFET HAVING LOW CAPACITANCE AND ON-RESISTANCE AND METHOD OF MANUFACTURING THE SAME
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Patent #:
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Issue Dt:
|
05/25/2004
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Application #:
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09929188
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Filing Dt:
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08/14/2001
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Publication #:
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Pub Dt:
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02/20/2003
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Title:
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INTERDIGITATED CAPACITOR AND METHOD OF MANUFACTURING THEREOF
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Patent #:
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Issue Dt:
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04/20/2004
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Application #:
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09932527
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Filing Dt:
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08/17/2001
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Title:
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PROCESS FOR REDUCING DEFECTS IN COPPER-FILLED VIAS AND/OR TRENCHES FORMED IN POROUS LOW-K DIELECTRIC MATERIAL
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Patent #:
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Issue Dt:
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06/03/2003
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Application #:
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09940126
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Filing Dt:
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08/27/2001
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Publication #:
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Pub Dt:
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04/25/2002
| | | | |
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Title:
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SEMICONDUCTOR DEVICE HAVING A METAL GATE WITH A WORK FUNCTION COMPATIBLE WITH A SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
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08/25/2009
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Application #:
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09942330
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Filing Dt:
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08/29/2001
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Title:
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ARRANGEMENT AND METHOD FOR ABATING EFFLUENT FROM A PROCESS
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Patent #:
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Issue Dt:
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10/13/2009
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Application #:
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09943196
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Filing Dt:
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08/30/2001
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Title:
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ARRANGEMENT AND METHOD FOR FABRICATING A SEMICONDUCTOR WAFER
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Patent #:
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Issue Dt:
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02/18/2003
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Application #:
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09943403
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Filing Dt:
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08/30/2001
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Title:
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SEMICONDUCTOR WAFER ARRANGEMENT AND METHOD OF PROCESSING A SEMICONDUCTOR WAFER
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Patent #:
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Issue Dt:
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11/18/2003
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Application #:
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09946253
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Filing Dt:
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09/05/2001
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Title:
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CHEMICAL MECHANICAL POLISHING PAD
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Patent #:
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Issue Dt:
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04/16/2002
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Application #:
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09946895
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Filing Dt:
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09/05/2001
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Title:
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METHOD FOR CMP ENDPOINT DETECTION
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Patent #:
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Issue Dt:
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02/10/2004
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Application #:
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09950384
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Filing Dt:
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09/10/2001
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Publication #:
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Pub Dt:
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03/13/2003
| | | | |
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Title:
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VERTICAL REPLACEMENT-GATE JUNCTION FIELD-EFFECT TRANSISTOR
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Patent #:
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Issue Dt:
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02/25/2003
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Application #:
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09951178
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Filing Dt:
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09/13/2001
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Publication #:
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Pub Dt:
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06/20/2002
| | | | |
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Title:
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CAPACITOR HAVING THE LOWER ELECTRODE FOR PREVENTING UNDESIRED DEFECTS AT THE SURFACE OF THE METAL PLUG
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Patent #:
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Issue Dt:
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09/21/2004
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Application #:
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09952540
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Filing Dt:
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09/14/2001
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Title:
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METHOD AND APPARATUS FOR DETERMINING TEMPERATURE OF A SEMICONDUCTOR WAFER DURING FABRICATION THEREOF
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Patent #:
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Issue Dt:
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11/15/2005
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Application #:
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09952790
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Filing Dt:
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09/11/2001
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Title:
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INTERGRATED CIRCUIT PROCESS MONITORING AND METROLOGY SYSTEM
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Patent #:
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Issue Dt:
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04/06/2004
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Application #:
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09953667
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Filing Dt:
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09/17/2001
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Title:
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METHOD AND APPARATUS FOR ESTIMATING STATE-DEPENDENT GATE LEAKAGE IN AN INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
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02/25/2003
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Application #:
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09953706
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Filing Dt:
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09/17/2001
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Publication #:
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Pub Dt:
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03/14/2002
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Title:
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IN-SITU ELECTROPLATED OXIDE PASSIVATING FILM FOR CORROSION INHIBITION
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Patent #:
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NONE
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09956381
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Filing Dt:
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09/18/2001
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Publication #:
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Pub Dt:
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03/20/2003
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Title:
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Structure and fabrication method for capacitors integratible with vertical replacement gate transistors
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Patent #:
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Issue Dt:
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11/04/2003
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Application #:
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09957555
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Filing Dt:
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09/19/2001
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Title:
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LIQUID BASED AIR FILTRATION SYSTEM
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Patent #:
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Issue Dt:
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08/03/2004
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Application #:
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09960441
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Filing Dt:
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09/21/2001
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Title:
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ARRANGEMENT FOR MEASURING PRESSURE ON A SEMICONDUCTOR WAFER AND AN ASSOCIATED METHOD FOR FABRICATING A SEMICONDUCTOR WAFER
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Patent #:
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Issue Dt:
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01/07/2003
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Application #:
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09960765
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Filing Dt:
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09/21/2001
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Title:
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INDIUM FIELD IMPLANT FOR PUNCHTHROUGH PROTECTION IN SEMICONDUCTOR DEVICES
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Patent #:
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Issue Dt:
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12/17/2002
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Application #:
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09962641
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09/25/2001
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Pub Dt:
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02/14/2002
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Title:
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METHOD OF FORMING METAL OXIDE METAL CAPACITORS USING MULTI-STEP RAPID MATERIAL THERMAL PROCESS AND A DEVICE FORMED THEREBY
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Issue Dt:
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07/20/2004
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Application #:
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09964227
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09/26/2001
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Pub Dt:
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03/27/2003
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Title:
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METHOD AND STRUCTURE FOR MODULAR, HIGHLY LINEAR MOS CAPACITORS USING NITROGEN IMPLANTATION
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Issue Dt:
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06/10/2003
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Application #:
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09966464
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09/28/2001
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Title:
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METHOD OF FABRICATING A LOCAL INTERCONNECT
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Issue Dt:
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05/18/2004
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Application #:
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09966651
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Filing Dt:
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09/28/2001
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Title:
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HIGH FREQUENCY ELECTROCHEMICAL DEPOSITION
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Patent #:
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Issue Dt:
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04/15/2003
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Application #:
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09966779
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Filing Dt:
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09/27/2001
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Pub Dt:
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03/27/2003
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Title:
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METHOD AND STRUCTURE FOR OXIDE/SILICON NITRIDE INTERFACE SUBSTRUCTURE IMPROVEMENTS
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Issue Dt:
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07/04/2006
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09967094
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09/28/2001
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Pub Dt:
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04/03/2003
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Title:
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BARRIER LAYER FOR INTERCONNECT STRUCTURES OF A SEMICONDUCTOR WAFER AND METHOD FOR DEPOSITING THE BARRIER LAYER
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Patent #:
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Issue Dt:
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11/04/2003
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Application #:
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09967435
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Filing Dt:
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09/28/2001
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Publication #:
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Pub Dt:
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04/03/2003
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Title:
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CONTROL OF SEMICONDUCTOR PROCESSING
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Patent #:
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Issue Dt:
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03/23/2004
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Application #:
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09968234
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Filing Dt:
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09/28/2001
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Publication #:
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Pub Dt:
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04/03/2003
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Title:
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VERTICAL REPLACEMENT-GATE SILICON-ON-INSULATOR TRANSISTOR
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Patent #:
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Issue Dt:
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08/19/2003
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Application #:
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09968243
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Filing Dt:
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09/28/2001
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Publication #:
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Pub Dt:
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04/03/2003
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Title:
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METHOD AND APPARATUS FOR MONITORING IN-LINE COPPER CONTAMINATION
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Patent #:
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Issue Dt:
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10/29/2002
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Application #:
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09971329
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Filing Dt:
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10/04/2001
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Title:
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PHOTOLITHOGRAPHY OVERLAY CONTROL
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Patent #:
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Issue Dt:
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10/28/2003
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Application #:
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09972482
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10/05/2001
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Publication #:
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Pub Dt:
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01/02/2003
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Title:
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MULTI-LAYER INDUCTOR FORMED IN A SEMICONDUCTOR SUBSTRATE
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