Total properties:
1095
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8
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Patent #:
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Issue Dt:
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02/24/2004
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Application #:
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09978871
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Filing Dt:
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10/15/2001
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Publication #:
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Pub Dt:
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03/28/2002
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Title:
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INTEGRATED CIRCUIT HAVING A MICROMAGNETIC DEVICE AND METHOD OF MANUFACTURE THEREFOR
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Patent #:
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Issue Dt:
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07/01/2003
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Application #:
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09981154
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Filing Dt:
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10/16/2001
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Title:
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DEEP SUBMICRON SILICIDE BLOCKING
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Patent #:
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Issue Dt:
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06/15/2004
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Application #:
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09981200
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Filing Dt:
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10/17/2001
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Title:
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VORTEX UNIT FOR PROVIDING A DESIRED ENVIRONMENT FOR A SEMICONDUCTOR PROCESS
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Patent #:
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Issue Dt:
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02/21/2006
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Application #:
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09991202
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Filing Dt:
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11/14/2001
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Title:
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SHALLOW TRENCH ISOLATION STRUCTURE WITH LOW TRENCH PARASITIC CAPACITANCE
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Patent #:
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Issue Dt:
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06/15/2004
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Application #:
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09992135
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Filing Dt:
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11/14/2001
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Publication #:
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Pub Dt:
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05/02/2002
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Title:
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METHOD OF ELIMINATING AGGLOMERATE PARTICLES IN A POLISHING SLURRY
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Patent #:
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Issue Dt:
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10/29/2002
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Application #:
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09993414
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Filing Dt:
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11/05/2001
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Title:
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METHOD OF MANUFACTURING A CHANNEL STOP IMPLANT IN A SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
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11/09/2004
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Application #:
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09996118
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Filing Dt:
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11/27/2001
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Title:
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LOW RESISTANCE METAL INTERCONNECT LINES AND A PROCESS FOR FABRICATING THEM
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Patent #:
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Issue Dt:
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07/27/2004
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Application #:
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09997071
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Filing Dt:
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11/28/2001
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Title:
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PROCESS FOR INHIBITING EDGE PEELING OF COATING ON SEMICONDUCTOR SUBSTRATE DURING FORMATION OF INTEGRATED CIRCUIT STRUCTURE THEREON
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Patent #:
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Issue Dt:
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09/16/2003
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Application #:
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10002413
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Filing Dt:
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10/23/2001
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Title:
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LOW TEMPERATURE COEFFICIENT RESISTOR
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Patent #:
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Issue Dt:
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06/17/2003
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Application #:
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10003871
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Filing Dt:
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10/24/2001
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Publication #:
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Pub Dt:
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07/04/2002
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Title:
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SEMICONDUCTOR DEVICE HAVING A METAL GATE WITH A WORK FUNCTION COMPATIBLE WITH A SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
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05/18/2004
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Application #:
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10003873
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Filing Dt:
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10/24/2001
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Publication #:
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Pub Dt:
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04/24/2003
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Title:
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SEMICONDUCTOR DEVICE HAVING A DOPED LATTICE MATCHING LAYER AND A METHOD OF MANUFACTURE THEREFOR
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Patent #:
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Issue Dt:
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09/23/2003
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Application #:
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10005097
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Filing Dt:
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12/05/2001
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Title:
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DIE ATTACH BACKING GRINDING
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Patent #:
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Issue Dt:
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10/26/2004
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Application #:
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10006398
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Filing Dt:
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11/30/2001
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Title:
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ALIGNMENT PROCESS FOR INTEGRATED CIRCUIT STRUCTURES ON SEMICONDUCTOR SUBSTRATE USING SCATTEROMETRY MEASUREMENTS OF LATENT IMAGES IN SPACED APART TEST FIELDS ON SUBSTRATE
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Patent #:
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Issue Dt:
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04/22/2003
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Application #:
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10006540
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Filing Dt:
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11/30/2001
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Title:
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METHOD FOR PREVENTING BORDERLESS CONTACT TO WELL LEAKAGE
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Patent #:
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Issue Dt:
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03/25/2003
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Application #:
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10007405
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Filing Dt:
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12/04/2001
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Title:
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PROCESS FOR TREATING POROUS LOW K DIELECTRIC MATERIAL IN DAMASCENE STRUCTURE TO FORM A NON-POROUS DIELECTRIC DIFFUSION BARRIER LAYER ON ETCHED VIA AND TRENCH SURFACES IN THE POROUS LOW K DIELECTRIC MATERIAL
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Patent #:
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Issue Dt:
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01/27/2004
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Application #:
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10007417
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Filing Dt:
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10/31/2001
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Publication #:
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Pub Dt:
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05/01/2003
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Title:
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INTEGRATED CIRCUIT HAVING STRESS MIGRATION TEST STRUCTURE AND METHOD THEREFOR
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Patent #:
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Issue Dt:
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06/08/2004
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Application #:
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10007904
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Filing Dt:
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10/31/2001
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Publication #:
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Pub Dt:
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05/01/2003
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Title:
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STRESS MIGRATION TEST STRUCTURE AND METHOD THEREFOR
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Patent #:
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Issue Dt:
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01/01/2008
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Application #:
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10012821
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Filing Dt:
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12/10/2001
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Title:
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REACTOR SYSTEM
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Patent #:
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Issue Dt:
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06/08/2004
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Application #:
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10020304
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Filing Dt:
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12/13/2001
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Title:
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BURIED CHANNEL DEVICES AND A PROCESS FOR THEIR FABRICATION SIMULTANEOUSLY WITH SURFACE CHANNEL DEVICES TO PRODUCE TRANSISTORS AND CAPACITORS WITH MULTIPLE ELECTRICAL GATE OXIDES
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Patent #:
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Issue Dt:
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09/07/2004
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Application #:
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10020407
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Filing Dt:
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12/12/2001
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Title:
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METHOD OF DETECTING SPATIALLY CORRELATED VARIATIONS IN A PARAMETER OF AN INTEGRATED CIRCUIT DIE
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Patent #:
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Issue Dt:
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05/13/2008
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Application #:
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10020764
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Filing Dt:
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12/12/2001
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Title:
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SUBSTRATE LASER MARKING
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Patent #:
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Issue Dt:
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03/18/2003
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Application #:
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10024803
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Filing Dt:
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12/19/2001
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Title:
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POLYSILICON BOUNDED SNAPBACK DEVICE
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Patent #:
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Issue Dt:
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03/30/2004
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Application #:
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10025304
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Filing Dt:
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12/19/2001
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Title:
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METHOD OF PREVENTING RESIST POISONING IN DUAL DAMASCENE STRUCTURES
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Patent #:
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Issue Dt:
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07/01/2003
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Application #:
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10026186
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Filing Dt:
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12/20/2001
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Publication #:
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Pub Dt:
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05/09/2002
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Title:
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SWAPPED DRAIN STRUCTURES FOR ELECTROSTATIC DISCHARGE PROTECTION
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Patent #:
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NONE
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Issue Dt:
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Application #:
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10026282
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Filing Dt:
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12/21/2001
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Publication #:
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Pub Dt:
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05/16/2002
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Title:
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Dual gate oxide process for deep submicron ICS
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Patent #:
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Issue Dt:
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09/23/2003
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Application #:
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10028594
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Filing Dt:
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12/20/2001
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Publication #:
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Pub Dt:
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10/24/2002
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Title:
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MICROMAGNETIC DEVICE HAVING ALLOY OF COBALT, PHOSPHORUS AND IRON
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Patent #:
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Issue Dt:
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06/01/2004
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Application #:
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10035501
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Filing Dt:
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10/25/2001
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Title:
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METHOD FOR GROWING THIN FILMS
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Patent #:
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Issue Dt:
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04/27/2004
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Application #:
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10035704
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Filing Dt:
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10/18/2001
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Title:
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MULTI-STEP PROCESS FOR FORMING A BARRIER FILM FOR USE IN COPPER LAYER FORMATION
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Patent #:
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Issue Dt:
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08/10/2004
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Application #:
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10036020
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Filing Dt:
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12/26/2001
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Publication #:
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Pub Dt:
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06/26/2003
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Title:
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CMOS VERTICAL REPLACEMENT GATE (VRG) TRANSISTORS
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Patent #:
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Issue Dt:
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04/12/2005
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Application #:
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10038371
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Filing Dt:
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01/02/2002
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Publication #:
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Pub Dt:
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01/02/2003
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Title:
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SPLIT BARRIER LAYER INCLUDING NITROGEN-CONTAINING PORTION AND OXYGEN-CONTAINING PORTION
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Patent #:
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Issue Dt:
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07/13/2004
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Application #:
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10038734
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Filing Dt:
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12/31/2001
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Publication #:
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Pub Dt:
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05/09/2002
| | | | |
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Title:
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METHOD FOR FABRICATING MOS DEVICE WITH HALO IMPLANTED REGION
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Patent #:
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Issue Dt:
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01/11/2005
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Application #:
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10039508
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Filing Dt:
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11/09/2001
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Title:
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ADJUSTABLE TRANSMISSION PHASE SHIFT MASK
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Patent #:
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Issue Dt:
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11/18/2003
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Application #:
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10044215
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Filing Dt:
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11/19/2001
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Title:
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INTERMITTENT PULSED OXIDATION PROCESS
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Patent #:
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Issue Dt:
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10/03/2006
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Application #:
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10044864
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Filing Dt:
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10/22/2001
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Title:
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METHOD FOR CREATING BARRIERS FOR COPPER DIFFUSION
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Patent #:
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Issue Dt:
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04/29/2003
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Application #:
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10051937
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Filing Dt:
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01/17/2002
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Title:
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BIPOLAR TRANSISTOR HAVING AN EMITTER COMPRISED OF A SEMI-INSULATING MATERIAL
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Patent #:
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Issue Dt:
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04/27/2004
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Application #:
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10053097
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Filing Dt:
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01/18/2002
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Publication #:
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Pub Dt:
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05/23/2002
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Title:
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APPARATUS AND METHOD FOR DETERMINING PROCESS WIDTH VARIATIONS IN INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
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03/23/2004
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Application #:
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10055082
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Filing Dt:
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01/22/2002
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Publication #:
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Pub Dt:
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07/24/2003
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Title:
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LOW VOLTAGE BREAKDOWN ELEMENT FOR ESD TRIGGER DEVICE
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Patent #:
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Issue Dt:
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09/02/2003
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Application #:
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10060867
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Filing Dt:
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01/30/2002
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Title:
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FORMING A SEMICONDUCTOR ON IMPLANTED INSULATOR
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Patent #:
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Issue Dt:
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07/27/2004
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Application #:
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10061475
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Filing Dt:
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02/01/2002
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Publication #:
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Pub Dt:
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08/07/2003
| | | | |
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Title:
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METHOD OF FABRICATING COMPLEMENTARY SELF-ALIGNED BIPOLAR TRANSISTORS
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Patent #:
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Issue Dt:
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05/04/2004
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Application #:
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10061542
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Filing Dt:
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10/25/2001
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Publication #:
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Pub Dt:
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05/01/2003
| | | | |
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Title:
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SYSTEM AND METHOD OF DETERMINING A POLISHING ENDPOINT BY MONITORING SIGNAL INTENSITY
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Patent #:
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Issue Dt:
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04/22/2003
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Application #:
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10072500
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Filing Dt:
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02/05/2002
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Publication #:
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Pub Dt:
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07/18/2002
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Title:
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TRENCH CAPACITORS IN SOI SUBSTRATES
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Patent #:
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Issue Dt:
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10/28/2003
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Application #:
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10077497
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Filing Dt:
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02/15/2002
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Publication #:
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Pub Dt:
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08/21/2003
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Title:
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THERMAL CHARACTERIZATION COMPENSATION
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Patent #:
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Issue Dt:
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05/04/2004
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Application #:
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10080186
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Filing Dt:
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02/21/2002
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Publication #:
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Pub Dt:
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07/25/2002
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Title:
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METHODS OF FABRICATING A METAL-OXIDE-METAL CAPACITOR
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Patent #:
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Issue Dt:
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04/27/2004
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Application #:
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10091291
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Filing Dt:
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03/05/2002
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Publication #:
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Pub Dt:
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07/18/2002
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Title:
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INTEGRATED CIRCUIT DEVICE SUBSTRATES WITH SELECTIVE EPITAXIAL GROWTH THICKNESS COMPENSATION
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Patent #:
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Issue Dt:
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10/05/2004
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Application #:
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10099641
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Filing Dt:
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03/15/2002
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Publication #:
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Pub Dt:
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09/05/2002
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Title:
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LOW K DIELECTRIC COMPOSITE LAYER FOR INTEGRATED CIRCUIT STRUCTURE WHICH PROVIDES VOID-FREE LOW K DIELECTRIC MATERIAL BETWEEN METAL LINES WHILE MITIGATING VIA POISONING
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Patent #:
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Issue Dt:
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06/03/2003
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Application #:
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10105483
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Filing Dt:
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03/25/2002
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Title:
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IN SITU MEASUREMENT
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Patent #:
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Issue Dt:
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05/31/2005
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Application #:
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10121370
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Filing Dt:
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04/12/2002
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Publication #:
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Pub Dt:
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08/28/2003
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Title:
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CHEMICAL MECHANICAL POLISHING OF DUAL ORIENTATION POLYCRYSTALLINE MATERIALS
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Patent #:
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Issue Dt:
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09/30/2003
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Application #:
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10131431
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Filing Dt:
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04/24/2002
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Title:
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METHOD OF CHEMICALLY ALTERING A SILICON SURFACE AND ASSOCIATED ELECTRICAL DEVICES
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Patent #:
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Issue Dt:
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05/20/2003
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Application #:
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10138609
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Filing Dt:
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05/03/2002
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Title:
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PROCESS FOR IMPROVING MECHANICAL STRENGTH OF LAYERS OF LOW K DIELECTRIC MATERIAL
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Patent #:
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Issue Dt:
|
09/30/2003
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Application #:
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10138742
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Filing Dt:
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05/03/2002
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Title:
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METHOD AND APPARATUS FOR DETECTING BACKSIDE CONTAMINATION DURING FABRICATION OF A SEMICONDUCTOR WAFER
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Patent #:
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Issue Dt:
|
08/16/2005
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Application #:
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10144511
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Filing Dt:
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05/13/2002
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Publication #:
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Pub Dt:
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11/07/2002
| | | | |
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Title:
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ELECTRONIC CIRCUIT STRUCTURE WITH IMPROVED DIELECTRIC PROPERTIES
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Patent #:
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Issue Dt:
|
01/27/2004
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Application #:
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10147384
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Filing Dt:
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05/16/2002
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Publication #:
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Pub Dt:
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10/31/2002
| | | | |
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Title:
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A SEMICONDUCTOR DEVICE HAVING AN INTERCONNECT LAYER WITH A PLURALITY OF LAYOUT REGIONS HAVING SUBSTANTIALLY UNIFORM DENSITIES OF ACTIVE INTERCONNECTS AND DUMMY FILLS
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Patent #:
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Issue Dt:
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09/21/2004
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Application #:
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10153011
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Filing Dt:
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05/21/2002
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Publication #:
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Pub Dt:
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09/26/2002
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Title:
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INTEGRATED CIRCUIT STRUCTURE HAVING LOW DIELECTRIC CONSTANT MATERIAL AND HAVING SILICON OXYNITRIDE CAPS OVER CLOSELY SPACED APART METAL LINES
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Patent #:
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Issue Dt:
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08/19/2003
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Application #:
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10163120
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Filing Dt:
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06/04/2002
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Title:
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LOW LEAKAGE PMOS ON-CHIP DECOUPLING CAPACITOR CELLS COMPATIBLE WITH STANDARD CMOS CELLS
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Patent #:
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Issue Dt:
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10/21/2003
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Application #:
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10164202
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Filing Dt:
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06/06/2002
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Title:
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ULTRA THIN BODY VERTICAL REPLACEMENT GATE MOSFET
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Patent #:
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Issue Dt:
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06/01/2004
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Application #:
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10164227
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Filing Dt:
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06/05/2002
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Title:
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METHOD OF REDUCING LEAKAGE USING SI3N4 OR SION BLOCK DIELECTRIC FILMS
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Patent #:
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Issue Dt:
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04/29/2003
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Application #:
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10164909
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Filing Dt:
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06/07/2002
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Title:
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ARRANGEMENT AND METHOD FOR POLISHING A SURFACE OF A SEMICONDUCTOR WAFER
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Patent #:
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Issue Dt:
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05/13/2003
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Application #:
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10171700
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Filing Dt:
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06/14/2002
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Publication #:
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Pub Dt:
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10/17/2002
| | | | |
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Title:
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SILICON NITRIDE AND SILICON DIOXIDE GATE INSULATOR TRANSISTORS AND METHOD OF FORMING SAME IN A HYBRID INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
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10/19/2004
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Application #:
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10190954
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Filing Dt:
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07/08/2002
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Publication #:
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Pub Dt:
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01/08/2004
| | | | |
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Title:
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PLASMA PASSIVATION
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Patent #:
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NONE
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Issue Dt:
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Application #:
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10191107
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Filing Dt:
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07/09/2002
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Publication #:
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Pub Dt:
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11/21/2002
| | | | |
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Title:
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System to improve SER immunity and punchthrough with an additional well tub deeper than shallow trench isolation
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Patent #:
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Issue Dt:
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07/27/2004
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Application #:
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10191670
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Filing Dt:
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07/09/2002
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Publication #:
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Pub Dt:
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01/15/2004
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Title:
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IMPLEMENTATION OF SI-GE HBT WITH CMOS PROCESS
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Patent #:
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Issue Dt:
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02/22/2005
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Application #:
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10195044
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Filing Dt:
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07/12/2002
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Title:
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ELECTRO CHEMICAL MECHANICAL POLISHING METHOD AND DEVICE FOR PLANARIZING SEMICONDUCTOR SURFACES
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Patent #:
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Issue Dt:
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01/06/2004
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Application #:
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10195775
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Filing Dt:
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07/12/2002
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Title:
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METHOD OF REDUCING PROCESS PLASMA DAMAGE USING OPTICAL SPECTROSCOPY
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Patent #:
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Issue Dt:
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11/14/2006
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Application #:
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10195935
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Filing Dt:
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07/16/2002
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Publication #:
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Pub Dt:
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11/28/2002
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Title:
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CAPACITOR FOR INTEGRATION WITH COPPER DAMASCENE PROCESSES AND A METHOD OF MANUFACTURE THEREFORE
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Patent #:
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Issue Dt:
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09/07/2004
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Application #:
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10196787
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Filing Dt:
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07/17/2002
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Publication #:
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Pub Dt:
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11/28/2002
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Title:
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EXHAUST FLOW CONTROL SYSTEM
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Patent #:
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Issue Dt:
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10/19/2004
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Application #:
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10197956
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Filing Dt:
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07/16/2002
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Title:
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ADAPTIVE OFF TESTER SCREENING METHOD BASED ON INTRINSIC DIE PARAMETRIC MEASUREMENTS
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Patent #:
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Issue Dt:
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06/22/2004
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Application #:
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10200469
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Filing Dt:
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07/18/2002
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Title:
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PROCESS AND APPARATUS FOR WAFER EDGE PROFILE CONTROL USING GAS FLOW CONTROL RING
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Patent #:
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Issue Dt:
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11/11/2003
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Application #:
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10201010
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Filing Dt:
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07/22/2002
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Title:
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KEY HOLE FILLING
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Patent #:
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Issue Dt:
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05/20/2003
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Application #:
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10205229
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Filing Dt:
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07/25/2002
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Title:
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METHOD AND APPARATUS FOR PLANARIZING A WAFER SURFACE OF A SEMICONDUCTOR WAFER HAVING AN ELEVATED PORTION EXTENDING THEREFROM
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Patent #:
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Issue Dt:
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11/04/2003
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Application #:
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10210365
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Filing Dt:
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08/01/2002
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Publication #:
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Pub Dt:
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12/05/2002
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Title:
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INTEGRATED CIRCUIT FABRICATION DUAL PLASMA PROCESS WITH SEPARATE INTRODUCTION OF DIFFERENT GASES INTO GAS FLOW
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Patent #:
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Issue Dt:
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12/02/2003
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Application #:
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10215170
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Filing Dt:
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08/08/2002
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Publication #:
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Pub Dt:
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12/19/2002
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Title:
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METHOD FOR IN-SITU REMOVAL OF SIDE WALLS IN MOM CAPACITOR FORMATION
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Patent #:
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Issue Dt:
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12/21/2004
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Application #:
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10218783
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Filing Dt:
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08/14/2002
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Publication #:
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Pub Dt:
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12/19/2002
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Title:
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SEMICONDUCTOR DEVICE WITH VARIABLE PIN LOCATIONS
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Patent #:
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Issue Dt:
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05/17/2005
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Application #:
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10219951
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08/15/2002
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Publication #:
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Pub Dt:
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02/27/2003
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Title:
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MULTIPLE PURPOSE RETICLE LAYOUT FOR SELECTIVE PRINTING OF TEST CIRCUITS
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Patent #:
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Issue Dt:
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07/20/2004
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Application #:
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10224025
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Filing Dt:
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08/20/2002
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Title:
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CONDITIONING BAR ASSEMBLY HAVING AN ABRASION MEMBER SUPPORTED ON A POLYCARBONATE MEMBER
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Patent #:
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NONE
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Issue Dt:
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Application #:
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10224220
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Filing Dt:
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08/20/2002
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Publication #:
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Pub Dt:
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12/26/2002
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Title:
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Transistor fabrication method
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Patent #:
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Issue Dt:
|
12/12/2006
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Application #:
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10226884
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Filing Dt:
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08/23/2002
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Title:
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METHOD FOR IMPLANTING IONS IN A SEMICONDUCTOR
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Patent #:
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Issue Dt:
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03/01/2005
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Application #:
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10228859
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Filing Dt:
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08/27/2002
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Publication #:
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Pub Dt:
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01/09/2003
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Title:
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CAPACITOR HAVING A TANTALUM LOWER ELECTRODE AND METHOD OF FORMING THE SAME
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Patent #:
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Issue Dt:
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10/24/2006
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Application #:
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10234354
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Filing Dt:
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09/03/2002
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Publication #:
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Pub Dt:
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03/04/2004
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Title:
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PROTRUDING SPACERS FOR SELF-ALIGNED CONTACTS
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Patent #:
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Issue Dt:
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03/21/2006
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Application #:
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10236226
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Filing Dt:
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09/06/2002
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Publication #:
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Pub Dt:
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03/11/2004
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Title:
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RETICLE OVERLAY CORRECTION
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Patent #:
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Issue Dt:
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04/26/2005
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Application #:
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10243562
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Filing Dt:
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09/13/2002
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Title:
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OPTICAL ERROR MINIMIZATION IN A SEMICONDUCTOR MANUFACTURING APPARATUS
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Patent #:
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Issue Dt:
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07/31/2007
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Application #:
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10245447
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Filing Dt:
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09/17/2002
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Publication #:
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Pub Dt:
|
03/18/2004
| | | | |
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Title:
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METHOD FOR FORMING METAL SILICIDE REGIONS IN AN INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
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04/08/2003
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Application #:
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10251016
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Filing Dt:
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09/20/2002
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Title:
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POLYSILICON GATE SALICIDATION
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Patent #:
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Issue Dt:
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03/30/2004
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Application #:
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10253158
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Filing Dt:
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09/24/2002
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Publication #:
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Pub Dt:
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01/23/2003
| | | | |
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Title:
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PROCESS FOR PLANARIZATION OF INTEGRATED CIRCUIT STRUCTURE WHICH INHIBITS CRACKING OF LOW DIELECTRIC CONSTANT DIELECTRIC MATERIAL ADJACENT UNDERLYING RAISED STRUCTURES
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Patent #:
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Issue Dt:
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03/29/2005
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Application #:
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10254708
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Filing Dt:
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09/25/2002
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Publication #:
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Pub Dt:
|
03/25/2004
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Title:
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DIRECT POSITIVE IMAGE PHOTO-RESIST TRANSFER OF SUBSTRATE DESIGN
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Patent #:
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Issue Dt:
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12/06/2005
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Application #:
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10259254
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Filing Dt:
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09/27/2002
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Publication #:
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Pub Dt:
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04/15/2004
| | | | |
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Title:
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ELECTROCHEMICAL METHOD AND SYSTEM FOR MONITORING HYDROGEN PEROXIDE CONCENTRATION IN SLURRIES
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Patent #:
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Issue Dt:
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05/04/2004
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Application #:
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10259256
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Filing Dt:
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09/27/2002
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Publication #:
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Pub Dt:
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04/01/2004
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Title:
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METHOD OF DRY ETCHING A SEMICONDUCTOR DEVICE IN THE ABSENCE OF A PLASMA
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Patent #:
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Issue Dt:
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12/07/2004
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Application #:
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10260694
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Filing Dt:
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09/30/2002
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Publication #:
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Pub Dt:
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04/01/2004
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Title:
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APPARATUS AND METHOD FOR DETECTING ALPHA PARTICLES
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Patent #:
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Issue Dt:
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02/28/2006
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Application #:
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10260727
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Filing Dt:
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09/30/2002
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Publication #:
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Pub Dt:
|
04/01/2004
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Title:
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METHOD TO AVOID COPPER CONTAMINATION OF A VIA OR DUAL DAMASCENE STRUCTURE
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Patent #:
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Issue Dt:
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05/18/2004
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Application #:
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10262654
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Filing Dt:
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09/30/2002
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Publication #:
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Pub Dt:
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04/01/2004
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Title:
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ELECTRONIC FINGERPRINTING OF SEMICONDUCTOR INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
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09/02/2003
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Application #:
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10263593
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Filing Dt:
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10/03/2002
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Publication #:
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Pub Dt:
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02/13/2003
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Title:
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APPARATUS FOR REMOVING PHOTORESIST EDGE BEADS FROM THIN FILM SUBSTRATES
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Patent #:
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Issue Dt:
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08/03/2004
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Application #:
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10263638
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Filing Dt:
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10/03/2002
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Publication #:
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Pub Dt:
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04/08/2004
| | | | |
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Title:
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PROCESS FOR SEMICONDUCTOR DEVICE FABRICATION IN WHICH A INSULATING LAYER IS FORMED ON A SEMICONDUCTOR SUBSTRATE
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Patent #:
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Issue Dt:
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03/15/2005
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Application #:
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10265856
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10/07/2002
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Publication #:
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Pub Dt:
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04/08/2004
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Title:
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APPARATUS AND METHOD TO IMPROVE THE RESOLUTION OF PHOTOLITHOGRAPHY SYSTEMS BY IMPROVING THE TEMPERATURE STABILITY OF THE RETICLE
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Patent #:
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NONE
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Application #:
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10265867
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Filing Dt:
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10/07/2002
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Publication #:
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Pub Dt:
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02/13/2003
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Title:
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MOS transistor having an aluminum nitrade gate dielectric structure
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Patent #:
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NONE
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Issue Dt:
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Application #:
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10268735
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Filing Dt:
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10/10/2002
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Publication #:
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Pub Dt:
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04/03/2003
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Title:
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Barrier and seed layer system
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Patent #:
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Issue Dt:
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08/12/2003
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Application #:
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10268736
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Filing Dt:
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10/10/2002
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Publication #:
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Pub Dt:
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03/06/2003
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Title:
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SHALLOW JUNCTION FORMATION
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Patent #:
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Issue Dt:
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01/24/2006
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Application #:
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10272734
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Filing Dt:
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10/17/2002
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Publication #:
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Pub Dt:
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02/20/2003
| | | | |
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Title:
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METHOD FOR MAKING AN INTEGRATED CIRCUIT DEVICE WITH DIELECTRICALLY ISOLATED TUBS AND RELATED CIRCUIT
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Patent #:
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Issue Dt:
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03/22/2005
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Application #:
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10277025
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Filing Dt:
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10/21/2002
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Publication #:
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Pub Dt:
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04/22/2004
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Title:
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LAMINATE LOW K FILM
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Patent #:
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Issue Dt:
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02/01/2005
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Application #:
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10283630
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Filing Dt:
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10/30/2002
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Title:
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THIN GATE DIELECTRIC FOR A CMOS TRANSISTOR AND METHOD OF FABRICATION THEREOF
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Patent #:
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Issue Dt:
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11/18/2003
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Application #:
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10283688
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Filing Dt:
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10/30/2002
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Title:
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INTEGRATED PROCESS TOOL MONITORING SYSTEM FOR SEMICONDUCTOR FABRICATION
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Patent #:
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Issue Dt:
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03/22/2005
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Application #:
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10293631
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Filing Dt:
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11/13/2002
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Title:
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METHOD AND APPARATUS FOR MONITORING THE CONDITION OF A LUBRICATING MEDIUM
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