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Patent #:
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Issue Dt:
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05/22/2001
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09382611
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Filing Dt:
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08/25/1999
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Title:
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GLOVE BOX FILTER SYSTEM
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Patent #:
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Issue Dt:
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04/09/2002
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09384395
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Filing Dt:
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08/27/1999
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Title:
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MASK REPAIR
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05/01/2001
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09384459
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Filing Dt:
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08/27/1999
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Title:
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METHOD OF MONITORING A PATTERNED TRANSFER PROCESS USING LINE WIDTH METROLOGY
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07/01/2003
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09384631
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Filing Dt:
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08/27/1999
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Title:
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10/31/2000
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09384769
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Filing Dt:
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08/27/1999
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Title:
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MANUFACTURE OF COMPLEMENTARY MOS AND BIPOLAR INTEGRATED CIRCUITS
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11/06/2001
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09385165
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Filing Dt:
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08/30/1999
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Title:
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PROCESS FOR MANUFACTURING AN INTEGRATED CIRCUIT INCLUDING A DUAL-DAMASCENE STRUCTURE AND AN INTEGRATED CIRCUIT
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Patent #:
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11/14/2000
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09385258
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Filing Dt:
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08/30/1999
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Title:
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METHOD FOR MAKING ENHANCED PERFORMANCE FIELD EFFECT DEVICES
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04/16/2002
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09385735
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Filing Dt:
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08/30/1999
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Title:
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ETCH STOPS AND ALIGNMENT MARKS FOR BONDED WAFERS
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04/02/2002
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09386065
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08/30/1999
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Title:
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PROCESS FOR MANUFACTURING AN INTEGRATED CIRCUIT INCLUDING A DUAL-DAMASCENE STRUCTURE AND AN INTEGRATED CIRCUIT
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05/01/2001
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09386132
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08/30/1999
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Title:
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SIMPLIFIED HIGH Q INDUCTOR SUBSTRATE
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10/30/2001
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09386592
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Filing Dt:
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08/31/1999
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Title:
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DEUTERATED BIPOLAR TRANSISTOR AND METHOD OF MANUFACTURE THEREOF
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08/20/2002
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09388166
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09/01/1999
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Title:
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PROCESS FOR FABRICATING ARTICLE HAVING SUBSTANTIAL THREE-DIMENSIONAL ORDER
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03/26/2002
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09388203
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09/01/1999
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Title:
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STACKED VIA KELVIN RESISTANCE TEST STRUCTURE FOR MEASURING CONTACT ANOMALIES IN MULTI-LEVEL METAL INTEGRATED CIRCUIT TECHNOLOGIES
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05/29/2001
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09388242
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09/01/1999
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Title:
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DEVICE AND METHOD OF CONTROLLING THE BOWING OF A SOLDERED OR ADHESIVELY BONDED ASSEMBLY
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02/26/2002
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09388297
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09/01/1999
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SEMICONDUCTOR DEVICE HAVING REGIONS OF INSULATING MATERIAL FORMED IN A SEMICONDUCTOR SUBSTRATE AND PROCESS OF MAKING THE DEVICE
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11/20/2001
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09388682
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09/02/1999
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Title:
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INTERGRATED CIRCUIT DEVICE HAVING DUAL DAMASCENE CAPACITOR
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03/19/2002
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09388727
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09/02/1999
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SWAPPED DRAIN STRUCTURES FOR ELECTROSTATIC DISCHARGE PROTECTION
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05/14/2002
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09390181
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09/07/1999
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Title:
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PLASMA CONFINEMENT SHIELD
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11/21/2000
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09391729
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09/08/1999
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THIN-FILM TRANSISTOR MONOLITHICALLY INTEGRATED WITH AN ORGANIC LIGH-EMITTING DIODE
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11/27/2001
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09393032
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09/09/1999
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Title:
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Method For Fabricating Molded Microstructures On Substrates
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09/11/2001
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09395062
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09/13/1999
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Title:
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ALIGNMENT OF OPENINGS IN SEMICONDUCTOR FABRICATION
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12/11/2001
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09395507
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09/14/1999
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METHOD AND APPARATUS FOR DETERMINING TEMPERATURE OF A SEMICONDUCTOR WAFER DURING FABRICATION THEREOF
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05/28/2002
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09397458
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09/16/1999
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PROCESS FOR IMPROVING LINE WIDTH VARIATIONS BETWEEN TIGHTLY SPACED AND ISOLATED FEATURES IN INTEGRATED CIRCUITS
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06/18/2002
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09397459
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09/16/1999
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SEMICONDUCTOR DEVICE HAVING REDUCED LINE WIDTH VARIATIONS BETWEEN TIGHTLY SPACED AND ISOLATED FEATURES
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06/26/2001
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09397716
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09/16/1999
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METHOD OF FABRICATING DEVICES USING AN ATTENUATED PHASE-SHIFTING MASK AND AN ATTENUATED PHASE-SHIFTING MASK
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11/07/2000
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09398977
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09/17/1999
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MULTILEVEL WIRING STRUCTURE AND METHOD OF FABRICATING A MULTILEVEL WIRING STRUCTURE
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08/28/2001
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09399621
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09/20/1999
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CORROSION-RESISTANT POLISHING PAD CONDITONER
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07/09/2002
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09400686
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09/22/1999
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SILICON VERIFICATION WITH EMBEDDED TESTBENCHES
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12/11/2001
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09400767
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09/22/1999
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UNIFORM AXIAL LOADING GROUND GLASS JOINT CLAMP
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10/02/2001
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09401690
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09/22/1999
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Title:
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INTEGRATED CIRCUIT PACKAGES WITH IMPROVED EMI CHARACTERISTICS
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05/29/2001
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09404702
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09/23/1999
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SEMICONDUCTOR WAFER FABRICATION
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09/11/2001
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09405641
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09/24/1999
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TACTILE SENSOR COMPRISING NANOWIRES AND METHOD FOR MAKING THE SAME
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05/01/2001
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09405805
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09/24/1999
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METHOD FOR ENHANCING ANTIREFLECTIVE COATINGS USED IN PHOTOLIGHOGRAPHY OF ELECTRONIC DEVICES
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10/23/2001
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09406308
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09/27/1999
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METHOD FOR IMPROVING BALL JOINTS IN SEMICONDUCTOR PACKAGES
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05/01/2001
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09407357
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09/29/1999
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VACUUM VALVE INTERFACE
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12/05/2000
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09407575
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09/28/1999
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METHOD FOR ENHANCED DIELECTRIC FILM UNIFORMITY
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11/27/2001
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09408299
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09/29/1999
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Method of forming capacitor having the lower electrope for preventing undesired pefects at the surface of the metal plug
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10/08/2002
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09408371
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09/29/1999
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ALMOST FULL-SCAN BIST METHOD AND SYSTEM HAVING HIGHER FAULT COVERAGE AND SHORTER TEST APPLICATION TIME
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11/27/2001
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09409115
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09/30/1999
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METHOD FOR MAKING INTEGRATED CIRCUITS INCLUDING FEATURES WITH A RELATIVELY SMALL CRITICAL DIMENSION
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05/07/2002
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09410405
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10/01/1999
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FLEXIBLE WIDTH CELL LAYOUT ARCHITECTURE
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06/25/2002
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09410686
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10/01/1999
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PROCESS FOR FABRICATING COPPER INTERCONNECT FOR ULSI INTEGRATED CIRCUITS
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08/06/2002
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09412089
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10/04/1999
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01/03/2002
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STANDARDIZED TEST BOARD FOR TESTING CUSTOM CHIPS
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04/09/2002
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09412847
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10/06/1999
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GAAS MOSFET HAVING LOW CAPACITANCE AND ON-RESISTANCE AND METHOD OF MANUFACTURING THE SAME
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12/04/2001
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09413149
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10/06/1999
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PLANAR MOVABLE STAGE MECHANISM
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02/26/2002
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09413605
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10/06/1999
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MULTIFUNCTION LEAD FRAME AND INTEGRATED CIRCUIT PACKAGE INCORPORATING THE SAME
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03/12/2002
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09413667
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10/06/1999
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SUBTRACTIVE OXIDATION METHOD OF FABRICATING A SHORT-LENGTH AND VERTICALLY-ORIENTED CHANNEL,DUAL-GATE,CMOS FET
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08/20/2002
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09413741
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10/06/1999
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CMP SYSTEM FOR POLISHING SEMICONDUCTOR WAFERS AND RELATED METHOD
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10/01/2002
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09413742
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10/06/1999
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CMP SLURRY FOR POLISHING SEMICONDUCTOR WAFERS AND RELATED METHODS
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03/18/2008
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10/07/1999
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01/16/2003
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LENS ARRAY FOR ELECTRON BEAM LITHOGRAPHY TOOL
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07/22/2003
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09415529
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10/08/1999
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METHOD FOR CHEMICAL/MECHANICAL PLANARIZATION OF A SEMICONDUCTOR WAFER HAVING DISSIMILAR METAL PATTERN DENSITIES
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06/12/2001
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09416069
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10/12/1999
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ELECTRONIC ASSEMBLY HAVING SHIELDING AND STRAIN-RELIEF MEMBER
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02/13/2001
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10/12/1999
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METHOD OF MANUFACTURING LATERAL HIGH-Q INDUCTOR FOR SEMICONDUCTOR DEVICES
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09/18/2001
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10/12/1999
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LATERAL HIGH-Q INDUCTOR FOR SEMICONDUCTOR DEVICES
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11/06/2001
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09416491
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10/12/1999
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PMOS DEVICE HAVING A LAYERED SILICON GATE FOR IMPROVED SILICIDE INTEGRITY AND ENHANCED BORON PENETRATION RESISTANCE
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07/30/2002
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09417255
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10/12/1999
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09/25/2001
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09418087
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10/14/1999
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APPARATUS FOR CHEMICAL MECHANICAL POLISHING ENDPOINT DETECTION USING A HYDROGEN SENSOR
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11/27/2001
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10/14/1999
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METHOD OF FORMING METAL OXIDE METAL CAPACITORS USING MULTI-STEP RAPID THERMAL PROCESS AND A DEVICE FORMED THEREBY
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01/22/2002
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10/15/1999
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06/26/2001
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09419453
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10/15/1999
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BEARING SUBSTITUTE FOR WAFER POLISHING ARM
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08/27/2002
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09419986
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10/18/1999
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MICROSTRUCTURE CONTROL OF COPPER INTERCONNECTS
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05/25/2004
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09420157
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10/18/1999
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ARTICLE COMPRISING ALIGNED NANOWIRES AND PROCESS FOR FABRICATING ARTICLE
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01/28/2003
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10/19/1999
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APPARATUS FOR MEASURING THERMOMECHANICAL PROPERTIES OF PHOTO-SENSITIVE MATERIALS
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07/23/2002
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09425552
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10/22/1999
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METHOD FOR FORMING INTEGRATED CIRCUIT STRUCTURE HAVING LOW DIELECTRIC CONSTANT MATERIAL AND HAVING SILICON OXYNITRIDE CAPS OVER CLOSELY SPACED APART METAL LINES
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06/26/2001
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09425706
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10/22/1999
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LOW PROFILE INTEGRATED CIRCUIT PACKAGES
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07/03/2001
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09426017
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10/25/1999
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REFERENCE THICKNESS ENDPOINT TECHNIQUES FOR POLISHING OPERATIONS
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05/21/2002
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09426056
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10/22/1999
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LOW K DIELECTRIC COMPOSITE LAYER FOR INTERGRATED CIRCUIT STRUCTURE WHICH PROVIDES VOID-FREE LOW K DIELECTRIC MATERIAL BETWEEN METAL LINES WHILE MITIGATING VIA POISONING
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06/29/2004
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09426061
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10/22/1999
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LOW DIELECTRIC CONSTANT SILICON OXIDE-BASED DIELECTRIC LAYER FOR INTEGRATED CIRCUIT STRUCTURES HAVING IMPROVED COMPATIBILITY WITH VIA FILLER MATERIALS, AND METHOD OF MAKING SAME
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01/27/2004
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10/22/1999
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SEMICONDUCTOR DEVICE HAVING MULTILEVEL INTERCONNECTIONS AND METHOD OF MANUFACTURE THEREOF
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10/02/2001
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09426453
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10/25/1999
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Title:
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IN-SITU NANO-INTERCONNECTED CIRCUIT DEVICES AND METHOD FOR MAKING THE SAME
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Patent #:
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Issue Dt:
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01/22/2002
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Application #:
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09426457
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Filing Dt:
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10/05/1999
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Title:
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ARTICLE COMPRISING VERTICALLY NANO-INTERCONNECTED CIRCUIT DEVICES AND METHOD FOR MAKING THE SAME
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Patent #:
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Issue Dt:
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03/22/2005
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Application #:
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09427238
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Filing Dt:
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10/26/1999
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Title:
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SYSTEM AND METHOD FOR DETERMINING CAPACITANCE FOR LARGE-SCALE INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
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03/12/2002
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Application #:
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09427306
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Filing Dt:
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10/26/1999
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Title:
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METHOD OF ELIMINATING AGGLOMERATE PARTICLES IN A POLISHING SLURRY
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Patent #:
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Issue Dt:
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01/16/2001
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Application #:
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09427572
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Filing Dt:
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10/26/1999
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Title:
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PROCESS FOR FORMING METAL INTERCONNECT STACK FOR INTEGRATED CIRCUIT STRUCTURE
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Patent #:
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Issue Dt:
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04/24/2001
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Application #:
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09428073
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Filing Dt:
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10/27/1999
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Title:
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METHOD OF CREATING AN INTERCONNECT IN A SUBSTRATE AND SEMICONDUCTOR DEVICE EMPLOYING THE SAME
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Patent #:
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Issue Dt:
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10/24/2000
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Application #:
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09428164
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Filing Dt:
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10/27/1999
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Title:
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SEMICONDUCTOR PACKAGE WITH TRACES ROUTED UNDERNEATH A DIE
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Patent #:
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Issue Dt:
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11/13/2001
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Application #:
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09428344
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Filing Dt:
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10/26/1999
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Title:
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PROCESS FOR REMOVING RESIST MASK OF INTEGRATED CIRCUIT STRUCTURE WHICH MITIGATES DAMAGE TO UNDERLYING LOW DIELECTRIC CONSTANT SILICON OXIDE DIELECTRIC LAYER
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Patent #:
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Issue Dt:
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09/25/2001
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Application #:
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09430147
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Filing Dt:
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10/29/1999
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Title:
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METHOD FOR MAKING INTEGRATED CIRCUITS HAVING FEATURES WITH REDUCED CRITICAL DIMENSIONS
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Patent #:
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Issue Dt:
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01/30/2001
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Application #:
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09430226
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Filing Dt:
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10/29/1999
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Title:
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METHOD FOR FORMING VIAS IN A LOW DIELECTRIC CONSTANT MATERIAL
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Patent #:
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Issue Dt:
|
06/11/2002
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Application #:
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09430316
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Filing Dt:
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10/29/1999
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Title:
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SILICON SEMICONDUCTOR DEVICES WITH DELTA DOPED LAYERS
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Patent #:
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Issue Dt:
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10/24/2000
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Application #:
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09430635
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Filing Dt:
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10/29/1999
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Title:
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MIGRATION FROM CONTROL WAFER TO PRODUCT WAFER PARTICLE CHECKS
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Patent #:
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Issue Dt:
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04/10/2001
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Application #:
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09431198
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Filing Dt:
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11/01/1999
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Title:
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CHEMICAL MECHANICAL POLISHING ENDPOINT DETECTION BY MONITORING COMPONENT ACTIVITY IN EFFLUENT SLURRY
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Patent #:
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Issue Dt:
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09/04/2001
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Application #:
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09431439
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Filing Dt:
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11/01/1999
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Title:
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INTEGRATED CIRCUIT DEVICE AND METHOD OF MAKING THE SAME USING CHEMICAL MECHANICAL POLISHING TO REMOVE MATERIAL IN TWO LAYERS FOLLOWING MASKING
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Patent #:
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Issue Dt:
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07/10/2001
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Application #:
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09432721
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Filing Dt:
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11/01/1999
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Title:
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CHEMICAL MECHANICAL POLISHING ENDPOINT APPARTUS USING COMPONENT ACTIVITY IN EFFLUENT SLURRY
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Patent #:
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Issue Dt:
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05/28/2002
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Application #:
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09432725
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Filing Dt:
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11/01/1999
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Title:
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INDUCTOR OR LOW LOSS INTERCONNECT AND A METHOD OF MANUFACTURING AN INDUCTOR OR LOW LOSS INTERCONNECT IN AN INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
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03/19/2002
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Application #:
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09432926
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Filing Dt:
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11/03/1999
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Title:
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APPARATUS FOR DETECTING PLASMA ETCH ENDPOINT IN SEMICONDUCTOR FABRICATION AND ASSOCIATED METHOD
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Patent #:
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Issue Dt:
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12/10/2002
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Application #:
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09433702
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Filing Dt:
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11/03/1999
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Title:
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RATE EQUATION METHOD AND APPARATUS FOR SIMULATION OF CURRENT IN A MOS DEVICE
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Patent #:
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Issue Dt:
|
07/18/2000
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Application #:
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09434340
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Filing Dt:
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11/05/1999
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Title:
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DEPLETION FREE POLYSILICON GATE ELECTRODES
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Patent #:
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Issue Dt:
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09/04/2001
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Application #:
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09434424
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Filing Dt:
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11/04/1999
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Title:
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METHOD FOR MAKING FIELD EFFECT DEVICES AND CAPACITORS WITH THIN FILM DIELECTRICS AND RESULTING DEVICES
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Patent #:
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Issue Dt:
|
06/10/2003
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Application #:
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09434961
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Filing Dt:
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11/05/1999
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Title:
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METHOD AND APPARATUS FOR EVALUATING AND CORRECTING ERRORS IN INTEGRATED CIRCUIT CHIP DESIGNS
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Patent #:
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Issue Dt:
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01/29/2002
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Application #:
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09435971
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Filing Dt:
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11/08/1999
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Title:
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TESTING INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
|
11/05/2002
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Application #:
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09437559
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Filing Dt:
|
11/10/1999
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Title:
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METHOD OF USING BOTH A NON-FILLED FLUX UNDERFILL AND A FILLED FLUX UNDERFILL TO MANUFACTURE A FLIP-CHIP
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Patent #:
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Issue Dt:
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07/23/2002
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Application #:
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09437930
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Filing Dt:
|
11/10/1999
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Title:
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TESTING INSULATION BETWEEN CONDUCTORS
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Patent #:
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Issue Dt:
|
11/14/2000
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Application #:
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09438642
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Filing Dt:
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11/12/1999
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Title:
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PROCESS FOR FORMING LOW K SILICON OXIDE DIELECTRIC MATERIAL WHILE SUPPRESSING PRESSURE SPIKING AND INHIBITING INCREASE IN DIELECTRIC CONSTANT
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Patent #:
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Issue Dt:
|
10/01/2002
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Application #:
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09439048
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Filing Dt:
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11/12/1999
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Title:
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METHOD AND SYSTEM FOR DETERMINING OPERATOR STAFFING
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Patent #:
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Issue Dt:
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04/16/2002
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Application #:
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09440492
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Filing Dt:
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11/15/1999
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Title:
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METHOD OF ADDING FILLER INTO A NON-FILLED UNDERFILL SYSTEM BY USING A HIGHLY FILLED FILLET
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Patent #:
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Issue Dt:
|
05/06/2003
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Application #:
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09441543
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Filing Dt:
|
11/16/1999
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Title:
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BACKSIDE LIQUID CRYSTAL ANALYSIS TECHNIQUE FOR FLIP-CHIP PACKAGES
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Patent #:
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Issue Dt:
|
01/01/2002
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Application #:
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09441561
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Filing Dt:
|
11/17/1999
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Title:
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METAL SILICIDE AS A BARRIER FOR MOM CAPACITORS IN CMOS TECHNOLOGIES
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Patent #:
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Issue Dt:
|
12/18/2001
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Application #:
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09441676
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Filing Dt:
|
11/17/1999
|
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Title:
|
METHOD OF FABRICATING A MOM CAPACITOR HAVING A METAL SILICIDE BARRIER
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Patent #:
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|
Issue Dt:
|
01/30/2001
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Application #:
|
09442078
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Filing Dt:
|
11/16/1999
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Title:
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METHOD AND APPARATUS FOR USING ACROSS WAFER BACK PRESSURE DIFFERENTIALS TO INFLUENCE THE PERFORMANCE OF CHEMICAL MECHANICAL POLISHING
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Patent #:
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Issue Dt:
|
06/12/2001
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Application #:
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09442688
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Filing Dt:
|
11/18/1999
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Title:
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DISTRIBUTED COMMUNICATIONS SYSTEM FOR REDUCING EQUIPMENT DOWN-TIME
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