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Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:045216/0020   Pages: 334
Recorded: 02/01/2018
Attorney Dkt #:43172.01200
Conveyance: SECURITY INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 3463
Page 15 of 35
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35
1
Patent #:
Issue Dt:
09/25/2001
Application #:
09443036
Filing Dt:
11/18/1999
Title:
DUAL-THICKNESS SOLDER MASK IN INTEGRATED CIRCUIT PACKAGE
2
Patent #:
Issue Dt:
04/09/2002
Application #:
09444817
Filing Dt:
11/22/1999
Title:
METHOD OF POLISHING SEMICONDUCTOR STRUCTURES USING A TWO-STEP CHEMICAL MECHANICAL PLANARIZATION WITH SLURRY PARTICLES HAVING DIFFERENT PARTICLE BULK DENSITIES
3
Patent #:
Issue Dt:
08/02/2005
Application #:
09444818
Filing Dt:
11/22/1999
Title:
METHODS AND APPARATUS FOR IDENTIFICATION AND PURCHASE OF BROADCAST DIGITAL MUSIC AND OTHER TYPES OF INFORMATION
4
Patent #:
Issue Dt:
09/18/2001
Application #:
09444975
Filing Dt:
11/22/1999
Publication #:
Pub Dt:
06/14/2001
Title:
ADVANCED MODULAR CELL PLACEMENT SYSTEM
5
Patent #:
Issue Dt:
05/17/2011
Application #:
09447284
Filing Dt:
11/23/1999
Title:
CORDLESS TELEPHONE WITH MP3 PLAYER CAPABILITY
6
Patent #:
Issue Dt:
06/12/2001
Application #:
09448349
Filing Dt:
11/23/1999
Title:
METHOD TO SELECTIVELY HEAT SEMICONDUCTOR WAFERS
7
Patent #:
Issue Dt:
04/01/2003
Application #:
09449324
Filing Dt:
11/24/1999
Title:
CAPACITANCE ESTIMATION
8
Patent #:
Issue Dt:
05/15/2001
Application #:
09450522
Filing Dt:
11/29/1999
Title:
THIN FILM TRANSISTORS
9
Patent #:
Issue Dt:
10/24/2000
Application #:
09450525
Filing Dt:
11/29/1999
Title:
THIN FILM TRANSISTORS
10
Patent #:
Issue Dt:
06/10/2003
Application #:
09451053
Filing Dt:
11/30/1999
Title:
SURFACE TREATMENT ANNEAL OF HYDROGENATED SILICON-OXY-CARBIDE DIELECTRIC LAYER
11
Patent #:
Issue Dt:
11/19/2002
Application #:
09451054
Filing Dt:
11/30/1999
Publication #:
Pub Dt:
01/03/2002
Title:
SEMICONDUCTOR DEVICE HAVING SELF-ALIGNED CONTACT AND LANDING PAD STRUCTURE AND METHOD OF FORMING SAME
12
Patent #:
Issue Dt:
03/27/2001
Application #:
09451078
Filing Dt:
11/30/1999
Title:
AUTOMATIC COMPOUND SHAKING MACHINE
13
Patent #:
Issue Dt:
10/02/2001
Application #:
09454257
Filing Dt:
12/02/1999
Title:
SLURRY FILLING A RECESS FORMED DURING SEMICONDUCTOR FABRICATION
14
Patent #:
Issue Dt:
12/11/2001
Application #:
09454909
Filing Dt:
12/03/1999
Title:
METHODS FOR FABRICATING A MULTILEVEL INTERCONNECTION FOR AN INTEGRATED CIRCUIT DEVICE UTILIZING A SELECTIVE OVERLAYER
15
Patent #:
Issue Dt:
03/06/2001
Application #:
09456210
Filing Dt:
12/07/1999
Title:
PROCESS FOR FABRICATING INTEGRATED CIRCUIT DEVICES HAVING THIN FILM TRANSISTORS
16
Patent #:
Issue Dt:
06/10/2003
Application #:
09456224
Filing Dt:
12/07/1999
Title:
METHOD OF FORMING AN ALIGNMENT FEATURE IN OR ON A MULTILAYERED SEMICONDUCTOR STRUCTURE
17
Patent #:
Issue Dt:
08/20/2002
Application #:
09456807
Filing Dt:
12/08/1999
Title:
ARTICLE COMPRISING A DIELECTRIC MATERIAL OF ZR-GE-TI-O OR HF-GE-TI-O AND METHOD OF MAKING THE SAME
18
Patent #:
Issue Dt:
03/25/2003
Application #:
09459708
Filing Dt:
12/13/1999
Title:
CURVILINEAR CHEMICAL MECHANICAL PLANARIZATION DEVICE AND METHOD
19
Patent #:
Issue Dt:
06/25/2002
Application #:
09461609
Filing Dt:
12/15/1999
Title:
MANUFACTURE OF DIELECTRICALLY ISOLATED INTEGRATED CIRCUITS
20
Patent #:
Issue Dt:
08/21/2001
Application #:
09464225
Filing Dt:
12/15/1999
Title:
CORROSION SENSITIVITY STRUCTURES FOR VIAS AND CONTACT HOLES IN INTEGRATED CIRCUITS
21
Patent #:
Issue Dt:
07/06/2004
Application #:
09464297
Filing Dt:
12/15/1999
Title:
PROCESS FOR ETCHING A CONTROLLABLE THICKNESS OF OXIDE ON AN INTEGRATED CIRCUIT STRUCTURE ON A SEMICONDUCTOR SUBSTRATE USING NITROGEN PLASMA AND PLASMA AND AN RF BIAS APPLIED TO THE SUBSTRATE
22
Patent #:
Issue Dt:
07/01/2003
Application #:
09464623
Filing Dt:
12/16/1999
Title:
PROGRAMMABLE ASIC
23
Patent #:
Issue Dt:
08/13/2002
Application #:
09464741
Filing Dt:
12/16/1999
Title:
METHOD FOR PROGRAMMING AN FPGA AND IMPLEMENTING AN FPGA INTERCONNECT USING CLOCK CONTROLS
24
Patent #:
Issue Dt:
12/02/2003
Application #:
09464811
Filing Dt:
12/17/1999
Title:
INTEGRATION OF LOW K DIELECTRIC MATERIAL IN SEMICONDUCTOR CIRCUIT STRUCTURES
25
Patent #:
Issue Dt:
07/09/2002
Application #:
09465075
Filing Dt:
12/16/1999
Publication #:
Pub Dt:
03/21/2002
Title:
PROCESS FOR FORMING A DUAL DAMASCENE BOND PAD STRUCTURE OVER ACTIVE CIRCUITRY
26
Patent #:
Issue Dt:
01/04/2005
Application #:
09465089
Filing Dt:
12/16/1999
Title:
DUAL DAMASCENE BOND PAD STRUCTURE FOR LOWERING STRESS AND ALLOWING CIRCUITRY UNDER PADS
27
Patent #:
Issue Dt:
11/08/2005
Application #:
09465131
Filing Dt:
12/16/1999
Title:
METHOD AND APPARATUS FOR THERMAL PROFILING OF FLIP-CHIP PACKAGES
28
Patent #:
Issue Dt:
05/28/2002
Application #:
09465132
Filing Dt:
12/16/1999
Title:
METHOD AND APPARATUS FOR CLEANING AND REMOVING FLUX FROM AN ELECTRONIC COMPONENT PACKAGE
29
Patent #:
Issue Dt:
11/20/2001
Application #:
09465425
Filing Dt:
12/20/1999
Title:
METHOD AND STRUCTURE FOR REDUCING THE INCIDENCE OF VOIDING IN AN UNDERFILL LAYER OF AN ELECTRONIC COMPONENT PACKAGE
30
Patent #:
Issue Dt:
02/25/2003
Application #:
09465633
Filing Dt:
12/17/1999
Title:
METHOD OF DEPOSITION OF FILMS
31
Patent #:
Issue Dt:
06/08/2004
Application #:
09465880
Filing Dt:
12/16/1999
Title:
METHOD AND APPARATUS FOR THICKNESS CONTROL AND REPRODUCIBILITY OF DIELECTRIC FILM DEPOSITION
32
Patent #:
Issue Dt:
10/16/2001
Application #:
09466285
Filing Dt:
12/17/1999
Title:
METHOD FOR BENCHMARKING THIN FILM MEASUREMENT TOOLS
33
Patent #:
Issue Dt:
10/23/2001
Application #:
09466449
Filing Dt:
12/17/1999
Title:
ARTICLE COMPRISING OXIDE-BONDABLE SOLDER
34
Patent #:
Issue Dt:
10/01/2002
Application #:
09466715
Filing Dt:
12/17/1999
Title:
METHOD FOR IN-SITU REMOVAL OF SIDE WALLS IN MOM CAPACITOR FORMATION
35
Patent #:
Issue Dt:
05/01/2001
Application #:
09467081
Filing Dt:
12/10/1999
Title:
PLASTIC BALL GRID ARRAY PACKAGE WITH STRIP LINE CONFIGURATION
36
Patent #:
Issue Dt:
09/14/2004
Application #:
09467253
Filing Dt:
12/20/1999
Title:
WIRE BONDING METHOD FOR COPPER INTERCONNECTS IN SEMICONDUCTOR DEVICES
37
Patent #:
Issue Dt:
05/08/2001
Application #:
09467340
Filing Dt:
12/20/1999
Title:
NON-LINEAR CIRCUIT ELEMENTS ON INTEGRATED CIRCUITS
38
Patent #:
Issue Dt:
04/23/2002
Application #:
09467622
Filing Dt:
12/20/1999
Title:
METHOD AND APPARATUS FOR DETECTING PRESENCE OF RESIDUAL POLISHING SLURRY SUBSEQUENT TO POLISHING OF A SEMICONDUCTOR WAFER
39
Patent #:
Issue Dt:
04/23/2002
Application #:
09469090
Filing Dt:
12/21/1999
Title:
ELECTROCHEMICAL ABATEMENT OF PERFLUORINATED COMPOUNDS
40
Patent #:
Issue Dt:
01/29/2002
Application #:
09469579
Filing Dt:
12/22/1999
Title:
METHOD OF FABRICATING AN INDIUM FIELD IMPLANT FOR PUNCHTHROUGH PROTECTION IN SEMICONDUCTOR DEVICES
41
Patent #:
Issue Dt:
09/23/2003
Application #:
09470362
Filing Dt:
12/22/1999
Title:
CYCLE MODELING IN CYCLE ACCURATE SOFTWARE SIMULATORS OF HARDWARE MODULES FOR SOFTWARE/SOFTWARE CROSS-SIMULATION AND HARDWARE/SOFTWARE CO-SIMULATION
42
Patent #:
Issue Dt:
04/02/2002
Application #:
09470861
Filing Dt:
12/23/1999
Title:
PREDICTIVE PROB STABILIZATION RELATIVE TO SUBJECT MOVEMENT
43
Patent #:
Issue Dt:
08/14/2001
Application #:
09471842
Filing Dt:
12/23/1999
Title:
METHOD AND APPARATUS FOR MAINTAINING TEST DATA DURING FABRICATION OF A SEMICONDUCTOR WAFER
44
Patent #:
Issue Dt:
01/20/2004
Application #:
09472326
Filing Dt:
12/23/1999
Title:
INTERFEROMETRIC PROBE STABILIZATION RELATIVE TO SUBJECT MOVEMENT
45
Patent #:
Issue Dt:
12/17/2002
Application #:
09472331
Filing Dt:
12/23/1999
Title:
MOS TRANSISTOR HAVING ALUMINUM NITRIDE GATE STRUCTURE AND METHOD OF NMAUFACTURING SAME
46
Patent #:
Issue Dt:
09/18/2001
Application #:
09472332
Filing Dt:
12/23/1999
Title:
SPUTTERING METHOD FOR FORMING DIELECTRIC FILMS
47
Patent #:
Issue Dt:
09/11/2001
Application #:
09473876
Filing Dt:
12/28/1999
Title:
METHOD OF ETCHING SELF-ALIGNED VIAS TO METAL USING A SILCON NITRIDE SPACER
48
Patent #:
Issue Dt:
11/27/2001
Application #:
09474666
Filing Dt:
12/29/1999
Title:
DUAL NITROGEN IMPLANTATION TECHNIQUES FOR OXYNITRIDE FORMATION IN SEMICONDUCTOR DEVICES
49
Patent #:
Issue Dt:
05/14/2002
Application #:
09476511
Filing Dt:
01/03/2000
Title:
DEVICE COMPRISING N-CHANNEL SEMICONDUCTOR MATERIAL
50
Patent #:
Issue Dt:
12/17/2002
Application #:
09477170
Filing Dt:
01/04/2000
Title:
LOCAL INTERCONNECTION PROCESS FOR PREVENTING DOPANT CROSS DIFFUSION IN SHARED GATE ELECTRODES
51
Patent #:
Issue Dt:
12/10/2002
Application #:
09477306
Filing Dt:
01/04/2000
Title:
PROGRAMMING A SUBSTRATE FOR ARRAY-TYPE PACKAGES
52
Patent #:
Issue Dt:
05/06/2003
Application #:
09477310
Filing Dt:
01/04/2000
Title:
PROCESS FOR FABRICATING AN INTEGRATED CIRCUIT DEVICE HAVING CAPACITORS WITH A MULTILEVEL METALLIZATION
53
Patent #:
Issue Dt:
02/11/2003
Application #:
09477833
Filing Dt:
01/05/2000
Title:
CHEMICAL MECHANICAL POLISHER INCLUDING A PAD CONDITIONER AND A METHOD OF MANUFACTURING AN INTEGRATED CIRCUIT USING THE CHEMICAL MECHANICAL POLISHER
54
Patent #:
Issue Dt:
02/12/2002
Application #:
09478164
Filing Dt:
01/05/2000
Title:
SUBSTRATE POSITION LOCATION SYSTEM LSI LOGIC CORPORATION
55
Patent #:
Issue Dt:
01/22/2002
Application #:
09478647
Filing Dt:
01/06/2000
Title:
DIFFUSION BARRIER FOR USE WITH HIGH DIELECTRIC CONSTANT MATERIALS AND ELECTRONIC DEVICES INCORPORATING SAME
56
Patent #:
Issue Dt:
10/16/2001
Application #:
09478725
Filing Dt:
01/06/2000
Title:
METHOD OF FORMING A CAPACITOR HAVING A TUNGSTEIN BOTTOM ELECTRODE IN A SEMICONDUCTOR WAFER
57
Patent #:
Issue Dt:
08/06/2002
Application #:
09478972
Filing Dt:
01/06/2000
Title:
INTERPOSER TAPE FOR SEMICONDUCTOR PACKAGE
58
Patent #:
Issue Dt:
06/26/2001
Application #:
09480014
Filing Dt:
01/10/2000
Title:
ELECTRICAL CONTACT AND HOUSING FOR USE AS AN INTERFACE BETWEEN A TESTING FIXTURE AND A DEVICE UNDER TEST
59
Patent #:
Issue Dt:
03/19/2002
Application #:
09480224
Filing Dt:
01/10/2000
Title:
Multi-Layered Metal Silicide Resistor For Si Ic's
60
Patent #:
Issue Dt:
10/30/2001
Application #:
09480387
Filing Dt:
01/11/2000
Title:
Test Structures For Testing Planarization Systems And Methods For Using Same
61
Patent #:
Issue Dt:
06/11/2002
Application #:
09481463
Filing Dt:
01/11/2000
Title:
SEMICONDUCTOR DEVICE HAVING A METAL BARRIER LAYER FOR A DIELECTRIC MATERIAL HAVING A HIGH DIELECTRIC CONSTANT AND A METHOD OF MANUFACTURE THEREOF
62
Patent #:
Issue Dt:
04/01/2003
Application #:
09481992
Filing Dt:
01/11/2000
Title:
METHOD OF MAKING A GRADED GROWN, HIGH QUALITY OXIDE LAYER FOR A SEMICONDUCTOR DEVICE
63
Patent #:
Issue Dt:
06/11/2002
Application #:
09482390
Filing Dt:
01/12/2000
Publication #:
Pub Dt:
07/19/2001
Title:
INSERT FOR USE IN TRANSPORTING A WAFER CARRIER
64
Patent #:
Issue Dt:
10/15/2002
Application #:
09483297
Filing Dt:
01/14/2000
Title:
ARTICLE COMPRISING SMALL DIAMETER NANOWIRES AND METHOD FOR MAKING THE SAME
65
Patent #:
Issue Dt:
04/23/2002
Application #:
09483576
Filing Dt:
01/14/2000
Title:
Polishing Fluid Polishing Method Semiconductor Device andSemiconductor Device Fabrication Method
66
Patent #:
Issue Dt:
12/11/2001
Application #:
09483785
Filing Dt:
01/14/2000
Title:
Polishing fluid, polishing method, semiconductor device and semiconductor device fabrication method
67
Patent #:
Issue Dt:
08/20/2002
Application #:
09484310
Filing Dt:
01/18/2000
Title:
METHOD FOR MAKING AN INTERCONNECT LAYER AND A SEMICONDUCTOR DEVICE INCLUDING THE SAME
68
Patent #:
Issue Dt:
08/14/2001
Application #:
09484759
Filing Dt:
01/18/2000
Title:
Method for making a semiconductor device
69
Patent #:
Issue Dt:
09/10/2002
Application #:
09487984
Filing Dt:
01/20/2000
Title:
MULTIPLE METAL ETCHANT SYSTEM FOR INTEGRATED CIRCUITS
70
Patent #:
Issue Dt:
08/20/2002
Application #:
09488355
Filing Dt:
01/20/2000
Title:
LITHOGRAPHIC METHOD UTILIZING A PHASE-SHIFTING MASK
71
Patent #:
Issue Dt:
08/28/2001
Application #:
09488438
Filing Dt:
01/20/2000
Title:
Loose die fixture
72
Patent #:
Issue Dt:
10/28/2003
Application #:
09488662
Filing Dt:
01/20/2000
Title:
PHASE-SHIFTING MASK AND SEMICONDUCTOR DEVICE
73
Patent #:
Issue Dt:
10/29/2002
Application #:
09488899
Filing Dt:
01/21/2000
Title:
METHOD FOR TREATING AN EFFLUENT GAS DURING SEMICONDUCTOR PROCESSING
74
Patent #:
Issue Dt:
12/24/2002
Application #:
09489092
Filing Dt:
01/21/2000
Title:
CAPACITOR FOR INTEGRATION WITH COPPER DAMASCENE PROCESSES
75
Patent #:
Issue Dt:
04/09/2002
Application #:
09489302
Filing Dt:
01/21/2000
Title:
VERTICALLY INTEGRATED FLIP CHIP SEMICONDUCTOR PACKAGE
76
Patent #:
Issue Dt:
12/12/2000
Application #:
09490655
Filing Dt:
01/24/2000
Title:
MICROMAGNETIC DEVICE FOR POWER PROCESSING APPLICATIONS AND METHOD OF MANUFACTURE THEREFOR
77
Patent #:
Issue Dt:
06/17/2003
Application #:
09490912
Filing Dt:
01/25/2000
Title:
CLEANING BRUSH CONDITIONING APPARATUS
78
Patent #:
Issue Dt:
10/29/2002
Application #:
09491644
Filing Dt:
01/27/2000
Title:
METHODS FOR IMPROVED ENCAPUSLATION OF THICK METAL FEATURES IN INTEGRATED CIRCUIT FABRICATION
79
Patent #:
Issue Dt:
04/09/2002
Application #:
09491836
Filing Dt:
01/26/2000
Title:
Electrochemical mechanical planarization apparatus and method
80
Patent #:
Issue Dt:
10/30/2001
Application #:
09492600
Filing Dt:
01/27/2000
Title:
Die coating material stirring machine
81
Patent #:
Issue Dt:
09/24/2002
Application #:
09492881
Filing Dt:
01/26/2000
Title:
I/O DEVICE LAYOUT DURING INTEGRATED CIRCUIT DESIGN
82
Patent #:
Issue Dt:
09/03/2002
Application #:
09493467
Filing Dt:
01/28/2000
Title:
SPARE CELLS PLACEMENT METHODOLOGY
83
Patent #:
Issue Dt:
06/04/2002
Application #:
09494070
Filing Dt:
01/28/2000
Title:
HEAT DISSIPATING APPARATUS AND METHOD FOR ELECTRONIC COMPONENTS
84
Patent #:
Issue Dt:
07/23/2002
Application #:
09494605
Filing Dt:
01/31/2000
Title:
SYSTEMATIC SKEW REDUCTION THROUGH BUFFER RESIZING
85
Patent #:
Issue Dt:
03/12/2002
Application #:
09494705
Filing Dt:
01/31/2000
Title:
Apparatus and method for in-situ measurement of polishing pad thickness loss
86
Patent #:
Issue Dt:
02/27/2001
Application #:
09495512
Filing Dt:
02/01/2000
Title:
INTEGRATED CIRCUIT HAVING LOW VOLTAGE AND HIGH VOLTAGE DEVICES ON A COMMON SEMICONDUCTOR SUBSTRATE
87
Patent #:
Issue Dt:
04/02/2002
Application #:
09496829
Filing Dt:
02/02/2000
Title:
CMP SYSTEM AND SLURRY FOR POLISHING SEMICONDUCTOR WAFERS AND RELATED METHOD
88
Patent #:
Issue Dt:
01/07/2003
Application #:
09496971
Filing Dt:
02/02/2000
Title:
INTERCONNECT-EMBEDDED METAL-INSULATOR-METAL CAPACITOR
89
Patent #:
Issue Dt:
01/27/2004
Application #:
09496989
Filing Dt:
02/02/2000
Title:
HEATSPREADER FOR A FLIP CHIP DEVICE, AND METHOD FOR CONNECTING THE HEATSPREADER
90
Patent #:
Issue Dt:
01/07/2003
Application #:
09497521
Filing Dt:
02/04/2000
Title:
PERIPHERAL PARTITIONING AND TREE DECOMPOSITION FOR PARTIAL SCAN
91
Patent #:
Issue Dt:
10/23/2001
Application #:
09497982
Filing Dt:
02/04/2000
Title:
Selective etching of thin films
92
Patent #:
Issue Dt:
11/20/2007
Application #:
09497993
Filing Dt:
02/04/2000
Title:
METHOD OF ISOLATION FOR ACOUSTIC RESONATOR DEVICE
93
Patent #:
Issue Dt:
01/13/2004
Application #:
09498005
Filing Dt:
02/04/2000
Title:
HIGH PERFORMANCE MULTI-CHIP IC PACKAGE
94
Patent #:
Issue Dt:
06/11/2002
Application #:
09499411
Filing Dt:
02/07/2000
Title:
HIGH DIELECTRIC CONSTANT GATE OXIDES FOR SILICON-BASED DEVICES
95
Patent #:
Issue Dt:
01/01/2002
Application #:
09499801
Filing Dt:
02/08/2000
Title:
Interposer for semiconductor package assembly
96
Patent #:
Issue Dt:
10/09/2001
Application #:
09500855
Filing Dt:
02/09/2000
Title:
Process for fabricating improved iron-cobalt magnetostrictive alloy and article comprising alloy
97
Patent #:
Issue Dt:
12/11/2001
Application #:
09502868
Filing Dt:
02/11/2000
Title:
Method for producing devices having piezoelectric films
98
Patent #:
Issue Dt:
01/29/2002
Application #:
09503225
Filing Dt:
02/11/2000
Title:
Method for producing piezoelectric films with rotating magnetron sputtering system
99
Patent #:
Issue Dt:
04/24/2001
Application #:
09503691
Filing Dt:
02/14/2000
Title:
Advanced modular cell placement system with overlap remover with minimal noise
100
Patent #:
Issue Dt:
02/13/2001
Application #:
09503814
Filing Dt:
02/15/2000
Title:
Bond pad for a flip chip package, and method of forming the same
Assignors
1
Exec Dt:
01/24/2018
2
Exec Dt:
01/24/2018
3
Exec Dt:
01/24/2018
Assignee
1
225 W. WASHINGTON ST., 9TH FLOOR
CHICAGO, ILLINOIS 60606
Correspondence name and address
JAVIER J. RAMOS
1850 K STREET, NW, SUITE 1100
MILBANK, TWEED, HADLEY & MCCLOY, LLP
WASHINGTON, DC 20006

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