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07/01/2003
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09981154
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10/16/2001
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06/15/2004
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09981200
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10/17/2001
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07/15/2003
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11/13/2001
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02/21/2006
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11/14/2001
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04/15/2003
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11/20/2001
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06/15/2004
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11/14/2001
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05/02/2002
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09/07/2004
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11/05/2001
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10/29/2002
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11/05/2001
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05/06/2003
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11/05/2001
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04/15/2003
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11/21/2001
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11/15/2005
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11/26/2001
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12/30/2003
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11/27/2001
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11/09/2004
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11/27/2001
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07/27/2004
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11/28/2001
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06/01/2004
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11/30/2001
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02/28/2006
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11/29/2001
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06/24/2003
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10/30/2001
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02/13/2003
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10/17/2006
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10/30/2001
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01/23/2003
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05/11/2004
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10/24/2001
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06/24/2003
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10/19/2001
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09/16/2003
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10/23/2001
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03/04/2003
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10/26/2001
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09/02/2003
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10/26/2001
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12/23/2003
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10/31/2001
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06/17/2003
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10/24/2001
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07/04/2002
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05/18/2004
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10/24/2001
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04/24/2003
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05/20/2003
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11/01/2001
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07/27/2004
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12/03/2001
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09/23/2003
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12/05/2001
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10/26/2004
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11/30/2001
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04/22/2003
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11/30/2001
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01/20/2004
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11/01/2001
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03/25/2003
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12/04/2001
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01/27/2004
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10/31/2001
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05/01/2003
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06/08/2004
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10/31/2001
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03/09/2004
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11/13/2001
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05/15/2003
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11/18/2003
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11/13/2001
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03/16/2004
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10/19/2001
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06/20/2006
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12/05/2001
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01/01/2008
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04/06/2004
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12/10/2001
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01/06/2004
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10/24/2001
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05/22/2003
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05/13/2003
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12/11/2001
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02/03/2004
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12/13/2001
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06/08/2004
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12/13/2001
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09/07/2004
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12/12/2001
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05/13/2008
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12/12/2001
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03/07/2006
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10/29/2001
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04/18/2002
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11/25/2003
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09/14/2004
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10/30/2001
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06/15/2004
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10/30/2001
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06/03/2003
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12/12/2001
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07/08/2003
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12/13/2001
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08/03/2004
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12/17/2001
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06/19/2003
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03/18/2003
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12/19/2001
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12/02/2003
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12/19/2001
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03/30/2004
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12/19/2001
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07/01/2003
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12/20/2001
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05/09/2002
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12/21/2001
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05/16/2002
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05/04/2004
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12/20/2001
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01/18/2005
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12/20/2001
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06/26/2003
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09/23/2003
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12/20/2001
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10/24/2002
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11/09/2004
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Filing Dt:
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12/21/2001
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Publication #:
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Pub Dt:
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06/26/2003
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Title:
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METHOD FOR MAKING A BIPOLAR TRANSISTOR WITH AN OXYGEN IMPLANTED EMITTER WINDOW
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Patent #:
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Issue Dt:
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01/28/2003
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Application #:
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10033164
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Filing Dt:
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10/19/2001
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Title:
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PROCESS FOR FORMING HIGH DIELECTRIC CONSTANT GATE DIELECTRIC FOR INTEGRATED CIRCUIT STRUCTURE
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Patent #:
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Issue Dt:
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02/10/2004
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Application #:
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10034535
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Filing Dt:
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12/27/2001
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Title:
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METHOD TO DEBUG IKOS METHOD
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Patent #:
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Issue Dt:
|
05/03/2005
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Application #:
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10034839
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Filing Dt:
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12/27/2001
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Publication #:
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Pub Dt:
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07/03/2003
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Title:
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SYSTEM AND METHOD FOR COEVOLUTIONARY CIRCUIT DESIGN
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Patent #:
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Issue Dt:
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11/30/2004
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Application #:
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10035346
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Filing Dt:
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12/28/2001
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Title:
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CMOS VARACTOR WITH CONSTANT DC/DV CHARACTERISTIC
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Patent #:
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Issue Dt:
|
06/01/2004
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Application #:
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10035501
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Filing Dt:
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10/25/2001
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Title:
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METHOD FOR GROWING THIN FILMS
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Patent #:
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Issue Dt:
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04/27/2004
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Application #:
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10035704
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Filing Dt:
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10/18/2001
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Title:
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MULTI-STEP PROCESS FOR FORMING A BARRIER FILM FOR USE IN COPPER LAYER FORMATION
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Patent #:
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Issue Dt:
|
08/10/2004
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Application #:
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10036020
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Filing Dt:
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12/26/2001
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Publication #:
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Pub Dt:
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06/26/2003
| | | | |
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Title:
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CMOS VERTICAL REPLACEMENT GATE (VRG) TRANSISTORS
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Patent #:
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Issue Dt:
|
08/30/2005
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Application #:
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10036621
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Filing Dt:
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12/21/2001
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Title:
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VISCOUS ELECTROPOLISHING SYSTEM
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Patent #:
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Issue Dt:
|
04/12/2005
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Application #:
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10038371
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Filing Dt:
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01/02/2002
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Publication #:
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Pub Dt:
|
01/02/2003
| | | | |
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Title:
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SPLIT BARRIER LAYER INCLUDING NITROGEN-CONTAINING PORTION AND OXYGEN-CONTAINING PORTION
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Patent #:
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Issue Dt:
|
07/13/2004
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Application #:
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10038734
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Filing Dt:
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12/31/2001
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Publication #:
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Pub Dt:
|
05/09/2002
| | | | |
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Title:
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METHOD FOR FABRICATING MOS DEVICE WITH HALO IMPLANTED REGION
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|
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Patent #:
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Issue Dt:
|
01/11/2005
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Application #:
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10039508
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Filing Dt:
|
11/09/2001
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|
Title:
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ADJUSTABLE TRANSMISSION PHASE SHIFT MASK
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|
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Patent #:
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Issue Dt:
|
11/18/2003
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Application #:
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10044215
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Filing Dt:
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11/19/2001
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|
Title:
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INTERMITTENT PULSED OXIDATION PROCESS
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Patent #:
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Issue Dt:
|
10/28/2003
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Application #:
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10044781
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Filing Dt:
|
01/10/2002
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Publication #:
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Pub Dt:
|
07/10/2003
| | | | |
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Title:
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ARCHITECTURE FOR A SEA OF PLATFORMS
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|
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Patent #:
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Issue Dt:
|
10/03/2006
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Application #:
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10044864
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Filing Dt:
|
10/22/2001
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|
Title:
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METHOD FOR CREATING BARRIERS FOR COPPER DIFFUSION
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|
|
|
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Patent #:
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Issue Dt:
|
11/11/2003
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Application #:
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10045473
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Filing Dt:
|
11/08/2001
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|
Title:
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APPARATUS AND METHOD FOR SIGNAL SKEW CHARACTERIZATION UTILIZING CLOCK DIVISION
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|
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Patent #:
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Issue Dt:
|
06/10/2003
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Application #:
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10047516
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Filing Dt:
|
10/26/2001
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|
Publication #:
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Pub Dt:
|
05/15/2003
| | | | |
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Title:
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METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE EMPLOYING A FLUORINE-BASED ETCH SUBSTANTIALLY FREE OF HYDROGEN
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|
|
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Patent #:
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Issue Dt:
|
04/29/2003
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Application #:
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10051937
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Filing Dt:
|
01/17/2002
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|
Title:
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BIPOLAR TRANSISTOR HAVING AN EMITTER COMPRISED OF A SEMI-INSULATING MATERIAL
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|
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Patent #:
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Issue Dt:
|
04/27/2004
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Application #:
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10053097
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Filing Dt:
|
01/18/2002
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Publication #:
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Pub Dt:
|
05/23/2002
| | | | |
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Title:
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APPARATUS AND METHOD FOR DETERMINING PROCESS WIDTH VARIATIONS IN INTEGRATED CIRCUITS
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|
|
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Patent #:
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Issue Dt:
|
01/06/2004
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Application #:
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10053537
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Filing Dt:
|
11/02/2001
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|
Title:
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METHOD FOR RETICLE FORMATION UTILIZING METAL VAPORIZATION
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|
|
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Patent #:
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Issue Dt:
|
03/23/2004
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Application #:
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10055082
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Filing Dt:
|
01/22/2002
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Publication #:
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Pub Dt:
|
07/24/2003
| | | | |
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Title:
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LOW VOLTAGE BREAKDOWN ELEMENT FOR ESD TRIGGER DEVICE
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|
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Patent #:
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Issue Dt:
|
10/05/2004
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Application #:
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10055583
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Filing Dt:
|
01/23/2002
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Publication #:
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Pub Dt:
|
07/24/2003
| | | | |
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Title:
|
SYSTEM AND METHOD FOR THE ABATEMENT OF TOXIC CONSTITUENTS OF EFFLUENT GASES
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|
|
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Patent #:
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Issue Dt:
|
08/12/2003
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Application #:
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10055812
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Filing Dt:
|
01/23/2002
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|
Title:
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REDUCING PROBE CARD SUBSTRATE WARPAGE
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|
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Patent #:
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|
Issue Dt:
|
06/29/2004
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Application #:
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10059480
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Filing Dt:
|
01/29/2002
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|
Publication #:
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Pub Dt:
|
07/31/2003
| | | | |
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Title:
|
POWER ROUTING WITH OBSTACLES
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|
|
|
|
Patent #:
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|
Issue Dt:
|
03/23/2004
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Application #:
|
10060002
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Filing Dt:
|
01/29/2002
|
|
Title:
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MULTI PATTERN RETICLE
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|
|
|
|
Patent #:
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|
Issue Dt:
|
09/02/2003
|
Application #:
|
10060867
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Filing Dt:
|
01/30/2002
|
|
Title:
|
FORMING A SEMICONDUCTOR ON IMPLANTED INSULATOR
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|
|
|
|
Patent #:
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|
Issue Dt:
|
07/27/2004
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Application #:
|
10061475
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Filing Dt:
|
02/01/2002
|
|
Publication #:
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Pub Dt:
|
08/07/2003
| | | | |
|
Title:
|
METHOD OF FABRICATING COMPLEMENTARY SELF-ALIGNED BIPOLAR TRANSISTORS
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/09/2003
|
Application #:
|
10061518
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Filing Dt:
|
02/01/2002
|
|
Title:
|
FLIP CHIP TESTING
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|
|
|
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Patent #:
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|
Issue Dt:
|
06/22/2004
|
Application #:
|
10061519
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Filing Dt:
|
02/01/2002
|
|
Title:
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ELECTROCHEMICAL PLANARIZATION END POINT DETECTION
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|
|
|
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Patent #:
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|
Issue Dt:
|
05/04/2004
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Application #:
|
10061542
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Filing Dt:
|
10/25/2001
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|
Publication #:
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Pub Dt:
|
05/01/2003
| | | | |
|
Title:
|
SYSTEM AND METHOD OF DETERMINING A POLISHING ENDPOINT BY MONITORING SIGNAL INTENSITY
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|
|
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|
Patent #:
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|
Issue Dt:
|
09/16/2003
|
Application #:
|
10067299
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Filing Dt:
|
02/07/2002
|
|
Title:
|
VACUUM SEALED RF/MICROWAVE MICRORESONATOR
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|
|
|
|
Patent #:
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|
Issue Dt:
|
03/02/2004
|
Application #:
|
10072008
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Filing Dt:
|
02/07/2002
|
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Publication #:
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Pub Dt:
|
08/07/2003
| | | | |
|
Title:
|
OVERLAP REMOVER MANAGER
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|
|
|
|
Patent #:
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|
Issue Dt:
|
04/22/2003
|
Application #:
|
10072500
|
Filing Dt:
|
02/05/2002
|
|
Publication #:
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|
Pub Dt:
|
07/18/2002
| | | | |
|
Title:
|
TRENCH CAPACITORS IN SOI SUBSTRATES
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|
|
|
|
Patent #:
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|
Issue Dt:
|
05/09/2006
|
Application #:
|
10077066
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Filing Dt:
|
02/15/2002
|
|
Title:
|
SYSTEM REAL-TIME ANALYSIS TOOL
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|
Patent #:
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|
Issue Dt:
|
10/28/2003
|
Application #:
|
10077497
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Filing Dt:
|
02/15/2002
|
|
Publication #:
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Pub Dt:
|
08/21/2003
| | | | |
|
Title:
|
THERMAL CHARACTERIZATION COMPENSATION
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Patent #:
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|
Issue Dt:
|
12/14/2004
|
Application #:
|
10078233
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Filing Dt:
|
02/15/2002
|
|
Publication #:
|
|
Pub Dt:
|
08/21/2003
| | | | |
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Title:
|
THICK TRACES FROM MULTIPLE DAMASCENE LAYERS
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|
