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Reel/Frame:045216/0020   Pages: 334
Recorded: 02/01/2018
Attorney Dkt #:43172.01200
Conveyance: SECURITY INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 3463
Page 28 of 35
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35
1
Patent #:
Issue Dt:
10/03/2006
Application #:
10887599
Filing Dt:
07/09/2004
Publication #:
Pub Dt:
01/12/2006
Title:
PLACEMENT OF A CLOCK SIGNAL SUPPLY NETWORK DURING DESIGN OF INTEGRATED CIRCUITS
2
Patent #:
Issue Dt:
04/29/2008
Application #:
10889901
Filing Dt:
07/13/2004
Publication #:
Pub Dt:
01/19/2006
Title:
DAMASCENE REPLACEMENT METAL GATE PROCESS WITH CONTROLLED GATE PROFILE AND LENGTH USING SI1-XGEX AS SACRIFICIAL MATERIAL
3
Patent #:
Issue Dt:
07/04/2006
Application #:
10893659
Filing Dt:
07/16/2004
Publication #:
Pub Dt:
12/16/2004
Title:
DUAL LAYER BARRIER FILM TECHNIQUES TO PREVENT RESIST POISONING
4
Patent #:
Issue Dt:
08/19/2008
Application #:
10894781
Filing Dt:
07/20/2004
Publication #:
Pub Dt:
01/26/2006
Title:
METHOD AND SYSTEM FOR OUTPUTTING A SEQUENCE OF COMMANDS AND DATA DESCRIBED BY A FLOWCHART
5
Patent #:
Issue Dt:
04/25/2006
Application #:
10895574
Filing Dt:
07/21/2004
Publication #:
Pub Dt:
01/26/2006
Title:
CARRIER HEAD FOR CHEMICAL MECHANICAL POLISHING
6
Patent #:
Issue Dt:
12/15/2009
Application #:
10897655
Filing Dt:
07/22/2004
Publication #:
Pub Dt:
02/09/2006
Title:
SPECIAL ENGINEERING CHANGE ORDER CELLS
7
Patent #:
Issue Dt:
11/08/2005
Application #:
10898792
Filing Dt:
07/26/2004
Title:
OPERATION OF SEMICONDUCTOR DEVICES SUBJECT TO HOT CARRIER INJECTION
8
Patent #:
Issue Dt:
05/08/2007
Application #:
10900224
Filing Dt:
07/27/2004
Publication #:
Pub Dt:
10/20/2005
Title:
METHOD OF GENERATING TEST PATTERNS TO EFFICIENTLY SCREEN INLINE RESISTANCE DELAY DEFECTS IN COMPLEX ASICS
9
Patent #:
Issue Dt:
12/11/2007
Application #:
10900642
Filing Dt:
07/27/2004
Publication #:
Pub Dt:
01/20/2005
Title:
SELF-TIMED RELIABILITY AND YIELD VEHICLE WITH GATED DATA AND CLOCK
10
Patent #:
Issue Dt:
08/29/2006
Application #:
10900869
Filing Dt:
07/28/2004
Publication #:
Pub Dt:
02/02/2006
Title:
EMBEDDED STRAIN GAUGE IN PRINTED CIRCUIT BOARDS
11
Patent #:
Issue Dt:
06/13/2006
Application #:
10901841
Filing Dt:
07/28/2004
Publication #:
Pub Dt:
02/02/2006
Title:
METHOD OF AUTOMATED REPAIR OF CROSSTALK VIOLATIONS AND TIMING VIOLATIONS IN AN INTEGRATED CIRCUIT DESIGN
12
Patent #:
Issue Dt:
09/26/2006
Application #:
10902332
Filing Dt:
07/29/2004
Publication #:
Pub Dt:
02/02/2006
Title:
APPARATUS AND METHOD FOR IN-SITU MEASURING OF VIBRATIONAL ENERGY IN A PROCESS BATH OF A VIBRATIONAL CLEANING SYSTEM
13
Patent #:
Issue Dt:
02/12/2008
Application #:
10902987
Filing Dt:
07/30/2004
Publication #:
Pub Dt:
02/02/2006
Title:
ENGINEERING CHANGE ORDER SCENARIO MANAGER
14
Patent #:
Issue Dt:
02/06/2007
Application #:
10903836
Filing Dt:
07/30/2004
Publication #:
Pub Dt:
02/02/2006
Title:
ACCURATE DENSITY CALCULATION WITH DENSITY VIEWS IN LAYOUT DATABASES
15
Patent #:
Issue Dt:
08/03/2010
Application #:
10903938
Filing Dt:
07/30/2004
Publication #:
Pub Dt:
02/02/2006
Title:
METAL CAPACITOR STACKED WITH A MOS CAPACITOR TO PROVIDE INCREASED CAPACITANCE DENSITY
16
Patent #:
Issue Dt:
09/30/2008
Application #:
10909603
Filing Dt:
08/02/2004
Publication #:
Pub Dt:
02/02/2006
Title:
DISABLING UNUSED IO RESOURCES IN PLATFORM-BASED INTEGRATED CIRCUITS
17
Patent #:
NONE
Issue Dt:
Application #:
10909821
Filing Dt:
08/02/2004
Publication #:
Pub Dt:
02/10/2005
Title:
Semiconductor wafer chuck assembly for a semiconductor processing device
18
Patent #:
Issue Dt:
09/12/2006
Application #:
10914657
Filing Dt:
08/09/2004
Publication #:
Pub Dt:
02/09/2006
Title:
METHOD OF SIZING VIA ARRAYS AND INTERCONNECTS TO REDUCE ROUTING CONGESTION IN FLIP CHIP INTEGRATED CIRCUITS
19
Patent #:
Issue Dt:
01/23/2007
Application #:
10914921
Filing Dt:
08/10/2004
Publication #:
Pub Dt:
02/16/2006
Title:
METHOD AND APPARATUS FOR DETECTING NETS PHYSICALLY CHANGED AND ELECTRICALLY AFFECTED BY DESIGN ECO
20
Patent #:
Issue Dt:
07/25/2006
Application #:
10915719
Filing Dt:
08/10/2004
Publication #:
Pub Dt:
02/16/2006
Title:
INTERCONNECT DIELECTRIC TUNING
21
Patent #:
Issue Dt:
07/29/2008
Application #:
10916322
Filing Dt:
08/11/2004
Publication #:
Pub Dt:
02/16/2006
Title:
APPLICATION OF GATE EDGE LINER TO MAINTAIN GATE LENGTH CD IN A REPLACEMENT GATE TRANSISTOR FLOW
22
Patent #:
Issue Dt:
10/03/2006
Application #:
10918933
Filing Dt:
08/16/2004
Publication #:
Pub Dt:
02/16/2006
Title:
METHODS FOR OPTIMIZING PACKAGE AND SILICON CO-DESIGN OF INTEGRATED CIRCUIT
23
Patent #:
Issue Dt:
03/18/2008
Application #:
10918981
Filing Dt:
08/16/2004
Publication #:
Pub Dt:
02/03/2005
Title:
INCREASED QUALITY FACTOR OF A VARACTOR IN AN INTEGRATED CIRCUIT VIA A HIGH CONDUCTIVE REGION IN A WELL
24
Patent #:
Issue Dt:
03/04/2008
Application #:
10919591
Filing Dt:
08/17/2004
Publication #:
Pub Dt:
02/23/2006
Title:
METALLIZATION PERFORMANCE IN ELECTRONIC DEVICES
25
Patent #:
Issue Dt:
08/08/2006
Application #:
10920656
Filing Dt:
08/18/2004
Publication #:
Pub Dt:
02/23/2006
Title:
METAL-OXIDE-SEMICONDUCTOR DEVICE HAVING AN ENHANCED SHIELDING STRUCTURE
26
Patent #:
NONE
Issue Dt:
Application #:
10921497
Filing Dt:
08/18/2004
Publication #:
Pub Dt:
01/27/2005
Title:
Multi-level redistribution layer traces for reducing current crowding in flipchip solder bumps
27
Patent #:
Issue Dt:
10/31/2006
Application #:
10921538
Filing Dt:
08/18/2004
Publication #:
Pub Dt:
02/24/2005
Title:
FAILURE ANALYSIS VEHICLE FOR YIELD ENHANCEMENT WITH SELF TEST AT SPEED BURNIN CAPABILITY FOR RELIABILITY TESTING
28
Patent #:
Issue Dt:
09/12/2006
Application #:
10924531
Filing Dt:
08/23/2004
Publication #:
Pub Dt:
01/27/2005
Title:
METHOD OF FINDING CRITICAL NETS IN AN INTEGRATED CIRCUIT DESIGN
29
Patent #:
Issue Dt:
12/25/2007
Application #:
10925497
Filing Dt:
08/24/2004
Publication #:
Pub Dt:
03/02/2006
Title:
WAFER EDGE STRUCTURE MEASUREMENT METHOD
30
Patent #:
Issue Dt:
01/02/2007
Application #:
10925555
Filing Dt:
08/25/2004
Publication #:
Pub Dt:
03/02/2006
Title:
METHODS OF DOWNSTREAM MICROWAVE PHOTORESIST REMOVAL AND VIA CLEAN, PARTICULARLY FOLLOWING STOP-ON TIN ETCHING
31
Patent #:
Issue Dt:
09/19/2006
Application #:
10926631
Filing Dt:
08/26/2004
Publication #:
Pub Dt:
03/02/2006
Title:
INTEGRATED CIRCUIT WITH SUBSTANTIALLY PERPENDICULAR WIRE BONDS
32
Patent #:
Issue Dt:
11/14/2006
Application #:
10927802
Filing Dt:
08/27/2004
Publication #:
Pub Dt:
03/16/2006
Title:
PATTERN COMPONENT ANALYSIS AND MANIPULATION
33
Patent #:
Issue Dt:
03/21/2006
Application #:
10927985
Filing Dt:
08/26/2004
Publication #:
Pub Dt:
03/02/2006
Title:
METHOD AND APPARATUS FOR IMPLEMENTING A CO-AXIAL WIRE IN A SEMICONDUCTOR CHIP
34
Patent #:
Issue Dt:
06/13/2006
Application #:
10928292
Filing Dt:
08/27/2004
Publication #:
Pub Dt:
03/02/2006
Title:
PARAMETRIC OUTLIER DETECTION
35
Patent #:
Issue Dt:
09/19/2006
Application #:
10928799
Filing Dt:
08/27/2004
Publication #:
Pub Dt:
03/02/2006
Title:
PROCESS AND APPARATUS TO ASSIGN COORDINATES TO NODES OF LOGICAL TREES WITHOUT INCREASE OF WIRE LENGTHS
36
Patent #:
Issue Dt:
03/13/2007
Application #:
10929218
Filing Dt:
08/30/2004
Publication #:
Pub Dt:
03/02/2006
Title:
SPECIAL TIE-HIGH/LOW CELLS FOR SINGLE METAL LAYER ROUTE CHANGES
37
Patent #:
Issue Dt:
04/01/2014
Application #:
10929706
Filing Dt:
08/30/2004
Publication #:
Pub Dt:
03/02/2006
Title:
Method for optimizing wafer edge patterning
38
Patent #:
Issue Dt:
04/03/2007
Application #:
10929843
Filing Dt:
08/30/2004
Publication #:
Pub Dt:
03/02/2006
Title:
THREE-TERMINAL, TUNABLE ACTIVE INDUCTOR
39
Patent #:
Issue Dt:
06/12/2007
Application #:
10930544
Filing Dt:
08/30/2004
Publication #:
Pub Dt:
05/26/2005
Title:
PREDICTIVE APPLICATIONS FOR DEVICES WITH THIN DIELECTRIC REGIONS
40
Patent #:
Issue Dt:
03/26/2013
Application #:
10930590
Filing Dt:
08/31/2004
Publication #:
Pub Dt:
03/02/2006
Title:
METHOD FOR HEAT DISSIPATION ON SEMICONDUCTOR DEVICE
41
Patent #:
Issue Dt:
03/13/2007
Application #:
10931605
Filing Dt:
08/31/2004
Title:
FABRICATION OF TRENCHES WITH MULTIPLE DEPTHS ON THE SAME SUBSTRATE
42
Patent #:
Issue Dt:
08/12/2008
Application #:
10931902
Filing Dt:
09/01/2004
Publication #:
Pub Dt:
03/30/2006
Title:
ADVISORY ALERT OF LOW SIGNAL STRENGTH FOR CELL PHONE USER
43
Patent #:
Issue Dt:
05/02/2006
Application #:
10936016
Filing Dt:
09/07/2004
Publication #:
Pub Dt:
03/09/2006
Title:
SYSTEM AND METHOD FOR PROVIDING SCALABILITY IN AN INTEGRATED CIRCUIT
44
Patent #:
Issue Dt:
03/20/2007
Application #:
10936202
Filing Dt:
09/08/2004
Publication #:
Pub Dt:
04/20/2006
Title:
COMPACT CUSTOM LAYOUT FOR RRAM COLUMN CONTROLLER
45
Patent #:
Issue Dt:
05/20/2008
Application #:
10937049
Filing Dt:
09/09/2004
Publication #:
Pub Dt:
03/09/2006
Title:
ACCURATE PIN-BASED MEMORY POWER MODEL USING ARC-BASED CHARACTERIZATION
46
Patent #:
Issue Dt:
06/26/2007
Application #:
10939082
Filing Dt:
09/10/2004
Publication #:
Pub Dt:
03/16/2006
Title:
INTEGRATED HEATSPREADER FOR USE IN WIRE BONDED BALL GRID ARRAY SEMICONDUCTOR PACKAGES
47
Patent #:
NONE
Issue Dt:
Application #:
10939292
Filing Dt:
09/10/2004
Publication #:
Pub Dt:
02/17/2005
Title:
Wire bonding method for copper interconnects in semiconductor devices
48
Patent #:
Issue Dt:
08/07/2007
Application #:
10941665
Filing Dt:
09/14/2004
Publication #:
Pub Dt:
03/16/2006
Title:
GUARD RING FOR IMPROVED MATCHING
49
Patent #:
Issue Dt:
06/03/2008
Application #:
10942444
Filing Dt:
09/16/2004
Publication #:
Pub Dt:
03/10/2005
Title:
APPARATUS AND METHOD TO IMPROVE THE RESOLUTION OF PHOTOLITHOGRAPHY SYSTEMS BY IMPROVING THE TEMPERATURE STABILITY OF THE RETICLE
50
Patent #:
Issue Dt:
10/17/2006
Application #:
10944373
Filing Dt:
09/16/2004
Publication #:
Pub Dt:
03/16/2006
Title:
TECHNIQUES FOR FORMING PASSIVE DEVICES DURING SEMICONDUCTOR BACK-END PROCESSING
51
Patent #:
NONE
Issue Dt:
Application #:
10944995
Filing Dt:
09/20/2004
Publication #:
Pub Dt:
03/23/2006
Title:
Pseudo low volume reticle (PLVR) design for asic manufacturing
52
Patent #:
Issue Dt:
09/21/2010
Application #:
10944996
Filing Dt:
09/20/2004
Publication #:
Pub Dt:
03/23/2006
Title:
WAFER EDGE EXPOSE ALIGNMENT METHOD
53
Patent #:
Issue Dt:
12/26/2006
Application #:
10945177
Filing Dt:
09/20/2004
Publication #:
Pub Dt:
03/23/2006
Title:
FULLY SHIELDED CAPACITOR CELL STRUCTURE
54
Patent #:
Issue Dt:
11/27/2007
Application #:
10945777
Filing Dt:
09/20/2004
Publication #:
Pub Dt:
03/23/2006
Title:
INTEGRATED BARRIER AND SEED LAYER FOR COPPER INTERCONNECT TECHNOLOGY
55
Patent #:
Issue Dt:
09/18/2007
Application #:
10946274
Filing Dt:
09/20/2004
Publication #:
Pub Dt:
03/23/2006
Title:
RECONFIGURING A RAM TO A ROM USING UPPER LAYERS OF METALLIZATION
56
Patent #:
Issue Dt:
02/19/2008
Application #:
10946422
Filing Dt:
09/21/2004
Publication #:
Pub Dt:
03/23/2006
Title:
METHOD FOR CALCULATING FREQUENCY-DEPENDENT IMPEDANCE IN AN INTEGRATED CIRCUIT
57
Patent #:
Issue Dt:
07/11/2006
Application #:
10947069
Filing Dt:
09/22/2004
Publication #:
Pub Dt:
03/23/2006
Title:
TEST STRUCTURE AND METHOD FOR YIELD IMPROVEMENT OF DOUBLE POLY BIPOLAR DEVICE
58
Patent #:
Issue Dt:
12/12/2006
Application #:
10947498
Filing Dt:
09/22/2004
Publication #:
Pub Dt:
03/23/2006
Title:
METHOD OF EARLY PHYSICAL DESIGN VALIDATION AND IDENTIFICATION OF TEXTED METAL SHORT CIRCUITS IN AN INTEGRATED CIRCUIT DESIGN
59
Patent #:
Issue Dt:
02/06/2007
Application #:
10947618
Filing Dt:
09/22/2004
Publication #:
Pub Dt:
03/23/2006
Title:
METHOD OF FLOORPLANNING AND CELL PLACEMENT FOR INTEGRATED CIRCUIT CHIP ARCHITECTURE WITH INTERNAL I/O RING
60
Patent #:
Issue Dt:
02/20/2007
Application #:
10948897
Filing Dt:
09/24/2004
Publication #:
Pub Dt:
04/06/2006
Title:
III-V POWER FIELD EFFECT TRANSISTORS
61
Patent #:
Issue Dt:
01/01/2008
Application #:
10949760
Filing Dt:
09/24/2004
Publication #:
Pub Dt:
04/06/2006
Title:
SURFACE COORDINATE SYSTEM
62
Patent #:
Issue Dt:
02/27/2007
Application #:
10950839
Filing Dt:
09/27/2004
Publication #:
Pub Dt:
04/06/2006
Title:
DYNAMIC EDGE BEAD REMOVAL
63
Patent #:
NONE
Issue Dt:
Application #:
10951430
Filing Dt:
09/28/2004
Publication #:
Pub Dt:
03/30/2006
Title:
Whisker-free lead frames
64
Patent #:
NONE
Issue Dt:
Application #:
10951646
Filing Dt:
09/28/2004
Publication #:
Pub Dt:
03/24/2005
Title:
Plasma removal of high k metal oxide
65
Patent #:
Issue Dt:
06/12/2007
Application #:
10952194
Filing Dt:
09/28/2004
Publication #:
Pub Dt:
04/06/2006
Title:
METHOD AND APPARATUS FOR USE OF HIDDEN DECOUPLING CAPACITORS IN AN INTEGRATED CIRCUIT DESIGN
66
Patent #:
Issue Dt:
12/19/2006
Application #:
10952213
Filing Dt:
09/28/2004
Publication #:
Pub Dt:
04/06/2006
Title:
FOUR POINT MEASUREMENT TECHNIQUE FOR PROGRAMMABLE IMPEDANCE DRIVERS RAPIDCHIP AND ASIC DEVICES
67
Patent #:
Issue Dt:
05/22/2007
Application #:
10953291
Filing Dt:
09/29/2004
Publication #:
Pub Dt:
03/30/2006
Title:
METHOD AND STRUCTURES FOR TESTING A SEMICONDUCTOR WAFER PRIOR TO PERFORMING A FLIP CHIP BUMPING PROCESS
68
Patent #:
Issue Dt:
06/13/2006
Application #:
10953292
Filing Dt:
09/29/2004
Publication #:
Pub Dt:
03/30/2006
Title:
TEST SEMICONDUCTOR DEVICE AND METHOD FOR DETERMINING JOULE HEATING EFFECTS IN SUCH A DEVICE
69
Patent #:
Issue Dt:
06/23/2009
Application #:
10953322
Filing Dt:
09/29/2004
Publication #:
Pub Dt:
03/30/2006
Title:
MULTI WAVELENGTH MASK FOR MULTI LAYER PRINTING ON A PROCESS SUBSTRATE
70
Patent #:
Issue Dt:
06/27/2006
Application #:
10953475
Filing Dt:
09/29/2004
Publication #:
Pub Dt:
05/12/2005
Title:
INDUCTOR FORMED IN AN INTEGRATED CIRCUIT
71
Patent #:
Issue Dt:
03/04/2008
Application #:
10953477
Filing Dt:
09/29/2004
Publication #:
Pub Dt:
03/30/2006
Title:
METHOD AND SYSTEM OF USING OFFSET GAGE FOR CMP POLISHING PAD ALIGNMENT AND ADJUSTMENT
72
Patent #:
Issue Dt:
02/13/2007
Application #:
10953478
Filing Dt:
09/29/2004
Publication #:
Pub Dt:
04/27/2006
Title:
STRUCTURE AND METHOD FOR ADJUSTING INTEGRATED CIRCUIT RESISTOR VALUE
73
Patent #:
Issue Dt:
03/27/2007
Application #:
10953480
Filing Dt:
09/29/2004
Publication #:
Pub Dt:
04/06/2006
Title:
SEMICONDUCTOR DEVICE MANUFACTURING
74
Patent #:
Issue Dt:
08/01/2006
Application #:
10953585
Filing Dt:
09/29/2004
Publication #:
Pub Dt:
03/30/2006
Title:
SEMICONDUCTOR TESTING
75
Patent #:
Issue Dt:
10/09/2007
Application #:
10953632
Filing Dt:
09/29/2004
Publication #:
Pub Dt:
03/30/2006
Title:
TRENCH ISOLATION STRUCTURE AND METHOD OF MANUFACTURE THEREFOR
76
Patent #:
Issue Dt:
06/27/2006
Application #:
10953750
Filing Dt:
09/29/2004
Publication #:
Pub Dt:
04/06/2006
Title:
THICK OXIDE REGION IN A SEMICONDUCTOR DEVICE
77
Patent #:
Issue Dt:
08/22/2006
Application #:
10953894
Filing Dt:
09/29/2004
Publication #:
Pub Dt:
03/30/2006
Title:
MULTIPLE DOPING LEVEL BIPOLAR JUNCTIONS TRANSISTORS AND METHOD FOR FORMING
78
Patent #:
Issue Dt:
10/03/2006
Application #:
10953897
Filing Dt:
09/29/2004
Publication #:
Pub Dt:
03/30/2006
Title:
BASE CURRENT COMPENSATION CIRCUIT FOR A BIPOLAR JUNCTION TRANSISTOR
79
Patent #:
Issue Dt:
09/12/2006
Application #:
10954907
Filing Dt:
09/30/2004
Publication #:
Pub Dt:
03/30/2006
Title:
TECHNIQUE FOR MEASUREMENT OF PROGRAMMABLE TERMINATION RESISTOR NETWORKS ON RAPIDCHIP AND ASIC DEVICES
80
Patent #:
Issue Dt:
12/05/2006
Application #:
10954940
Filing Dt:
09/30/2004
Publication #:
Pub Dt:
04/06/2006
Title:
CONSTRUCTION TO IMPROVE THERMAL PERFORMANCE AND REDUCE DIE BACKSIDE WARPAGE
81
Patent #:
Issue Dt:
06/27/2006
Application #:
10955168
Filing Dt:
09/29/2004
Publication #:
Pub Dt:
04/06/2006
Title:
METHOD OF PREDICTING QUIESCENT CURRENT VARIATION OF AN INTEGRATED CIRCUIT DIE FROM A PROCESS MONITOR DERATING FACTOR
82
Patent #:
Issue Dt:
03/18/2008
Application #:
10955238
Filing Dt:
09/30/2004
Publication #:
Pub Dt:
08/04/2005
Title:
STRUCTURE AND METHOD FOR IMPROVED HEAT CONDUCTION FOR SEMICONDUCTOR DEVICES
83
Patent #:
Issue Dt:
05/06/2008
Application #:
10955912
Filing Dt:
09/30/2004
Publication #:
Pub Dt:
03/30/2006
Title:
SYSTEM AND METHOD FOR FORMING SOLDER JOINTS
84
Patent #:
Issue Dt:
10/03/2006
Application #:
10955913
Filing Dt:
09/30/2004
Publication #:
Pub Dt:
03/30/2006
Title:
REINFORCED BOND PAD FOR A SEMICONDUCTOR DEVICE
85
Patent #:
Issue Dt:
10/16/2007
Application #:
10956860
Filing Dt:
09/30/2004
Publication #:
Pub Dt:
04/06/2006
Title:
NQL - NETLIST QUERY LANGUAGE
86
Patent #:
Issue Dt:
06/12/2007
Application #:
10956862
Filing Dt:
09/30/2004
Publication #:
Pub Dt:
04/06/2006
Title:
NETLIST DATABASE
87
Patent #:
Issue Dt:
04/20/2010
Application #:
10959186
Filing Dt:
10/07/2004
Publication #:
Pub Dt:
03/10/2005
Title:
CORDLESS TELEPHONE WITH MP3 PLAYER CAPABILITY
88
Patent #:
Issue Dt:
02/13/2007
Application #:
10959868
Filing Dt:
10/06/2004
Publication #:
Pub Dt:
02/24/2005
Title:
ANALOG CAPACITOR IN DUAL DAMASCENE PROCESS
89
Patent #:
Issue Dt:
10/17/2006
Application #:
10960680
Filing Dt:
10/07/2004
Publication #:
Pub Dt:
04/13/2006
Title:
MULTI-CHIP INTEGRATED CIRCUIT MODULE FOR HIGH-FREQUENCY OPERATION
90
Patent #:
Issue Dt:
02/20/2007
Application #:
10963156
Filing Dt:
10/12/2004
Publication #:
Pub Dt:
03/03/2005
Title:
CATHODE WITH IMPROVED WORK FUNCTION AND METHOD FOR MAKING THE SAME
91
Patent #:
NONE
Issue Dt:
Application #:
10964032
Filing Dt:
10/12/2004
Publication #:
Pub Dt:
03/24/2005
Title:
Via and metal line interface capable of reducing the incidence of electro-migration induced voids
92
Patent #:
Issue Dt:
02/20/2007
Application #:
10966074
Filing Dt:
10/14/2004
Publication #:
Pub Dt:
04/20/2006
Title:
METHOD FOR FABRICATING PLANAR SEMICONDUCTOR WAFERS
93
Patent #:
Issue Dt:
03/21/2006
Application #:
10967900
Filing Dt:
10/18/2004
Publication #:
Pub Dt:
03/10/2005
Title:
ELECTRO-MECHANICAL DEVICE HAVING A CHARGE DISSIPATION LAYER AND A METHOD OF MANUFACTURE THEREFOR
94
Patent #:
Issue Dt:
01/30/2007
Application #:
10969745
Filing Dt:
10/20/2004
Publication #:
Pub Dt:
04/20/2006
Title:
METHOD OF SCREENING ASIC DEFECTS USING INDEPENDENT COMPONENT ANALYSIS OF QUIESCENT CURRENT MEASUREMENTS
95
Patent #:
Issue Dt:
07/12/2011
Application #:
10971911
Filing Dt:
10/23/2004
Publication #:
Pub Dt:
05/11/2006
Title:
DEBUGGING SIMULATION OF A CIRCUIT CORE USING PATTERN RECORDER, PLAYER & CHECKER
96
Patent #:
Issue Dt:
08/21/2007
Application #:
10971961
Filing Dt:
10/22/2004
Publication #:
Pub Dt:
04/27/2006
Title:
LOCAL INTERCONNECT MANUFACTURING PROCESS
97
Patent #:
Issue Dt:
06/27/2006
Application #:
10972898
Filing Dt:
10/25/2004
Publication #:
Pub Dt:
05/26/2005
Title:
ADJUSTABLE TRANSMISSION PHASE SHIFT MASK
98
Patent #:
Issue Dt:
04/17/2007
Application #:
10973851
Filing Dt:
10/25/2004
Publication #:
Pub Dt:
04/27/2006
Title:
CONTACT RING DESIGN FOR REDUCING BUBBLE AND ELECTROLYTE EFFECTS DURING ELECTROCHEMICAL PLATING IN MANUFACTURING
99
Patent #:
NONE
Issue Dt:
Application #:
10974450
Filing Dt:
10/27/2004
Publication #:
Pub Dt:
04/27/2006
Title:
Generalized BIST for multiport memories
100
Patent #:
NONE
Issue Dt:
Application #:
10975570
Filing Dt:
10/27/2004
Publication #:
Pub Dt:
04/27/2006
Title:
Method of automating place and route corrections for an integrated circuit design from physical design validation
Assignors
1
Exec Dt:
01/24/2018
2
Exec Dt:
01/24/2018
3
Exec Dt:
01/24/2018
Assignee
1
225 W. WASHINGTON ST., 9TH FLOOR
CHICAGO, ILLINOIS 60606
Correspondence name and address
JAVIER J. RAMOS
1850 K STREET, NW, SUITE 1100
MILBANK, TWEED, HADLEY & MCCLOY, LLP
WASHINGTON, DC 20006

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