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Reel/Frame:045216/0020   Pages: 334
Recorded: 02/01/2018
Attorney Dkt #:43172.01200
Conveyance: SECURITY INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 3463
Page 30 of 35
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35
1
Patent #:
7376918
Issue Dt:
05/20/2008
Application #:
11079017
Filing Dt:
03/11/2005
Publication #:
US20060206843
Pub Dt:
09/14/2006
Title:
PROBABILISTIC NOISE ANALYSIS
2
Patent #:
7491579
Issue Dt:
02/17/2009
Application #:
11079028
Filing Dt:
03/14/2005
Publication #:
US20060236270
Pub Dt:
10/19/2006
Title:
COMPOSABLE SYSTEM-IN-PACKAGE INTEGRATED CIRCUITS AND PROCESS OF COMPOSING THE SAME
3
Patent #:
7620924
Issue Dt:
11/17/2009
Application #:
11079439
Filing Dt:
03/14/2005
Publication #:
US20060236292
Pub Dt:
10/19/2006
Title:
BASE PLATFORMS WITH COMBINED ASIC AND FPGA FEATURES AND PROCESS OF USING THE SAME
4
Patent #:
7263678
Issue Dt:
08/28/2007
Application #:
11079998
Filing Dt:
03/15/2005
Publication #:
US20060218515
Pub Dt:
09/28/2006
Title:
METHOD OF IDENTIFYING FLOORPLAN PROBLEMS IN AN INTEGRATED CIRCUIT LAYOUT
5
Patent #:
7224076
Issue Dt:
05/29/2007
Application #:
11080859
Filing Dt:
03/15/2005
Publication #:
US20050156312
Pub Dt:
07/21/2005
Title:
ELECTRONIC COMPONENT PACKAGE
6
Patent #:
7751541
Issue Dt:
07/06/2010
Application #:
11084344
Filing Dt:
03/18/2005
Publication #:
US20060209786
Pub Dt:
09/21/2006
Title:
COMMUNICATION SETUP METHODS FOR GSM, UMTS AND ISDN PROTOCOLS TO ENABLE PERSONALIZED TELEPHONY AND COMMUNICATION DEVICE INCORPORATING THE SAME
7
Patent #:
7312532
Issue Dt:
12/25/2007
Application #:
11090107
Filing Dt:
03/24/2005
Publication #:
US20050186782
Pub Dt:
08/25/2005
Title:
DUAL DAMASCENE INTERCONNECT STRUCTURE WITH IMPROVED ELECTRO MIGRATION LIFETIMES
8
Patent #:
7523426
Issue Dt:
04/21/2009
Application #:
11092406
Filing Dt:
03/29/2005
Publication #:
US20060230373
Pub Dt:
10/12/2006
Title:
INTELLIGENT TIMING ANALYSIS AND CONSTRAINT GENERATION GUI
9
Patent #:
7329605
Issue Dt:
02/12/2008
Application #:
11094975
Filing Dt:
03/31/2005
Publication #:
US20060226552
Pub Dt:
10/12/2006
Title:
SEMICONDUCTOR STRUCTURE FORMED USING A SACRIFICIAL STRUCTURE
10
Patent #:
7408246
Issue Dt:
08/05/2008
Application #:
11095929
Filing Dt:
03/31/2005
Publication #:
US20060220194
Pub Dt:
10/05/2006
Title:
CONTROLLING WARPING IN INTEGRATED CIRCUIT DEVICES
11
Patent #:
7005880
Issue Dt:
02/28/2006
Application #:
11097796
Filing Dt:
04/02/2005
Title:
METHOD OF TESTING ELECTRONIC WAFERS HAVING LEAD-FREE SOLDER CONTACTS
12
Patent #:
7319272
Issue Dt:
01/15/2008
Application #:
11097895
Filing Dt:
04/01/2005
Publication #:
US20060223341
Pub Dt:
10/05/2006
Title:
BALL ASSIGNMENT SYSTEM
13
Patent #:
7206983
Issue Dt:
04/17/2007
Application #:
11097936
Filing Dt:
03/31/2005
Publication #:
US20060236176
Pub Dt:
10/19/2006
Title:
SEGMENTED ADDRESSABLE SCAN ARCHITECTURE AND METHOD FOR IMPLEMENTING SCAN-BASED TESTING OF INTEGRATED CIRCUITS
14
Patent #:
7129516
Issue Dt:
10/31/2006
Application #:
11098290
Filing Dt:
04/04/2005
Publication #:
US20050167654
Pub Dt:
08/04/2005
Title:
ION RECOIL IMPLANTATION AND ENHANCED CARRIER MOBILITY IN CMOS DEVICE
15
Patent #:
7313775
Issue Dt:
12/25/2007
Application #:
11099772
Filing Dt:
04/06/2005
Publication #:
US20060230375
Pub Dt:
10/12/2006
Title:
INTEGRATED CIRCUIT WITH RELOCATABLE PROCESSOR HARDMAC
16
Patent #:
7398489
Issue Dt:
07/08/2008
Application #:
11100986
Filing Dt:
04/06/2005
Publication #:
US20060226530
Pub Dt:
10/12/2006
Title:
ADVANCED STANDARD CELL POWER CONNECTION
17
Patent #:
7370257
Issue Dt:
05/06/2008
Application #:
11102156
Filing Dt:
04/08/2005
Publication #:
US20060242522
Pub Dt:
10/26/2006
Title:
TEST VEHICLE DATA ANALYSIS
18
Patent #:
7098515
Issue Dt:
08/29/2006
Application #:
11104050
Filing Dt:
04/11/2005
Title:
SEMICONDUCTOR CHIP WITH BORDERLESS CONTACT THAT AVOIDS WELL LEAKAGE
19
Patent #:
7829455
Issue Dt:
11/09/2010
Application #:
11104763
Filing Dt:
04/12/2005
Publication #:
US20050179138
Pub Dt:
08/18/2005
Title:
METHOD FOR CREATING BARRIERS FOR COPPER DIFFUSION
20
Patent #:
NONE
Issue Dt:
Application #:
11106307
Filing Dt:
04/14/2005
Publication #:
US20050176216
Pub Dt:
08/11/2005
Title:
Ultra low dielectric constant thin film
21
Patent #:
7139991
Issue Dt:
11/21/2006
Application #:
11107585
Filing Dt:
04/14/2005
Publication #:
US20050204235
Pub Dt:
09/15/2005
Title:
AUTOMATIC METHOD AND SYSTEM FOR INSTANTIATING BUILT-IN-TEST (BIST) MODULES IN ASIC MEMORY DESIGNS
22
Patent #:
7373629
Issue Dt:
05/13/2008
Application #:
11113615
Filing Dt:
04/25/2005
Publication #:
US20060239052
Pub Dt:
10/26/2006
Title:
DISTRIBUTED RELOCATABLE VOLTAGE REGULATOR
23
Patent #:
7543261
Issue Dt:
06/02/2009
Application #:
11115798
Filing Dt:
04/27/2005
Publication #:
US20060248491
Pub Dt:
11/02/2006
Title:
I /O PLANNING WITH LOCK AND INSERTION FEATURES
24
Patent #:
7240264
Issue Dt:
07/03/2007
Application #:
11116616
Filing Dt:
04/28/2005
Publication #:
US20060248418
Pub Dt:
11/02/2006
Title:
SCAN TEST EXPANSION MODULE
25
Patent #:
7297606
Issue Dt:
11/20/2007
Application #:
11116903
Filing Dt:
04/28/2005
Publication #:
US20050191815
Pub Dt:
09/01/2005
Title:
METAL-OXIDE-SEMICONDUCTOR DEVICE INCLUDING A BURIED LIGHTLY-DOPED DRAIN REGION
26
Patent #:
7292063
Issue Dt:
11/06/2007
Application #:
11120067
Filing Dt:
05/02/2005
Publication #:
US20060279326
Pub Dt:
12/14/2006
Title:
METHOD OF INTERCONNECT FOR MULTI-SLOT METAL-MASK PROGRAMMABLE RELOCATABLE FUNCTION PLACED IN AN I/O REGION
27
Patent #:
NONE
Issue Dt:
Application #:
11122375
Filing Dt:
05/05/2005
Publication #:
US20050215005
Pub Dt:
09/29/2005
Title:
Capacitor with stoichiometrically adjusted dielectric and method of fabricating same
28
Patent #:
7399648
Issue Dt:
07/15/2008
Application #:
11124307
Filing Dt:
05/06/2005
Publication #:
US20060253820
Pub Dt:
11/09/2006
Title:
METHODS AND APPARATUS FOR DETERMINING LOCATION-BASED ON-CHIP VARIATION FACTOR
29
Patent #:
7305646
Issue Dt:
12/04/2007
Application #:
11125307
Filing Dt:
05/09/2005
Publication #:
US20060253825
Pub Dt:
11/09/2006
Title:
RELOCATABLE MIXED-SIGNAL FUNCTIONS
30
Patent #:
7272802
Issue Dt:
09/18/2007
Application #:
11126880
Filing Dt:
05/11/2005
Publication #:
US20060259892
Pub Dt:
11/16/2006
Title:
R-CELLS CONTAINING CDM CLAMPS
31
Patent #:
7373622
Issue Dt:
05/13/2008
Application #:
11129547
Filing Dt:
05/13/2005
Publication #:
US20060259841
Pub Dt:
11/16/2006
Title:
RELOCATABLE BUILT-IN SELF TEST (BIST) ELEMENTS FOR RELOCATABLE MIXED-SIGNAL ELEMENTS
32
Patent #:
7427563
Issue Dt:
09/23/2008
Application #:
11131003
Filing Dt:
05/16/2005
Publication #:
US20050208758
Pub Dt:
09/22/2005
Title:
DIELECTRIC BARRIER FILMS FOR USE AS COPPER BARRIER LAYERS IN SEMICONDUCTOR TRENCH AND VIA STRUCTURES
33
Patent #:
7323768
Issue Dt:
01/29/2008
Application #:
11131705
Filing Dt:
05/18/2005
Publication #:
US20050224963
Pub Dt:
10/13/2005
Title:
VOLTAGE CONTRAST MONITOR FOR INTEGRATED CIRCUIT DEFECTS
34
Patent #:
7053639
Issue Dt:
05/30/2006
Application #:
11131885
Filing Dt:
05/18/2005
Title:
PROBING FIXTURE FOR SEMICONDUCTOR WAFER
35
Patent #:
7328386
Issue Dt:
02/05/2008
Application #:
11131990
Filing Dt:
05/18/2005
Publication #:
US20060282728
Pub Dt:
12/14/2006
Title:
METHODS FOR USING CHECKSUMS IN X-TOLERANT TEST RESPONSE COMPACTION IN SCAN-BASED TESTING OF INTEGRATED CIRCUITS
36
Patent #:
7354790
Issue Dt:
04/08/2008
Application #:
11132751
Filing Dt:
05/18/2005
Publication #:
US20060160269
Pub Dt:
07/20/2006
Title:
METHOD AND APPARATUS FOR AVOIDING DICING CHIP-OUTS IN INTEGRATED CIRCUIT DIE
37
Patent #:
7478354
Issue Dt:
01/13/2009
Application #:
11133815
Filing Dt:
05/20/2005
Publication #:
US20060263933
Pub Dt:
11/23/2006
Title:
USE OF CONFIGURABLE MIXED-SIGNAL BUILDING BLOCK FUNCTIONS TO ACCOMPLISH CUSTOM FUNCTIONS
38
Patent #:
7360178
Issue Dt:
04/15/2008
Application #:
11136180
Filing Dt:
05/24/2005
Publication #:
US20060271901
Pub Dt:
11/30/2006
Title:
MIXED-SIGNAL FUNCTIONS USING R-CELLS
39
Patent #:
7132840
Issue Dt:
11/07/2006
Application #:
11138152
Filing Dt:
05/26/2005
Publication #:
US20060022689
Pub Dt:
02/02/2006
Title:
METHOD OF ELECTRICAL TESTING
40
Patent #:
7106073
Issue Dt:
09/12/2006
Application #:
11140142
Filing Dt:
05/27/2005
Title:
METHOD AND SYSTEM FOR AREA EFFICIENT CHARGE-BASED CAPACITANCE MEASUREMENT
41
Patent #:
7340700
Issue Dt:
03/04/2008
Application #:
11140392
Filing Dt:
05/27/2005
Publication #:
US20060271904
Pub Dt:
11/30/2006
Title:
METHOD FOR ABSTRACTION OF MANUFACTURING TEST ACCESS AND CONTROL PORTS TO SUPPORT AUTOMATED RTL MANUFACTURING TEST INSERTION FLOW FOR REUSABLE MODULES
42
Patent #:
7528616
Issue Dt:
05/05/2009
Application #:
11140455
Filing Dt:
05/27/2005
Publication #:
US20060267615
Pub Dt:
11/30/2006
Title:
ZERO ATE INSERTION FORCE INTERPOSER DAUGHTER CARD
43
Patent #:
7380229
Issue Dt:
05/27/2008
Application #:
11151043
Filing Dt:
06/13/2005
Publication #:
US20060282808
Pub Dt:
12/14/2006
Title:
AUTOMATIC GENERATION OF CORRECT MINIMAL CLOCKING CONSTRAINTS FOR A SEMICONDUCTOR PRODUCT
44
Patent #:
7141486
Issue Dt:
11/28/2006
Application #:
11153893
Filing Dt:
06/15/2005
Publication #:
US20060286739
Pub Dt:
12/21/2006
Title:
SHALLOW TRENCH ISOLATION STRUCTURES COMPRISING A GRADED DOPED SACRIFICIAL SILICON DIOXIDE MATERIAL AND A METHOD FOR FORMING SHALLOW TRENCH ISOLATION STRUCTURES
45
Patent #:
7430725
Issue Dt:
09/30/2008
Application #:
11156319
Filing Dt:
06/18/2005
Publication #:
US20050240892
Pub Dt:
10/27/2005
Title:
SUITE OF TOOLS TO DESIGN INTEGRATED CIRCUITS
46
Patent #:
8664759
Issue Dt:
03/04/2014
Application #:
11158370
Filing Dt:
06/22/2005
Publication #:
US20060289988
Pub Dt:
12/28/2006
Title:
INTEGRATED CIRCUIT WITH HEAT CONDUCTING STRUCTURES FOR LOCALIZED THERMAL CONTROL
47
Patent #:
7541674
Issue Dt:
06/02/2009
Application #:
11158435
Filing Dt:
06/22/2005
Publication #:
US20050242431
Pub Dt:
11/03/2005
Title:
Integrated circuit die for wire bonding and flip-chip mounting
48
Patent #:
NONE
Issue Dt:
Application #:
11158450
Filing Dt:
06/21/2005
Publication #:
US20060189257
Pub Dt:
08/24/2006
Title:
Systems and methods for wafer polishing
49
Patent #:
7178121
Issue Dt:
02/13/2007
Application #:
11165778
Filing Dt:
06/24/2005
Publication #:
US20060294482
Pub Dt:
12/28/2006
Title:
METHOD AND COMPUTER PROGRAM FOR ESTIMATING SPEED-UP AND SLOW-DOWN NET DELAYS FOR AN INTEGRATED CIRCUIT DESIGN
50
Patent #:
7811944
Issue Dt:
10/12/2010
Application #:
11167772
Filing Dt:
06/27/2005
Publication #:
US20050282372
Pub Dt:
12/22/2005
Title:
SEMICONDUCTOR DEVICE AND A METHOD OF MANUFACTURE THEREFOR
51
Patent #:
7502408
Issue Dt:
03/10/2009
Application #:
11168590
Filing Dt:
06/28/2005
Publication #:
US20060239366
Pub Dt:
10/26/2006
Title:
RF TRANSCEIVER HAVING ADAPTIVE MODULATION
52
Patent #:
7738583
Issue Dt:
06/15/2010
Application #:
11168793
Filing Dt:
06/28/2005
Publication #:
US20060239372
Pub Dt:
10/26/2006
Title:
REDUCED FEEDBACK FOR BEAMFORMING IN A WIRELESS COMMUNICATION
53
Patent #:
7738584
Issue Dt:
06/15/2010
Application #:
11168838
Filing Dt:
06/28/2005
Publication #:
US20060239373
Pub Dt:
10/26/2006
Title:
BEAMFORMING IN A WIRELESS COMMUNICATION WITH A PARTIAL ESTIMATION TO REDUCE OVERHEAD
54
Patent #:
7451426
Issue Dt:
11/11/2008
Application #:
11176514
Filing Dt:
07/07/2005
Publication #:
US20070011642
Pub Dt:
01/11/2007
Title:
APPLICATION SPECIFIC CONFIGURABLE LOGIC IP
55
Patent #:
7827509
Issue Dt:
11/02/2010
Application #:
11182615
Filing Dt:
07/15/2005
Publication #:
US20070013695
Pub Dt:
01/18/2007
Title:
DIGITALLY OBTAINING CONTOURS OF FABRICATED POLYGONS
56
Patent #:
7401318
Issue Dt:
07/15/2008
Application #:
11184401
Filing Dt:
07/19/2005
Publication #:
US20050268272
Pub Dt:
12/01/2005
Title:
METHOD AND APPARATUS FOR OPTIMIZING FRAGMENTATION OF BOUNDARIES FOR OPTICAL PROXIMITY CORRECTION (OPC) PURPOSES
57
Patent #:
7216279
Issue Dt:
05/08/2007
Application #:
11184621
Filing Dt:
07/19/2005
Publication #:
US20070018669
Pub Dt:
01/25/2007
Title:
TESTING WITH HIGH SPEED PULSE GENERATOR
58
Patent #:
7444275
Issue Dt:
10/28/2008
Application #:
11187455
Filing Dt:
07/22/2005
Publication #:
US20070022392
Pub Dt:
01/25/2007
Title:
MULTI-VARIABLE POLYNOMIAL MODELING TECHNIQUES FOR USE IN INTEGRATED CIRCUIT DESIGN
59
Patent #:
7586887
Issue Dt:
09/08/2009
Application #:
11188767
Filing Dt:
07/26/2005
Publication #:
US20060092892
Pub Dt:
05/04/2006
Title:
METHOD AND APPARATUS FOR WIDE BANDWIDTH MIXED-MODE WIRELESS COMMUNICATIONS
60
Patent #:
7646703
Issue Dt:
01/12/2010
Application #:
11188771
Filing Dt:
07/26/2005
Publication #:
US20060120447
Pub Dt:
06/08/2006
Title:
BACKWARD-COMPATIBLE LONG TRAINING SEQUENCES FOR WIRELESS COMMUNICATION NETWORKS
61
Patent #:
7763908
Issue Dt:
07/27/2010
Application #:
11189217
Filing Dt:
07/25/2005
Publication #:
US20070045656
Pub Dt:
03/01/2007
Title:
DESIGN OF SILICON-CONTROLLED RECTIFIER BY CONSIDERING ELECTROSTATIC DISCHARGE ROBUSTNESS IN HUMAN-BODY MODEL AND CHARGED-DEVICE MODEL DEVICES
62
Patent #:
NONE
Issue Dt:
Application #:
11189625
Filing Dt:
07/25/2005
Publication #:
US20050258475
Pub Dt:
11/24/2005
Title:
Memory device having an electron trapping layer in a high-K dielectric gate stack
63
Patent #:
7260801
Issue Dt:
08/21/2007
Application #:
11192526
Filing Dt:
07/29/2005
Publication #:
US20070028199
Pub Dt:
02/01/2007
Title:
DELAY COMPUTATION SPEED UP AND INCREMENTALITY
64
Patent #:
7464345
Issue Dt:
12/09/2008
Application #:
11194299
Filing Dt:
08/01/2005
Publication #:
US20070028196
Pub Dt:
02/01/2007
Title:
RESOURCE ESTIMATION FOR DESIGN PLANNING
65
Patent #:
7480874
Issue Dt:
01/20/2009
Application #:
11198930
Filing Dt:
08/05/2005
Publication #:
US20070033555
Pub Dt:
02/08/2007
Title:
RELIABILITY ANALYSIS OF INTEGRATED CIRCUITS
66
Patent #:
7700491
Issue Dt:
04/20/2010
Application #:
11201039
Filing Dt:
08/10/2005
Publication #:
US20070037395
Pub Dt:
02/15/2007
Title:
STRINGER ELIMINATION IN A BICMOS PROCESS
67
Patent #:
7299446
Issue Dt:
11/20/2007
Application #:
11204669
Filing Dt:
08/16/2005
Publication #:
US20070044058
Pub Dt:
02/22/2007
Title:
ENABLING EFFICIENT DESIGN REUSE IN PLATFORM ASICS
68
Patent #:
7469398
Issue Dt:
12/23/2008
Application #:
11204670
Filing Dt:
08/16/2005
Publication #:
US20070044059
Pub Dt:
02/22/2007
Title:
IP PLACEMENT VALIDATION
69
Patent #:
7512918
Issue Dt:
03/31/2009
Application #:
11205365
Filing Dt:
08/17/2005
Publication #:
US20070044053
Pub Dt:
02/22/2007
Title:
MULTIMODE DELAY ANALYSIS FOR SIMPLIFYING INTEGRATED CIRCUIT DESIGN TIMING MODELS
70
Patent #:
7172496
Issue Dt:
02/06/2007
Application #:
11205382
Filing Dt:
08/17/2005
Publication #:
US20070042686
Pub Dt:
02/22/2007
Title:
METHOD AND APPARATUS FOR CLEANING SLURRY DEPOSITIONS FROM A WATER CARRIER
71
Patent #:
7242961
Issue Dt:
07/10/2007
Application #:
11209003
Filing Dt:
08/22/2005
Publication #:
US20070015526
Pub Dt:
01/18/2007
Title:
CHANNEL RECIPROCITY MATRIX DETERMINATION IN A WIRELESS MIMO COMMUNICATION SYSTEM
72
Patent #:
NONE
Issue Dt:
Application #:
11210986
Filing Dt:
08/24/2005
Publication #:
US20050279284
Pub Dt:
12/22/2005
Title:
Temperature control system
73
Patent #:
7325215
Issue Dt:
01/29/2008
Application #:
11216918
Filing Dt:
08/31/2005
Publication #:
US20070050745
Pub Dt:
03/01/2007
Title:
TIMING VIOLATION DEBUGGING INSIDE PLACE AND ROUTE TOOL
74
Patent #:
7421250
Issue Dt:
09/02/2008
Application #:
11223170
Filing Dt:
09/09/2005
Publication #:
US20060035595
Pub Dt:
02/16/2006
Title:
RADIO FREQUENCY INTEGRATED CIRCUIT
75
Patent #:
7358594
Issue Dt:
04/15/2008
Application #:
11225310
Filing Dt:
09/12/2005
Title:
METHOD OF FORMING A LOW K POLYMER E-BEAM PRINTABLE MECHANICAL SUPPORT
76
Patent #:
NONE
Issue Dt:
Application #:
11230188
Filing Dt:
09/19/2005
Publication #:
US20070066074
Pub Dt:
03/22/2007
Title:
Shallow trench isolation structures and a method for forming shallow trench isolation structures
77
Patent #:
7269197
Issue Dt:
09/11/2007
Application #:
11232074
Filing Dt:
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Pub Dt:
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Title:
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Pub Dt:
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Title:
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Pub Dt:
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Title:
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Title:
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Filing Dt:
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Title:
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Pub Dt:
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Title:
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Title:
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Title:
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Title:
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Title:
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Title:
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Title:
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Title:
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Assignors
1
HILCO PATENT ACQUISITION 56, LLC
Exec Dt:
01/24/2018
2
BELL SEMICONDUCTOR, LLC
Exec Dt:
01/24/2018
3
BELL NORTHERN RESEARCH, LLC
Exec Dt:
01/24/2018
Assignee
1
CORTLAND CAPITAL MARKET SERVICES LLC, AS COLLATERAL AGENT
225 W. WASHINGTON ST., 9TH FLOOR
CHICAGO, ILLINOIS 60606
Correspondence name and address
JAVIER J. RAMOS
1850 K STREET, NW, SUITE 1100
MILBANK, TWEED, HADLEY & MCCLOY, LLP
WASHINGTON, DC 20006

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