Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
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| Reel/Frame: | 045965/0455 | |
| Pages: | 5 |
| | Recorded: | 06/01/2018 | | |
| Attorney Dkt #: | 1026-RT-15 |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
6
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Patent #:
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Issue Dt:
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06/17/2003
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Application #:
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09542420
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Filing Dt:
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04/04/2000
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Title:
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DYNAMIC REMAPPING OF ADDRESS REGISTERS FOR ADDRESS TRANSLATION BETWEEN MULTIPLE BUSSES
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Patent #:
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Issue Dt:
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11/09/2004
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Application #:
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10004718
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Filing Dt:
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12/03/2001
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Publication #:
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Pub Dt:
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06/05/2003
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Title:
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POWER REDUCTION IN COMPUTING DEVICES USING MICRO-SLEEP INTERVALS
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Patent #:
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Issue Dt:
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10/30/2007
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Application #:
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10818975
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Filing Dt:
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04/06/2004
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Publication #:
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Pub Dt:
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10/27/2005
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Title:
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CORE-LEVEL PROCESSOR LOCKSTEPPING
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Patent #:
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Issue Dt:
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11/13/2007
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Application #:
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10818993
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Filing Dt:
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04/06/2004
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Publication #:
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Pub Dt:
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10/27/2005
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Title:
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LOCKSTEP ERROR SIGNALING
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Patent #:
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Issue Dt:
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06/26/2007
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Application #:
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10818994
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Filing Dt:
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04/06/2004
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Publication #:
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Pub Dt:
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10/27/2005
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Title:
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OFF-CHIP LOCKSTEP CHECKING
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Patent #:
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Issue Dt:
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07/19/2016
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Application #:
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12918388
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Filing Dt:
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08/19/2010
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Publication #:
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Pub Dt:
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03/31/2011
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Title:
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SYSTEMS AND METHODS OF COMPONENT VOLTAGE ADJUSTMENT
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Assignee
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| 2091, GYEONGCHUNG-DAERO, BUBAL-EUB, ICHEON-SI |
| GYEONGGI-DO, KOREA, REPUBLIC OF |
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Correspondence name and address
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IP & T GROUP LLP
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8230 LEESBURG PIKE
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SUITE 650
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VIENNA, VA 22182
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