Total properties:
66
|
|
Patent #:
|
|
Issue Dt:
|
07/25/2006
|
Application #:
|
10773549
|
Filing Dt:
|
02/06/2004
|
Publication #:
|
|
Pub Dt:
|
08/11/2005
| | | | |
Title:
|
MULTI-RESISTIVE STATE ELEMENT WITH REACTIVE METAL
|
|
|
Patent #:
|
|
Issue Dt:
|
12/06/2005
|
Application #:
|
10868578
|
Filing Dt:
|
06/15/2004
|
Publication #:
|
|
Pub Dt:
|
11/03/2005
| | | | |
Title:
|
MEMORY ELEMENT HAVING ISLANDS
|
|
|
Patent #:
|
|
Issue Dt:
|
05/26/2009
|
Application #:
|
10934951
|
Filing Dt:
|
09/03/2004
|
Publication #:
|
|
Pub Dt:
|
03/09/2006
| | | | |
Title:
|
MEMORY USING VARIABLE TUNNEL BARRIER WIDTHS
|
|
|
Patent #:
|
|
Issue Dt:
|
01/19/2010
|
Application #:
|
11176642
|
Filing Dt:
|
07/08/2005
|
Publication #:
|
|
Pub Dt:
|
01/12/2006
| | | | |
Title:
|
SEMICONDUCTOR CHIP HAVING POLLISHED AND GROUND BOTTOM SURFACE PORTIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/06/2009
|
Application #:
|
11299731
|
Filing Dt:
|
12/13/2005
|
Publication #:
|
|
Pub Dt:
|
06/22/2006
| | | | |
Title:
|
SEMICONDUCTOR DEVICE HAVING A SILICON LAYER IN A GATE ELECTRODE
|
|
|
Patent #:
|
|
Issue Dt:
|
04/08/2008
|
Application #:
|
11324244
|
Filing Dt:
|
01/04/2006
|
Publication #:
|
|
Pub Dt:
|
11/02/2006
| | | | |
Title:
|
SEMICONDUCTOR DEVICE INCLUDING A STACKED CAPACITOR
|
|
|
Patent #:
|
|
Issue Dt:
|
11/18/2008
|
Application #:
|
11366433
|
Filing Dt:
|
03/03/2006
|
Publication #:
|
|
Pub Dt:
|
09/07/2006
| | | | |
Title:
|
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE HAVING PLANARIZED INTERLAYER INSULATING FILM
|
|
|
Patent #:
|
|
Issue Dt:
|
12/15/2009
|
Application #:
|
11372351
|
Filing Dt:
|
03/10/2006
|
Publication #:
|
|
Pub Dt:
|
11/09/2006
| | | | |
Title:
|
SEMICONDUCTOR CHIP WITH A POROUS SINGLE CRYSTAL LAYER AND MANUFACTURING METHOD OF THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
04/06/2010
|
Application #:
|
11414290
|
Filing Dt:
|
05/01/2006
|
Publication #:
|
|
Pub Dt:
|
11/02/2006
| | | | |
Title:
|
MASK DATA CREATION METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
06/03/2008
|
Application #:
|
11434877
|
Filing Dt:
|
05/17/2006
|
Publication #:
|
|
Pub Dt:
|
12/07/2006
| | | | |
Title:
|
SEMICONDUCTOR DEVICE WITH CAPACITOR SUPPRESSING LEAK CURRENT
|
|
|
Patent #:
|
|
Issue Dt:
|
07/01/2008
|
Application #:
|
11473005
|
Filing Dt:
|
06/22/2006
|
Publication #:
|
|
Pub Dt:
|
11/02/2006
| | | | |
Title:
|
MULTI-RESISTIVE STATE ELEMENT WITH REACTIVE METAL
|
|
|
Patent #:
|
|
Issue Dt:
|
06/15/2010
|
Application #:
|
11514934
|
Filing Dt:
|
09/05/2006
|
Publication #:
|
|
Pub Dt:
|
03/08/2007
| | | | |
Title:
|
METHOD FOR CONTROLLING THICKNESS DISTRIBUTION OF A FILM
|
|
|
Patent #:
|
|
Issue Dt:
|
03/23/2010
|
Application #:
|
11518427
|
Filing Dt:
|
09/11/2006
|
Publication #:
|
|
Pub Dt:
|
03/22/2007
| | | | |
Title:
|
SEMICONDUCTOR APPARATUS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/03/2010
|
Application #:
|
11546986
|
Filing Dt:
|
10/13/2006
|
Publication #:
|
|
Pub Dt:
|
05/03/2007
| | | | |
Title:
|
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
11/17/2009
|
Application #:
|
11598644
|
Filing Dt:
|
11/14/2006
|
Publication #:
|
|
Pub Dt:
|
05/15/2008
| | | | |
Title:
|
MANUFACTURING METHOD FOR INCREASING PRODUCT YIELD OF MEMORY DEVICES SUFFERING FROM SOURCE/DRAIN JUNCTION LEAKAGE
|
|
|
Patent #:
|
|
Issue Dt:
|
06/22/2010
|
Application #:
|
11809478
|
Filing Dt:
|
06/01/2007
|
Publication #:
|
|
Pub Dt:
|
12/06/2007
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
09/22/2009
|
Application #:
|
11833894
|
Filing Dt:
|
08/03/2007
|
Publication #:
|
|
Pub Dt:
|
02/07/2008
| | | | |
Title:
|
METHOD FOR FORMING A NITROGEN-CONTAINING GATE INSULATING FILM
|
|
|
Patent #:
|
|
Issue Dt:
|
06/15/2010
|
Application #:
|
11859043
|
Filing Dt:
|
09/21/2007
|
Publication #:
|
|
Pub Dt:
|
09/25/2008
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
01/04/2011
|
Application #:
|
11860579
|
Filing Dt:
|
09/25/2007
|
Publication #:
|
|
Pub Dt:
|
04/03/2008
| | | | |
Title:
|
MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
06/22/2010
|
Application #:
|
12013509
|
Filing Dt:
|
01/14/2008
|
Publication #:
|
|
Pub Dt:
|
07/24/2008
| | | | |
Title:
|
METHOD FOR FABRICATING A CYLINDRICAL CAPACITOR INCLUDING IMPLANTING IMPURITIES INTO THE UPPER SECTIONS OF THE LOWER ELECTRODE TO PREVENT THE FORMATION OF HEMISPHERICAL GRAIN SILICON ON THE UPPER SECTIONS.
|
|
|
Patent #:
|
|
Issue Dt:
|
09/22/2009
|
Application #:
|
12037118
|
Filing Dt:
|
02/26/2008
|
Publication #:
|
|
Pub Dt:
|
12/04/2008
| | | | |
Title:
|
METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
05/04/2010
|
Application #:
|
12051156
|
Filing Dt:
|
03/19/2008
|
Publication #:
|
|
Pub Dt:
|
10/02/2008
| | | | |
Title:
|
POLISHING APPARATUS AND METHOD OF RECONDITIONING POLISHING PAD
|
|
|
Patent #:
|
|
Issue Dt:
|
06/16/2015
|
Application #:
|
12069105
|
Filing Dt:
|
02/07/2008
|
Publication #:
|
|
Pub Dt:
|
08/13/2009
| | | | |
Title:
|
Integrated circuits and methods to control access to multiple layers of memory
|
|
|
Patent #:
|
|
Issue Dt:
|
06/08/2010
|
Application #:
|
12213624
|
Filing Dt:
|
06/23/2008
|
Publication #:
|
|
Pub Dt:
|
10/30/2008
| | | | |
Title:
|
SEMICONDUCTOR DEVICE MANUFACTURING METHOD AND SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
11/22/2011
|
Application #:
|
12215958
|
Filing Dt:
|
06/30/2008
|
Publication #:
|
|
Pub Dt:
|
11/27/2008
| | | | |
Title:
|
METHOD FOR FABRICATING MULTI-RESISTIVE STATE MEMORY DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
01/25/2011
|
Application #:
|
12453737
|
Filing Dt:
|
05/20/2009
|
Publication #:
|
|
Pub Dt:
|
09/17/2009
| | | | |
Title:
|
SEMICONDUCTOR DEVICE HAVING SILICON LAYER IN A GATE ELECTRODE
|
|
|
Patent #:
|
|
Issue Dt:
|
02/15/2011
|
Application #:
|
12653486
|
Filing Dt:
|
12/14/2009
|
Publication #:
|
|
Pub Dt:
|
06/24/2010
| | | | |
Title:
|
MULTI-RESISTIVE STATE MEMORY DEVICE WITH CONDUCTIVE OXIDE ELECTRODES
|
|
|
Patent #:
|
|
Issue Dt:
|
12/25/2012
|
Application #:
|
12653850
|
Filing Dt:
|
12/18/2009
|
Publication #:
|
|
Pub Dt:
|
08/05/2010
| | | | |
Title:
|
FUSE ELEMENTS BASED ON TWO-TERMINAL RE-WRITEABLE NON-VOLATILE MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
03/20/2012
|
Application #:
|
12654647
|
Filing Dt:
|
12/28/2009
|
Publication #:
|
|
Pub Dt:
|
05/27/2010
| | | | |
Title:
|
SEMICONDUCTOR APPARATUS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/07/2012
|
Application #:
|
12932642
|
Filing Dt:
|
03/01/2011
|
Publication #:
|
|
Pub Dt:
|
06/30/2011
| | | | |
Title:
|
CONTINUOUS PLANE OF THIN-FILM MATERIALS FOR A TWO-TERMINAL CROSS-POINT MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
03/12/2013
|
Application #:
|
13206460
|
Filing Dt:
|
08/09/2011
|
Publication #:
|
|
Pub Dt:
|
12/01/2011
| | | | |
Title:
|
THRESHOLD DEVICE FOR A MEMORY ARRAY
|
|
|
Patent #:
|
|
Issue Dt:
|
03/18/2014
|
Application #:
|
13272985
|
Filing Dt:
|
10/13/2011
|
Publication #:
|
|
Pub Dt:
|
02/09/2012
| | | | |
Title:
|
MEMORY ELEMENT WITH A REACTIVE METAL LAYER
|
|
|
Patent #:
|
|
Issue Dt:
|
09/25/2012
|
Application #:
|
13281335
|
Filing Dt:
|
10/25/2011
|
Publication #:
|
|
Pub Dt:
|
02/16/2012
| | | | |
Title:
|
NON VOLATILE MEMORY DEVICE ION BARRIER
|
|
|
Patent #:
|
|
Issue Dt:
|
12/17/2013
|
Application #:
|
13301490
|
Filing Dt:
|
11/21/2011
|
Publication #:
|
|
Pub Dt:
|
03/15/2012
| | | | |
Title:
|
Method For Fabricating Multi Resistive State Memory Devices
|
|
|
Patent #:
|
|
Issue Dt:
|
08/13/2013
|
Application #:
|
13370854
|
Filing Dt:
|
02/10/2012
|
Publication #:
|
|
Pub Dt:
|
06/07/2012
| | | | |
Title:
|
SEMICONDUCTOR APPARATUS
|
|
|
Patent #:
|
|
Issue Dt:
|
12/17/2013
|
Application #:
|
13586580
|
Filing Dt:
|
08/15/2012
|
Publication #:
|
|
Pub Dt:
|
08/15/2013
| | | | |
Title:
|
PLANAR RESISTIVE MEMORY INTEGRATION
|
|
|
Patent #:
|
|
Issue Dt:
|
10/14/2014
|
Application #:
|
13882130
|
Filing Dt:
|
04/26/2013
|
Publication #:
|
|
Pub Dt:
|
08/22/2013
| | | | |
Title:
|
RESISTANCE CHANGE MEMORY CELL CIRCUITS AND METHODS
|
|
|
Patent #:
|
|
Issue Dt:
|
05/12/2015
|
Application #:
|
14062609
|
Filing Dt:
|
10/24/2013
|
Publication #:
|
|
Pub Dt:
|
08/21/2014
| | | | |
Title:
|
PLANAR RESISTIVE MEMORY INTEGRATION
|
|
|
Patent #:
|
|
Issue Dt:
|
04/05/2016
|
Application #:
|
14125913
|
Filing Dt:
|
12/12/2013
|
Publication #:
|
|
Pub Dt:
|
04/24/2014
| | | | |
Title:
|
RESISTANCE MEMORY CELL
|
|
|
Patent #:
|
|
Issue Dt:
|
10/13/2015
|
Application #:
|
14167694
|
Filing Dt:
|
01/29/2014
|
Publication #:
|
|
Pub Dt:
|
07/31/2014
| | | | |
Title:
|
MEMORY ELEMENT WITH A REACTIVE METAL LAYER
|
|
|
Patent #:
|
|
Issue Dt:
|
01/05/2016
|
Application #:
|
14210085
|
Filing Dt:
|
03/13/2014
|
Publication #:
|
|
Pub Dt:
|
09/18/2014
| | | | |
Title:
|
FAST READ SPEED MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
02/14/2017
|
Application #:
|
14240682
|
Filing Dt:
|
02/24/2014
|
Publication #:
|
|
Pub Dt:
|
07/03/2014
| | | | |
Title:
|
SYSTEM AND METHOD FOR PERFORMING MEMORY OPERATIONS ON RRAM CELLS
|
|
|
Patent #:
|
|
Issue Dt:
|
11/01/2016
|
Application #:
|
14453982
|
Filing Dt:
|
08/07/2014
|
Publication #:
|
|
Pub Dt:
|
11/27/2014
| | | | |
Title:
|
MULTI-LAYERED CONDUCTIVE METAL OXIDE STRUCTURES AND METHODS FOR FACILITATING ENHANCED PERFORMANCE CHARACTERISTICS OF TWO-TERMINAL MEMORY CELLS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/13/2015
|
Application #:
|
14463518
|
Filing Dt:
|
08/19/2014
|
Publication #:
|
|
Pub Dt:
|
01/29/2015
| | | | |
Title:
|
TWO-TERMINAL REVERSIBLY SWITCHABLE MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
10/06/2015
|
Application #:
|
14483359
|
Filing Dt:
|
09/11/2014
|
Publication #:
|
|
Pub Dt:
|
12/25/2014
| | | | |
Title:
|
RESISTANCE CHANGE MEMORY CELL CIRCUITS AND METHODS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/12/2016
|
Application #:
|
14567988
|
Filing Dt:
|
12/11/2014
|
Publication #:
|
|
Pub Dt:
|
03/17/2016
| | | | |
Title:
|
1T-1R ARCHITECTURE FOR RESISTIVE RANDOM ACCESS MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
02/14/2017
|
Application #:
|
14568011
|
Filing Dt:
|
12/11/2014
|
Publication #:
|
|
Pub Dt:
|
06/11/2015
| | | | |
Title:
|
1D-2R MEMORY ARCHITECTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
09/06/2016
|
Application #:
|
14605866
|
Filing Dt:
|
01/26/2015
|
Publication #:
|
|
Pub Dt:
|
08/27/2015
| | | | |
Title:
|
DISTRIBUTED CASCODE CURRENT SOURCE FOR RRAM SET CURRENT LIMITATION
|
|
|
Patent #:
|
|
Issue Dt:
|
11/28/2017
|
Application #:
|
14844805
|
Filing Dt:
|
09/03/2015
|
Publication #:
|
|
Pub Dt:
|
12/31/2015
| | | | |
Title:
|
TWO-TERMINAL REVERSIBLY SWITCHABLE MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
02/14/2017
|
Application #:
|
14850702
|
Filing Dt:
|
09/10/2015
|
Publication #:
|
|
Pub Dt:
|
01/07/2016
| | | | |
Title:
|
MEMORY ELEMENT WITH A REACTIVE METAL LAYER
|
|
|
Patent #:
|
|
Issue Dt:
|
02/14/2017
|
Application #:
|
14866920
|
Filing Dt:
|
09/26/2015
|
Publication #:
|
|
Pub Dt:
|
01/21/2016
| | | | |
Title:
|
RESISTANCE CHANGE MEMORY CELL CIRCUITS AND METHODS
|
|
|
Patent #:
|
|
Issue Dt:
|
11/08/2016
|
Application #:
|
14987309
|
Filing Dt:
|
01/04/2016
|
Publication #:
|
|
Pub Dt:
|
04/28/2016
| | | | |
Title:
|
FAST READ SPEED MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
07/31/2018
|
Application #:
|
15039784
|
Filing Dt:
|
05/26/2016
|
Publication #:
|
|
Pub Dt:
|
12/29/2016
| | | | |
Title:
|
2T-1R ARCHITECTURE FOR RESISTIVE RAM
|
|
|
Patent #:
|
|
Issue Dt:
|
04/03/2018
|
Application #:
|
15040921
|
Filing Dt:
|
02/10/2016
|
Publication #:
|
|
Pub Dt:
|
08/18/2016
| | | | |
Title:
|
RESISTANCE MEMORY CELL
|
|
|
Patent #:
|
|
Issue Dt:
|
11/21/2017
|
Application #:
|
15206616
|
Filing Dt:
|
07/11/2016
|
Publication #:
|
|
Pub Dt:
|
01/05/2017
| | | | |
Title:
|
1T-1R ARCHITECTURE FOR RESISTIVE RANDOM ACCESS MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
10/09/2018
|
Application #:
|
15256465
|
Filing Dt:
|
09/02/2016
|
Publication #:
|
|
Pub Dt:
|
01/05/2017
| | | | |
Title:
|
DISTRIBUTED CASCODE CURRENT SOURCE FOR RRAM SET CURRENT LIMITATION
|
|
|
Patent #:
|
|
Issue Dt:
|
11/14/2017
|
Application #:
|
15338857
|
Filing Dt:
|
10/31/2016
|
Publication #:
|
|
Pub Dt:
|
04/20/2017
| | | | |
Title:
|
MULTI-LAYERED CONDUCTIVE METAL OXIDE STRUCTURES AND METHODS FOR FACILITATING ENHANCED PERFORMANCE CHARACTERISTICS OF TWO-TERMINAL MEMORY CELLS
|
|
|
Patent #:
|
|
Issue Dt:
|
04/10/2018
|
Application #:
|
15338872
|
Filing Dt:
|
10/31/2016
|
Publication #:
|
|
Pub Dt:
|
04/20/2017
| | | | |
Title:
|
FAST READ SPEED MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
11/14/2017
|
Application #:
|
15390645
|
Filing Dt:
|
12/26/2016
|
Publication #:
|
|
Pub Dt:
|
06/22/2017
| | | | |
Title:
|
RESISTANCE CHANGE MEMORY CELL CIRCUITS AND METHODS
|
|
|
Patent #:
|
|
Issue Dt:
|
03/19/2019
|
Application #:
|
15393233
|
Filing Dt:
|
12/28/2016
|
Publication #:
|
|
Pub Dt:
|
06/22/2017
| | | | |
Title:
|
SYSTEM AND METHOD FOR PERFORMING MEMORY OPERATIONS ON RRAM CELLS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/31/2017
|
Application #:
|
15393545
|
Filing Dt:
|
12/29/2016
|
Publication #:
|
|
Pub Dt:
|
06/22/2017
| | | | |
Title:
|
MEMORY ELEMENT WITH A REACTIVE METAL LAYER
|
|
|
Patent #:
|
|
Issue Dt:
|
05/21/2019
|
Application #:
|
15790312
|
Filing Dt:
|
10/23/2017
|
Publication #:
|
|
Pub Dt:
|
05/03/2018
| | | | |
Title:
|
RESISTANCE CHANGE MEMORY CELL CIRCUITS AND METHODS
|
|
|
Patent #:
|
|
Issue Dt:
|
03/05/2019
|
Application #:
|
15797452
|
Filing Dt:
|
10/30/2017
|
Publication #:
|
|
Pub Dt:
|
05/10/2018
| | | | |
Title:
|
TWO-TERMINAL REVERSIBLY SWITCHABLE MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
07/02/2019
|
Application #:
|
15797716
|
Filing Dt:
|
10/30/2017
|
Publication #:
|
|
Pub Dt:
|
05/03/2018
| | | | |
Title:
|
MEMORY ELEMENT WITH A REACTIVE METAL LAYER
|
|
|
Patent #:
|
|
Issue Dt:
|
01/22/2019
|
Application #:
|
15811179
|
Filing Dt:
|
11/13/2017
|
Publication #:
|
|
Pub Dt:
|
05/10/2018
| | | | |
Title:
|
MULTI-LAYERED CONDUCTIVE METAL OXIDE STRUCTURES AND METHODS FOR FACILITATING ENHANCED PERFORMANCE CHARACTERISTICS OF TWO-TERMINAL MEMORY CELLS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/20/2019
|
Application #:
|
15817887
|
Filing Dt:
|
11/20/2017
|
Publication #:
|
|
Pub Dt:
|
05/17/2018
| | | | |
Title:
|
1T-1R ARCHITECTURE FOR RESISTIVE RANDOM ACCESS MEMORY
|
|