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Reel/Frame:046900/0136   Pages: 125
Recorded: 08/22/2018
Attorney Dkt #:046660-0056
Conveyance: AMENDED AND RESTATED U.S. PATENT SECURITY AGREEMENT (FOR NON-U.S. GRANTORS)
Total properties: 1130
Page 1 of 12
Pages: 1 2 3 4 5 6 7 8 9 10 11 12
1
Patent #:
Issue Dt:
11/12/2002
Application #:
08519504
Filing Dt:
08/25/1995
Title:
REDUCED AREA SENSE AMPLIFIER ISOLATION LAYOUT IN A DYNAMIC RAM ARCHITECTURE
2
Patent #:
Issue Dt:
07/14/1998
Application #:
08555463
Filing Dt:
11/13/1995
Title:
ESD PROTECTION CLAMP FOR MIXED VOLTAGE I/O STAGES USING NMOS TRANSISTORS
3
Patent #:
Issue Dt:
01/05/1999
Application #:
08710230
Filing Dt:
09/13/1996
Title:
DRIVER CIRCUIT WITH PRECHARGE AND ACTIVE HOLD
4
Patent #:
Issue Dt:
02/02/1999
Application #:
08711491
Filing Dt:
09/10/1996
Title:
SYSTEM AND METHOD FOR ON-CHIP DEBUG SUPPORT AND PERFORMANCE MONITORING IN A MICROPROCESSOR
5
Patent #:
Issue Dt:
04/14/1998
Application #:
08724595
Filing Dt:
09/30/1996
Title:
ESD PROTECTION SYSTEM FOR AN INTEGRATED CIRCUIT WITH MULTIPLE POWER SUPPLY NETWORKS
6
Patent #:
Issue Dt:
03/09/1999
Application #:
08758606
Filing Dt:
11/27/1996
Title:
INPUT COMPARISON CIRCUITRY AND METHOD FOR A PROGRAMMABLE STATE MACHINE
7
Patent #:
Issue Dt:
01/09/2001
Application #:
08759044
Filing Dt:
12/02/1996
Title:
LOAD AND STORE INSTRUCTIONS WHICH PERFORM UNPACKING AND PACKING OF DATA BITS IN SEPARATE VECTOR AND INTER CACHE STORAGE
8
Patent #:
Issue Dt:
08/10/1999
Application #:
08781092
Filing Dt:
01/08/1997
Title:
METHOD OF FORMING LIGHTLY DOPED DRAIN REGION AND HEAVILY DOPING A GATE USING A SINGLE IMPLANT STEP
9
Patent #:
Issue Dt:
08/29/2000
Application #:
08815982
Filing Dt:
03/10/1997
Title:
PROCESSOR PERFORMANCE COUNTER FOR SAMPLING THE EXECUTION FREQUENCY OF INDIVIDUAL INSTRUCTIONS
10
Patent #:
Issue Dt:
11/23/1999
Application #:
08818427
Filing Dt:
03/17/1997
Title:
POST-SPACER LDD IMPLANT FOR SHALLOW LDD TRANSISTOR
11
Patent #:
Issue Dt:
03/23/1999
Application #:
08822941
Filing Dt:
03/21/1997
Title:
THIN POLYSILICON MASKING TECHNIQUE FOR IMPROVED LITHOGRAPHY CONTROL
12
Patent #:
Issue Dt:
04/16/2002
Application #:
08837523
Filing Dt:
04/21/1997
Publication #:
Pub Dt:
11/08/2001
Title:
METHOD OF MAKING AN IGFET USING SOLID PHASE DIFFUSION TO DOPE THE GATE, SOURCE AND DRAIN
13
Patent #:
Issue Dt:
05/02/2000
Application #:
08891278
Filing Dt:
07/10/1997
Title:
A PROCESS OF MANUFACTURING A SEMICONDUCTOR DEVICE HAVING A NITROGEN BEARING ISOLATION REGION
14
Patent #:
Issue Dt:
10/19/1999
Application #:
08896400
Filing Dt:
07/18/1997
Title:
HIGH PERFORMANCE MOSFET TRANSISTOR FABRICATION TECHNIQUE
15
Patent #:
Issue Dt:
10/17/2000
Application #:
08910847
Filing Dt:
08/13/1997
Title:
MEMORY CONTROLLER SUPPORTING DRAM CIRCUITS WITH DIFFERENT OPERATING SPEEDS
16
Patent #:
Issue Dt:
06/04/2002
Application #:
08954175
Filing Dt:
10/20/1997
Publication #:
Pub Dt:
11/15/2001
Title:
METHOD AND SYSTEM FOR COPPER INTERCONNECT FORMATION
17
Patent #:
Issue Dt:
12/12/2000
Application #:
08968444
Filing Dt:
11/12/1997
Title:
SPACER FORMATION BY POLY STACK DOPANT PROFILE DESIGN
18
Patent #:
Issue Dt:
05/30/2000
Application #:
08979282
Filing Dt:
11/26/1997
Title:
TRANSISTOR FABRICATION EMPLOYING IMPLANTATION OF DOPANT INTO JUNCTIONS WITHOUT SUBJECTING SIDEWALL SURFACES OF A GATE CONDUCTOR TO ION BOMBARDMENT
19
Patent #:
Issue Dt:
02/27/2001
Application #:
08986358
Filing Dt:
12/08/1997
Title:
WIDE DATABASE ARCHITECTURE
20
Patent #:
Issue Dt:
07/18/2000
Application #:
08992489
Filing Dt:
12/18/1997
Title:
SHALLOW TRENCH ISOLATION FORMATION WITH NO POLISH STOP
21
Patent #:
Issue Dt:
09/26/2000
Application #:
09041513
Filing Dt:
03/12/1998
Title:
CACHE MEMORY EXCHANGE OPTIMIZED MEMEORY ORGANIZATION FOR A COMPUTER SYSTEM
22
Patent #:
Issue Dt:
08/03/1999
Application #:
09072129
Filing Dt:
05/04/1998
Title:
ESD PROTECTION CLAMP FOR MIXED VOLTAGE I/O STAGES USING NMOS TRANSISTORS
23
Patent #:
Issue Dt:
08/01/2000
Application #:
09072130
Filing Dt:
05/04/1998
Title:
ESD PROTECTION CLAMP FOR MIXED VOLTAGE I/O STAGES USING NMOS TRANSISTORS
24
Patent #:
Issue Dt:
04/02/2002
Application #:
09092732
Filing Dt:
06/05/1998
Title:
METHOD AND SYSTEM FOR STATE-DEPENDENT ADMISSION CONTROL AND ROUTING OF MULTI-RATE CIRCUIT-SWITCHED TRAFFIC
25
Patent #:
Issue Dt:
03/12/2002
Application #:
09093217
Filing Dt:
06/08/1998
Title:
SELECTIVE METHOD TO FORM ROUGHENED SILICON
26
Patent #:
Issue Dt:
05/02/2000
Application #:
09099464
Filing Dt:
06/18/1998
Title:
REGULATED DRAM CELL PLATE AND PRECHARGE VOLTAGE GENERATOR
27
Patent #:
Issue Dt:
02/15/2000
Application #:
09099765
Filing Dt:
06/19/1998
Title:
SHARED LENGTH CELL FOR IMPROVED CAPACITANCE
28
Patent #:
Issue Dt:
05/16/2000
Application #:
09106308
Filing Dt:
06/29/1998
Title:
SYNCHRONOUS DYNAMIC RANDOM ACCESS MEMORY IN A SEMICONDUCTOR MEMORY DEVICE
29
Patent #:
Issue Dt:
12/04/2001
Application #:
09106755
Filing Dt:
06/30/1998
Title:
PROCESS, VOLTAGE, TEMPERATURE INDEPENDENT SWITCHED DELAY COMPENSATION SCHEME
30
Patent #:
Issue Dt:
07/10/2001
Application #:
09114426
Filing Dt:
07/13/1998
Title:
METHOD AND APPARATUS FOR SUPPORTING HETEROGENEOUS MEMORY IN COMPUTER SYSTEMS
31
Patent #:
Issue Dt:
07/23/2002
Application #:
09118835
Filing Dt:
07/20/1998
Publication #:
Pub Dt:
08/09/2001
Title:
METHOD AND APPARATUS FOR INSPECTING WAFERS
32
Patent #:
Issue Dt:
01/21/2003
Application #:
09119355
Filing Dt:
07/20/1998
Title:
ALUMINUM-BERYLLIUM ALLOYS FOR AIR BRIDGES
33
Patent #:
Issue Dt:
11/12/2002
Application #:
09123486
Filing Dt:
07/28/1998
Title:
LOCAL AREA NETWORK OF SERIAL INTELLIGENT CELLS
34
Patent #:
Issue Dt:
04/24/2001
Application #:
09126877
Filing Dt:
07/30/1998
Title:
A SEMICONDUCTOR CIRCUIT DESIGN METHOD FOR EMPLOYING SPACING CONSTRAINTS AND CIRCUITS THEREOF
35
Patent #:
Issue Dt:
03/25/2003
Application #:
09129878
Filing Dt:
08/06/1998
Publication #:
Pub Dt:
11/15/2001
Title:
SEMICONDUCTOR MEMORY ASYNCHRONOUS PIPELINE
36
Patent #:
Issue Dt:
08/07/2001
Application #:
09138811
Filing Dt:
08/21/1998
Title:
GRADED LAYER FOR USE IN SEMICONDUCTOR CIRCUITS AND METHOD FOR MAKING SAME
37
Patent #:
Issue Dt:
09/17/2002
Application #:
09139934
Filing Dt:
08/26/1998
Publication #:
Pub Dt:
01/10/2002
Title:
SYSTEM AND METHOD FOR SELECTIVELY INCREASING SURFACE TEMPERATURE OF AN OBJECT
38
Patent #:
Issue Dt:
06/13/2000
Application #:
09140878
Filing Dt:
08/27/1998
Title:
METHODS FOR PREPARING RUTHENIUM METAL FILMS
39
Patent #:
Issue Dt:
10/17/2000
Application #:
09140932
Filing Dt:
08/27/1998
Title:
METHODS FOR PREPARING RUTHENIUM OXIDE FILMS
40
Patent #:
Issue Dt:
05/28/2002
Application #:
09141321
Filing Dt:
08/27/1998
Title:
COMMUNICATIONS AND CONTROL NETWORK HAVING MULTIPLE POWER SUPPLIES
41
Patent #:
Issue Dt:
08/14/2001
Application #:
09141384
Filing Dt:
08/27/1998
Title:
SURFACE CLEANING APPARATUS AND METHOD
42
Patent #:
Issue Dt:
05/23/2000
Application #:
09143096
Filing Dt:
08/28/1998
Title:
METHOD FOR MANUFACTURING A CAPACITOR OF A SEMICONDUCTOR DEVICE
43
Patent #:
Issue Dt:
03/06/2001
Application #:
09143283
Filing Dt:
08/28/1998
Title:
DEVICE AND METHOD FOR REPAIRING A SEMICONDUCTOR MEMORY
44
Patent #:
Issue Dt:
10/22/2002
Application #:
09146299
Filing Dt:
09/03/1998
Title:
ISOLATION AND/OR REMOVAL OF IONIC CONTAMINANTS FROM PLANARIZATION FLUID COMPOSITIONS USING MACROCYCLIC POLYETHERS AND METHODS OF USING SUCH COMPOSITIONS
45
Patent #:
Issue Dt:
11/27/2001
Application #:
09146866
Filing Dt:
09/03/1998
Title:
DIFFUSION BARRIER LAYERS AND METHODS OF FORMING SAME
46
Patent #:
Issue Dt:
01/25/2000
Application #:
09148032
Filing Dt:
09/03/1998
Title:
GAPPED-PLATE CAPACITOR
47
Patent #:
Issue Dt:
03/07/2000
Application #:
09151601
Filing Dt:
09/11/1998
Title:
SEMICONDUCTOR DEVICE HAVING CAPACITOR
48
Patent #:
Issue Dt:
07/24/2001
Application #:
09153053
Filing Dt:
09/15/1998
Title:
METHODS AND SOLUTIONS FOR CLEANING POLISHED ALUMINUM-CONTAINING LAYERS, METHODS FOR MAKING METALLIZATION STRUCTURES, AND THE STRUCTURES RESULTING FROM THESE METHODS
49
Patent #:
Issue Dt:
11/09/1999
Application #:
09163341
Filing Dt:
09/30/1998
Title:
BI-DIRECTIONAL DATA BUS SCHEME WITH OPTIMIZED READ AND WRITE CHARACTERS
50
Patent #:
Issue Dt:
06/25/2002
Application #:
09173273
Filing Dt:
10/15/1998
Title:
TRANSISTOR HAVING ENHANCED METAL SILICIDE AND A SELF-ALIGNED GATE ELECTRODE
51
Patent #:
Issue Dt:
01/21/2003
Application #:
09182494
Filing Dt:
10/30/1998
Publication #:
Pub Dt:
11/29/2001
Title:
HIGH BANDWIDTH MEMORY INTERFACE
52
Patent #:
Issue Dt:
10/24/2000
Application #:
09182495
Filing Dt:
10/30/1998
Title:
COLUMN REDUNDANCY CIRCUIT WITH REDUCED SIGNAL PATH DELAY
53
Patent #:
Issue Dt:
05/23/2000
Application #:
09184918
Filing Dt:
11/02/1998
Title:
METHODS OF FABRICATING CONDUCTIVE LINES IN INTEGRATED CIRCUITS USING INSULATING SIDEWALL SPACERS AND CONDUCTIVE LINES SO FABRICATED
54
Patent #:
Issue Dt:
09/26/2000
Application #:
09186354
Filing Dt:
11/05/1998
Title:
METHOD OF PREVENTING BOWING IN A VIA FORMATION PROCESS
55
Patent #:
Issue Dt:
11/21/2000
Application #:
09195202
Filing Dt:
11/18/1998
Title:
ADJUSABLE SUBSTRATE VOLTAGE APPLYING CIRCUIT OF A SEMICONDUCTOR DEVICE
56
Patent #:
Issue Dt:
11/28/2000
Application #:
09196121
Filing Dt:
11/20/1998
Title:
DELAY LOCKED LOOP DEVICE OF THE SEMICONDUCTOR CIRCUIT
57
Patent #:
Issue Dt:
10/09/2001
Application #:
09198826
Filing Dt:
11/24/1998
Publication #:
Pub Dt:
06/14/2001
Title:
METHOD OF FORMING A CAPACITOR
58
Patent #:
Issue Dt:
04/03/2001
Application #:
09205047
Filing Dt:
12/04/1998
Title:
METHOD AND TEST STRUCTURE FOR LOW-TEMPERATURE INTEGRATION OF HIGH DIELECTRIC CONSTANT GATE DIELECTRICS INTO SELF-ALIGNED SEMICONDUCTOR DEVICES
59
Patent #:
Issue Dt:
10/08/2002
Application #:
09205480
Filing Dt:
12/04/1998
Title:
DIRECT MEMORY ACCESS EXECUTION ENGINE WITH INDIRECT ADDRESSING OF CIRCULAR QUEUES IN ADDITION TO DIRECT MEMORY ADDRESSING
60
Patent #:
Issue Dt:
07/04/2006
Application #:
09208325
Filing Dt:
12/09/1998
Title:
SACRIFICIAL TIN ARC LAYER FOR INCREASED PAD ETCH THROUGHPUT
61
Patent #:
Issue Dt:
06/06/2000
Application #:
09209649
Filing Dt:
12/10/1998
Title:
CONTACT STRUCTURE OF SEMICONDUCTOR MEMORY DEVICE FOR REDUCING CONTACT RELATED DEFECT AND CONTACT RESISTANCE AND METHOD FOR FORMING THE SAME
62
Patent #:
Issue Dt:
11/19/2002
Application #:
09210456
Filing Dt:
12/14/1998
Title:
METHOD AND APPARATUS FOR CONNECTING NETWORK SEGMENTS
63
Patent #:
Issue Dt:
11/23/1999
Application #:
09212053
Filing Dt:
12/15/1998
Title:
DYNAMIC RANDOM ACCESS MEMORY DEVICE AND METHOD FOR FABRICATING THE SAME
64
Patent #:
Issue Dt:
04/30/2002
Application #:
09216874
Filing Dt:
12/21/1998
Publication #:
Pub Dt:
06/14/2001
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
65
Patent #:
Issue Dt:
09/18/2001
Application #:
09217574
Filing Dt:
12/21/1998
Title:
SEMICONDUCTOR DEVICE HAVING IMPROVED ON-OFF CURRENT CHARACTERISTICS
66
Patent #:
Issue Dt:
08/13/2002
Application #:
09222044
Filing Dt:
05/03/1999
Title:
NONVOLATILE MEMORY DEVICES HAVING ALTERNATIVE PROGRAMMING
67
Patent #:
Issue Dt:
05/13/2003
Application #:
09224695
Filing Dt:
01/04/1999
Title:
ORTHOGONAL FREQUENCY DIVISION MULTIPLEXING SYSTEM WITH SELECTABLE RATE
68
Patent #:
Issue Dt:
06/15/2004
Application #:
09225887
Filing Dt:
01/05/1999
Title:
CAPACITOR ELECTRODE FOR INTEGRATING HIGH K MATERIALS
69
Patent #:
Issue Dt:
11/13/2001
Application #:
09229857
Filing Dt:
01/13/1999
Title:
GAPPED-PLATE CAPACITOR
70
Patent #:
Issue Dt:
11/20/2001
Application #:
09235752
Filing Dt:
01/25/1999
Title:
METHOD FOR IMPROVED PROCESSING AND ETCHBACK OF A CONTAINER CAPACITOR
71
Patent #:
Issue Dt:
04/30/2002
Application #:
09238050
Filing Dt:
01/27/1999
Title:
DUAL DAMASCENE ARRANGEMENT FOR METAL INTERCONNECTION WITH OXIDE DIELECTRIC LAYER AND LOW K DIELECTRIC CONSTANT LAYER
72
Patent #:
Issue Dt:
09/18/2001
Application #:
09239152
Filing Dt:
01/28/1999
Title:
STACKABLE BALL GRID ARRAY SEMICONDUCTOR PACKAGE AND FABRICATION METHOD THEREOF
73
Patent #:
Issue Dt:
02/27/2001
Application #:
09241212
Filing Dt:
02/01/1999
Title:
EMBEDDED INPUT LOGIC IN A HIGH INPUT IMPEDANCE STROBED CMOS DIFFERENTIAL SENSE AMPLIFIER
74
Patent #:
Issue Dt:
09/11/2001
Application #:
09243469
Filing Dt:
02/03/1999
Title:
CIRCUIT FOR STANDBY CURRENT REDUCTION
75
Patent #:
Issue Dt:
01/29/2002
Application #:
09250974
Filing Dt:
02/16/1999
Publication #:
Pub Dt:
11/15/2001
Title:
METHODS OF FORMING MATERIALS COMPRISING TUNGSTEN AND NITROGEN
76
Patent #:
Issue Dt:
05/14/2002
Application #:
09251104
Filing Dt:
02/16/1999
Publication #:
Pub Dt:
02/28/2002
Title:
METHODS OF FORMING SEMICONDUCTOR CIRCUIT CONSTRUCTIONS AND CAPACITOR CONSTRUCTIONS
77
Patent #:
Issue Dt:
06/25/2002
Application #:
09252022
Filing Dt:
02/16/1999
Title:
COMPOSITION AND METHOD OF FORMATION AND USE THEREFOR IN CHEMICAL-MECHANICAL POLISHING
78
Patent #:
Issue Dt:
11/20/2001
Application #:
09253307
Filing Dt:
02/19/1999
Title:
METHODS OF MAKING SEMICONDUCTOR DEVICES
79
Patent #:
Issue Dt:
02/25/2003
Application #:
09259143
Filing Dt:
02/26/1999
Title:
STEREOLITHOGRAPHIC METHOD FOR APPLYING MATERIALS TO ELECTRONIC COMPONENT SUBSTRATES AND RESULTING STRUCTURES
80
Patent #:
Issue Dt:
04/02/2002
Application #:
09260237
Filing Dt:
03/01/1999
Title:
METHOD OF DEPOSITING A NITROGEN ENRICHED METAL LAYER, METHOD OF FORMING A SILICIDE CONTACT TO A SILICON COMPRISING SUBSTRATE, METHOD OF FORMING A METAL SOURCE LAYER IN AN INTEGRATED CIRCUIT, METHOD OF ANALYZING IMPACT OF OPERATING PARAMETER CHANGES FOR A PLASMA DEPOSITIO
81
Patent #:
Issue Dt:
12/17/2002
Application #:
09266506
Filing Dt:
03/11/1999
Title:
METHOD AND APPARATUS FOR DISABLING A PROCESSOR IN A MULTIPROCESSOR COMPUTER
82
Patent #:
Issue Dt:
03/06/2001
Application #:
09290399
Filing Dt:
04/13/1999
Title:
PLURAL MEMORY BANKS MEMORY DEVICE THAT CAN SIMULTANEOUSLY READ FROM OR WRITE TO ALL OF THE MEMORY BANKS DURING TESTING
83
Patent #:
Issue Dt:
09/23/2003
Application #:
09292396
Filing Dt:
04/15/1999
Title:
APPARATUS AND METHOD FOR FEATURE EDGE DETECTION IN SEMICONDUCTOR PROCESSING
84
Patent #:
Issue Dt:
03/20/2001
Application #:
09293635
Filing Dt:
04/15/1999
Title:
METHOD OF FORMING HIGH ASPECT RATIO STRUCTURES FOR SEMINCONDUCTOR DEVICES
85
Patent #:
Issue Dt:
09/18/2001
Application #:
09295403
Filing Dt:
04/21/1999
Title:
PHASE SPLITTER
86
Patent #:
Issue Dt:
04/23/2002
Application #:
09295668
Filing Dt:
04/21/1999
Title:
SCALABLE SYSTEM CONTROL UNIT FOR DISTRIBUTED SHARED MEMORY MULTI-PROCESSOR SYSTEMS
87
Patent #:
Issue Dt:
07/17/2001
Application #:
09296038
Filing Dt:
04/21/1999
Title:
BACKUP REDUNDANT ROUTING SYSTEM CROSSBAR SWITCH ARCHITECTURE FOR MULTI-PROCESSOR SYSTEM INTERCONNECTION NETWORKS
88
Patent #:
Issue Dt:
07/22/2003
Application #:
09296045
Filing Dt:
04/21/1999
Publication #:
Pub Dt:
07/10/2003
Title:
SCALABLE, RE-CONFIGURABLE CROSSBAR SWITCH ARCHITECTURE FOR MULTI-PROCESSOR SYSTEM INTERCONNECTION NETWORKS
89
Patent #:
Issue Dt:
05/21/2002
Application #:
09300902
Filing Dt:
04/28/1999
Title:
SLEEPMODE ACTIVATION IN A SLAVE DEVICE
90
Patent #:
Issue Dt:
07/24/2001
Application #:
09305098
Filing Dt:
05/05/1999
Title:
ALUMINUM DISPOSABLE SPACER TO REDUCE MASK COUNT IN CMOS TRANSISTOR FORMATION
91
Patent #:
Issue Dt:
02/24/2004
Application #:
09312486
Filing Dt:
05/17/1999
Title:
SYSTEM FOR TRANSMITTING MESSAGES TO IMPROVED STATIONS, AND CORRESPONDING PROCESSING
92
Patent #:
Issue Dt:
11/07/2000
Application #:
09317113
Filing Dt:
05/24/1999
Title:
SENSE AMPLIFIER DRIVING DEVICE
93
Patent #:
Issue Dt:
08/21/2001
Application #:
09323440
Filing Dt:
06/01/1999
Title:
METHOD OF FORMING A PAIR OF CAPACITORS HAVING A COMMON CAPACITOR ELECTRODE, METHOD OF FORMING DRAM CIRCUITRY, INTEGRATED CIRCUITRY AND DRAM CIRCUITRY
94
Patent #:
Issue Dt:
07/03/2001
Application #:
09324919
Filing Dt:
06/03/1999
Title:
TRENCH ISOLATION METHOD
95
Patent #:
Issue Dt:
09/18/2001
Application #:
09339890
Filing Dt:
06/25/1999
Publication #:
Pub Dt:
08/09/2001
Title:
METHOD OF FORMING DRAM TRENCH CAPACITOR WITH METAL LAYER OVER HEMISPHERICAL GRAIN POLYSILICON
96
Patent #:
Issue Dt:
05/29/2001
Application #:
09343353
Filing Dt:
06/30/1999
Title:
METHOD FOR FABRICATING A DRAM CELL CAPACITOR INCLUDING ETCHING UPPER CONDUCTIVE LAYER WITH ETCHING BYPRODUCT FORMING A ETCH BARRIER ON THE CONDUCTIVE PATTERN
97
Patent #:
Issue Dt:
07/31/2001
Application #:
09346450
Filing Dt:
07/01/1999
Title:
TRENCH ISOLATION METHOD FOR SEMICONDUCTOR INTEGRATED CIRCUIT
98
Patent #:
Issue Dt:
01/08/2002
Application #:
09347821
Filing Dt:
07/02/1999
Title:
METHOD FOR FABRICATING A SEMICONDUCTOR MEMORY DEVICE AND THE STRUCTURE THEREOF
99
Patent #:
Issue Dt:
05/01/2001
Application #:
09348381
Filing Dt:
07/07/1999
Title:
SEMICONDUCTOR DEVICE HAVING TRIPLE-WELL
100
Patent #:
Issue Dt:
10/18/2005
Application #:
09349020
Filing Dt:
07/07/1999
Title:
LOCAL AREA NETWORK FOR DISTRIBUTING DATA COMMUNICATION, SENSING AND CONTROL SIGNALS
Assignor
1
Exec Dt:
07/31/2018
Assignee
1
ONE QUEEN STREET EAST
TORONTO, CANADA M5C 2W5
Correspondence name and address
LATHAM & WATKINS LLP C/O ANGELA M. AMARU
885 THIRD AVENUE
NEW YORK, NY 10022

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