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Reel/Frame:047243/0001   Pages: 959
Recorded: 08/23/2018
Attorney Dkt #:4816.238
Conveyance: RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).
1
Patent #:
Issue Dt:
11/30/1999
Application #:
08903222
Filing Dt:
07/22/1997
Title:
ARTICLE TRANSFER METHODS
2
Patent #:
Issue Dt:
08/30/2005
Application #:
08903486
Filing Dt:
07/29/1997
Title:
SILICON CARBIDE GATE TRANSISTOR
3
Patent #:
Issue Dt:
11/23/1999
Application #:
08904657
Filing Dt:
08/01/1997
Title:
METHOD FOR MAKING POLISHING PAD WITH ELONGATED MICROCOLUMNS
4
Patent #:
Issue Dt:
02/29/2000
Application #:
08904746
Filing Dt:
08/01/1997
Title:
APPARATUS AND METHOD FOR IMPROVING UNIFORMITY IN BATCH PROCESSING OF SEMICONDUCTOR WAFERS
5
Patent #:
Issue Dt:
08/22/2000
Application #:
08905602
Filing Dt:
08/04/1997
Title:
METHOD OF FORMING A DIRECT DIE CONTACT (DDC) SEMICONDUCTOR PACKAGE
6
Patent #:
Issue Dt:
10/10/2000
Application #:
08905617
Filing Dt:
08/04/1997
Title:
METHOD OF FORMING AN ISOLATION STRUCTURE IN A SEMICONDUCTOR DEVICE
7
Patent #:
Issue Dt:
05/11/1999
Application #:
08905618
Filing Dt:
08/04/1997
Title:
ISOLATION STRUCTURE FOR SEMICONDUCTOR DEVICES
8
Patent #:
Issue Dt:
06/12/2001
Application #:
08906297
Filing Dt:
08/05/1997
Title:
METHODS FOR FORMING CONDUCTIVE MICRO-BUMPS AND RECESSED CONTACTS FOR FLIP-CHIP TECHNOLOGY AND METHOD OF FLIP-CHIP ASSEMBLY
9
Patent #:
Issue Dt:
06/22/1999
Application #:
08906568
Filing Dt:
08/05/1997
Title:
MEMORY DEVICE AND SYSTEM WITH LEAKAGE BLOCKING CIRCUITY
10
Patent #:
Issue Dt:
06/13/2000
Application #:
08906583
Filing Dt:
08/05/1997
Title:
HIGH RESOLUTION PRESSURE SENSING DEVICE HAVING AN INSULATING FLEXIBLE MATRIX LOADED WITH FILLER PARTICLES
11
Patent #:
Issue Dt:
01/11/2000
Application #:
08906673
Filing Dt:
08/05/1997
Title:
METHOD FOR APPLYING ADHESIVES TO A LEAD FRAME
12
Patent #:
Issue Dt:
08/29/2000
Application #:
08906889
Filing Dt:
08/06/1997
Title:
CONTACT FORMATION USING TWO ANNEAL STEPS
13
Patent #:
Issue Dt:
11/16/1999
Application #:
08907116
Filing Dt:
08/06/1997
Title:
KIT FOR ELECTRICALLY ISOLATING COLLIMATOR OF PVD CHAMBER, CHAMBER SO MODIFIED, AND METHOD OF USING
14
Patent #:
Issue Dt:
11/10/1998
Application #:
08907275
Filing Dt:
08/06/1997
Title:
MEMORY DEVICE EQUILIBRATION CIRCUIT AND METHOD
15
Patent #:
Issue Dt:
04/18/2000
Application #:
08907330
Filing Dt:
08/06/1997
Title:
METHOD AND APPARATUS FOR EPOXY LOC DIE ATTACHMENT
16
Patent #:
Issue Dt:
05/30/2000
Application #:
08908234
Filing Dt:
08/07/1997
Title:
METHOD FOR MULTIPLE STAGED POWER UP OF INTEGRATED CIRCUIT
17
Patent #:
Issue Dt:
06/10/2003
Application #:
08908242
Filing Dt:
08/07/1997
Title:
SERIAL COMMAND PORT METHOD, CIRCUIT, AND SYSTEM INCLUDING MAIN AND COMMAND CLOCK GENERATORS TO FILTER SIGNALS OF LESS THAN A PREDETERMINED DURATION
18
Patent #:
Issue Dt:
08/21/2001
Application #:
08908425
Filing Dt:
08/07/1997
Title:
STRESS REDUCTION FEATURE FOR LOC LEAD FRAME
19
Patent #:
Issue Dt:
02/22/2000
Application #:
08908486
Filing Dt:
08/07/1997
Title:
AUTOMATIC PIPELINE RELOADING OF SERIAL READ PIPELINE ON LAST BIT TRANSFERS TO SERIAL ACCESS MEMORY
20
Patent #:
Issue Dt:
09/28/1999
Application #:
08908688
Filing Dt:
08/07/1997
Title:
MULTI-CHIP MODULE SYSTEM
21
Patent #:
Issue Dt:
07/13/1999
Application #:
08908830
Filing Dt:
08/08/1997
Title:
METHOD FOR SHARPENING EMITTER SITES USING LOW TEMPERATURE OXIDATION PROCESSES
22
Patent #:
Issue Dt:
09/28/1999
Application #:
08909228
Filing Dt:
08/11/1997
Title:
TRANSFER MOLDING ENCAPSULATION OF A SEMICONDUCTOR DIE WITH ATTACHED HEAT SINK
23
Patent #:
Issue Dt:
04/11/2000
Application #:
08909230
Filing Dt:
08/11/1997
Title:
LEAD PENETRATING CLAMPING SYSTEM
24
Patent #:
Issue Dt:
08/31/1999
Application #:
08909294
Filing Dt:
08/11/1997
Title:
STRUCTURE FOR ATTACHING A SEMICONDUCTOR WAFER SECTION TO A SUPPORT
25
Patent #:
Issue Dt:
05/08/2001
Application #:
08909345
Filing Dt:
08/11/1997
Title:
ION IMPLANTATION WITH PROGRAMMABLE ENERGY, ANGLE, AND BEAM CURRENT
26
Patent #:
Issue Dt:
10/05/1999
Application #:
08909570
Filing Dt:
08/12/1997
Title:
METHOD AND APPARATUS FOR VERIFYING THE PRESENCE OR ABSENCE OF A COMPONENT
27
Patent #:
Issue Dt:
06/15/1999
Application #:
08909572
Filing Dt:
08/12/1997
Title:
PROCESS LIQUID DISPENSE METHOD AND APPARATUS
28
Patent #:
Issue Dt:
01/04/2000
Application #:
08909683
Filing Dt:
08/12/1997
Title:
ANISOTROPIC CONDUCTIVE INTERCONNECT MATERIAL FOR ELECTRONIC DEVICES, METHOD OF USE OF RESULTING PRODUCT
29
Patent #:
Issue Dt:
01/02/2001
Application #:
08909785
Filing Dt:
08/12/1997
Title:
SURFACE MOUNT IC USING SILICON VIAS IN AN AREA ARRAY FORMAT OR SAME SIZE AS DIE ARRAY
30
Patent #:
Issue Dt:
03/30/1999
Application #:
08909931
Filing Dt:
08/12/1997
Title:
LEAD FRAME INCLUDING ANGLE IRON TIE BAR AND METHOD OF MAKING THE SAME
31
Patent #:
Issue Dt:
10/26/1999
Application #:
08910299
Filing Dt:
08/11/1997
Title:
UNDERFILL OF BUMPED OR RAISED DIE USING A BARRIER ADJACENT TO THE SIDEWALL OF SEMICONDUCTOR DEVICE
32
Patent #:
Issue Dt:
11/02/1999
Application #:
08910701
Filing Dt:
08/13/1997
Title:
APPARATUS AND METHOD FOR STABILIZATION OF THRESHOLD VOLTAGE IN FIELD EMISSION DISPLAYS
33
Patent #:
Issue Dt:
10/03/2000
Application #:
08910908
Filing Dt:
08/13/1997
Title:
METHODS OF FORMING REFRACTORY METAL SILICIDE COMPONENTS AND METHODS OF RESTRICTING SILICON SURFACE MIGRATION OF A SILICON STRUCTURE
34
Patent #:
Issue Dt:
04/27/1999
Application #:
08910969
Filing Dt:
08/07/1997
Title:
FAST POWER UP REFERENCE VOLTAGE CIRCUIT AND METHOD
35
Patent #:
Issue Dt:
02/23/1999
Application #:
08911074
Filing Dt:
08/14/1997
Title:
CIRCUIT AND METHOD FOR A MEMORY DEVICE WITH P-CHANNEL
36
Patent #:
Issue Dt:
11/16/1999
Application #:
08911151
Filing Dt:
08/14/1997
Title:
METHOD FOR IMPROVED BOTTOM AND SIDE WALL COVERAGE OF HIGH ASPECT RATIO FEATURES
37
Patent #:
Issue Dt:
02/02/1999
Application #:
08911329
Filing Dt:
08/14/1997
Title:
TRACKING SIGNALS
38
Patent #:
Issue Dt:
09/21/1999
Application #:
08911389
Filing Dt:
08/14/1997
Title:
LASER WIRE BONDING FOR WIRE EMBEDDED DIELECTRICS TO INTEGRATED CIRCUITS
39
Patent #:
Issue Dt:
06/27/2000
Application #:
08911498
Filing Dt:
08/14/1997
Title:
CIRCUIT FOR SRAM TEST MODE ISOLATED BITLINE MODULATION
40
Patent #:
Issue Dt:
01/19/1999
Application #:
08911552
Filing Dt:
08/14/1997
Title:
METHOD AND MEMORY DEVICE FOR DYNAMIC CELL PLATE SENSING WITH AC EQUILIBRATE
41
Patent #:
Issue Dt:
02/16/1999
Application #:
08911582
Filing Dt:
08/14/1997
Title:
LASER WIRE BONDING FOR WIRE EMBEDDED DIELECTRICS TO INTEGRATED CIRCUITS
42
Patent #:
Issue Dt:
01/25/2000
Application #:
08911669
Filing Dt:
08/14/1997
Title:
LAYOUT FOR A SEMICONDUCTOR MEMORY DEVICE WHEREIN INTERCOUPLING LINES ARE SHARED BY TWO SETS OF FUSE BANKS AND TWO SETS OF REDUNDANT ELEMENTS NOT SIMULTANEOUSLY ACTIVE
43
Patent #:
Issue Dt:
01/04/2000
Application #:
08911897
Filing Dt:
08/15/1997
Title:
FREQUENCY ADJUSTABLE, ZERO TEMPERATURE COEFFICIENT REFERENCING RING OSCILLATOR CIRCUIT
44
Patent #:
Issue Dt:
11/02/1999
Application #:
08912050
Filing Dt:
08/18/1997
Title:
METHOD FOR FORMING DIELECTRIC WITHIN A RECESS
45
Patent #:
Issue Dt:
11/07/2000
Application #:
08912051
Filing Dt:
08/18/1997
Title:
METALLIZATION LAYER
46
Patent #:
Issue Dt:
08/31/1999
Application #:
08912108
Filing Dt:
08/04/1997
Title:
METHODS OF FORMING INTEGRATED CIRCUITRY AND INTEGRATED CIRCUITRY
47
Patent #:
Issue Dt:
04/03/2001
Application #:
08912347
Filing Dt:
08/18/1997
Title:
METHOD OF IMPROVING RESIST ADHESION FOR USE IN PATTERNING CONDUCTIVE LAYERS
48
Patent #:
Issue Dt:
07/06/1999
Application #:
08912380
Filing Dt:
08/18/1997
Title:
MULTI-LAYER ABSTRACTION BUCKET MECHANISM
49
Patent #:
Issue Dt:
07/13/1999
Application #:
08912875
Filing Dt:
08/15/1997
Title:
N-CHANNEL VOLTAGE REGULATOR
50
Patent #:
Issue Dt:
12/01/1998
Application #:
08912900
Filing Dt:
08/15/1997
Title:
CAPACITOR CONSTRUCTION
51
Patent #:
Issue Dt:
06/20/2000
Application #:
08914072
Filing Dt:
08/18/1997
Title:
VT CANCELLATION IN OUTPUT STAGE 0F CHARGE PUMP
52
Patent #:
Issue Dt:
11/23/1999
Application #:
08914369
Filing Dt:
08/19/1997
Title:
METHODS OF FORMING SRAM CELLS AND PAIRS OF FIELD EFFECT TRANSISTORS
53
Patent #:
Issue Dt:
03/21/2000
Application #:
08914417
Filing Dt:
08/19/1997
Title:
MULTIPLE IMAGE RETICLE FOR FORMING LAYERS
54
Patent #:
Issue Dt:
11/10/1998
Application #:
08914469
Filing Dt:
08/19/1997
Title:
METHOD FOR FABRICATING MICROBUMP INTERCONNECT FOR BARE SEMICONDUCTOR DICE
55
Patent #:
Issue Dt:
02/29/2000
Application #:
08914509
Filing Dt:
08/19/1997
Title:
PROCESSING COMPOSITIONS AND METHODS OF USING SAME
56
Patent #:
Issue Dt:
10/26/1999
Application #:
08914515
Filing Dt:
08/19/1997
Title:
DEVICE AND METHOD FOR STACKING WIRE-BONDED INTEGRATED CIRCUIT DICE ON FLIP-CHIP BONDED INTEGRATED CIRCUIT DICE
57
Patent #:
Issue Dt:
02/16/1999
Application #:
08914571
Filing Dt:
08/19/1997
Title:
MASK FOR FORMING FEATURES ON A SEMICONDUCTOR SUBSTRATE AND A METHOD FOR FORMING THE MASK
58
Patent #:
Issue Dt:
04/27/1999
Application #:
08914718
Filing Dt:
08/19/1997
Title:
HYBRID FRAME WITH LEAD-LOCK TAPE
59
Patent #:
Issue Dt:
06/06/2000
Application #:
08914719
Filing Dt:
08/19/1997
Title:
DEVICE AND METHOD FOR STACKING WIRE-BONDED INTEGRATED CIRCUIT DICE ON FLIP-CHIP BONDED INTEGRATED CIRCUIT DICE
60
Patent #:
Issue Dt:
06/13/2000
Application #:
08914935
Filing Dt:
08/20/1997
Title:
METHOD AND COMPOSITION FOR SELECTIVELY ETCHING AGAINST COBALT SILICIDE
61
Patent #:
Issue Dt:
09/05/2000
Application #:
08914979
Filing Dt:
08/20/1997
Title:
UNDERFILL COATING FOR LOC PACKAGE
62
Patent #:
Issue Dt:
09/05/2000
Application #:
08914994
Filing Dt:
08/20/1997
Title:
" METHOD & APPARATUS FOR PREDICTING PROCESS CHARACTERISTICS OF POLYURETHANE PADS"
63
Patent #:
Issue Dt:
01/09/2001
Application #:
08915006
Filing Dt:
08/20/1997
Title:
SUSPENSIONS AND METHODS FOR DEPOSITION OF LUMINESCENT MATERIALS AND ARTICLES PRODUCED THEREBY
64
Patent #:
Issue Dt:
10/17/2000
Application #:
08915074
Filing Dt:
08/20/1997
Title:
METHOD AND APPARATUS FOR TESTING MEMORY DEVICES AND DISPLAYING RESULTS OF SUCH TESTS
65
Patent #:
Issue Dt:
02/23/1999
Application #:
08915075
Filing Dt:
08/20/1997
Title:
SHARED PULL-UP AND SELECTION CIRCUITRY FOR PROGRAMMABLE CELLS SUCH AS ANTIFUSE CELLS
66
Patent #:
Issue Dt:
01/04/2000
Application #:
08915157
Filing Dt:
08/20/1997
Title:
WAFER SURFACE TREATMENT METHODS AND SYSTEMS USING ELECTROCAPILLARITY
67
Patent #:
Issue Dt:
04/11/2000
Application #:
08915159
Filing Dt:
08/20/1997
Title:
SINGULATION METHODS
68
Patent #:
Issue Dt:
07/13/1999
Application #:
08915186
Filing Dt:
08/20/1997
Title:
EQUILIBRATE CIRCUIT FOR DYNAMIC PLATE SENSING MEMORIES
69
Patent #:
Issue Dt:
09/14/1999
Application #:
08915190
Filing Dt:
08/20/1997
Title:
METHOD AND APPARATUS FOR REPLACING A DEFECTIVE INTEGRATED CIRCUIT DEVICE
70
Patent #:
Issue Dt:
09/28/1999
Application #:
08915193
Filing Dt:
08/20/1997
Title:
METHOD FOR CLEANING WASTE MATTER FROM THE BACKSIDE OF A SEMICONDUCTOR WAFER SUBSTRATE
71
Patent #:
Issue Dt:
10/26/1999
Application #:
08915197
Filing Dt:
08/20/1997
Title:
ULTRA HIGH DENSITY FLASH MEMORY HAVING VERTICALLY STACKED DEVICES
72
Patent #:
Issue Dt:
05/29/2001
Application #:
08915211
Filing Dt:
08/20/1997
Title:
METHOD OF DEPOSITING A THERMOPLASTIC POLYMER IN SEMICONDUCTOR FABRICATION
73
Patent #:
Issue Dt:
09/07/1999
Application #:
08915215
Filing Dt:
08/20/1997
Title:
METHOD AND APPARATUS FOR REPROGRAMMING A SUPERVOLTAGE CIRCUIT
74
Patent #:
Issue Dt:
01/04/2000
Application #:
08915312
Filing Dt:
08/20/1997
Title:
SHARED PULL-UP AND SELECTION CIRCUITRY FOR PROGRAMMABLE CELLS SUCH AS ANTIFUSE CELLS
75
Patent #:
Issue Dt:
06/20/2000
Application #:
08915313
Filing Dt:
08/20/1997
Title:
METHOD AND APPARATUS FOR DETECTING INTERCELL DEFECTS IN A MEMORY DEVICE
76
Patent #:
Issue Dt:
06/27/2000
Application #:
08915386
Filing Dt:
08/20/1997
Title:
SELF-ALIGNED CONTACT FORMATION FOR SEMICONDUCTOR DEVICES
77
Patent #:
Issue Dt:
09/28/1999
Application #:
08915422
Filing Dt:
08/20/1997
Title:
UNDERFILL COATING FOR LOC PACKAGE
78
Patent #:
Issue Dt:
11/30/1999
Application #:
08915517
Filing Dt:
08/13/1997
Title:
METHOD FOR CLEANING SEMICONDUCTOR WAFERS AND EQUIPMENT
79
Patent #:
Issue Dt:
04/20/2010
Application #:
08915658
Filing Dt:
08/21/1997
Title:
LOW RESISTANCE METAL SILICIDE LOCAL INTERCONNECTS AND A METHOD OF MAKING
80
Patent #:
Issue Dt:
06/20/2000
Application #:
08915849
Filing Dt:
08/21/1997
Title:
CREATING LAYOUT FOR INTEGRATED CIRCUIT STRUCTURES
81
Patent #:
Issue Dt:
11/10/1998
Application #:
08915853
Filing Dt:
08/21/1997
Title:
COLUMN SELECT LATCH FOR SDRAM
82
Patent #:
Issue Dt:
09/12/2000
Application #:
08915855
Filing Dt:
08/21/1997
Title:
DEVICE FOR THE PROTECTION OF STORED DATA USING A TIME DELAY CIRCUIT
83
Patent #:
Issue Dt:
09/03/2002
Application #:
08915885
Filing Dt:
08/21/1997
Title:
METHOD AND SYSTEM FOR TRACKING MANUFACTURING DATA FOR INTEGRATED CIRCUIT PARTS
84
Patent #:
Issue Dt:
02/23/1999
Application #:
08915888
Filing Dt:
08/21/1997
Title:
CVD METHOD FOR FORMING METAL-CONTAINING FILMS
85
Patent #:
Issue Dt:
07/06/1999
Application #:
08915951
Filing Dt:
08/21/1997
Title:
METHOD AND APPARATUS FOR IMPROVING THE STRUCTURAL INTEGRITY OF STACKED CAPACITORS
86
Patent #:
Issue Dt:
11/16/1999
Application #:
08915987
Filing Dt:
08/21/1997
Title:
METHOD OF DEPOSITING SILICON OXIDES
87
Patent #:
Issue Dt:
06/29/1999
Application #:
08916024
Filing Dt:
08/21/1997
Title:
DEPLETION COMPENSATED POLYSILICON ELECTRODES
88
Patent #:
Issue Dt:
07/28/1998
Application #:
08916054
Filing Dt:
08/21/1997
Title:
DEVICE FOR THE PROTECTION OF STORED DATA
89
Patent #:
Issue Dt:
05/25/1999
Application #:
08916112
Filing Dt:
08/21/1997
Title:
APPARATUS AND METHOD FOR EXTRACTING BROKEN THREADED MEMBERS
90
Patent #:
Issue Dt:
08/10/1999
Application #:
08916114
Filing Dt:
08/21/1997
Title:
SEMICONDUCTOR RELIABILITY TEST CHIP
91
Patent #:
Issue Dt:
06/15/1999
Application #:
08916117
Filing Dt:
08/21/1997
Title:
MEMORY CELL ARCHITECTURE ULITILIZING A TRANSISTOR HAVING A DUAL ACCESS GATE
92
Patent #:
Issue Dt:
07/20/1999
Application #:
08916182
Filing Dt:
08/21/1997
Title:
CONTENT ADDRESSABLE BIT REPLACEMENT MEMORY
93
Patent #:
Issue Dt:
04/25/2000
Application #:
08916219
Filing Dt:
08/22/1997
Title:
COPPER ELECTROLESS DEPOSITION ON A TITANIUM-CONTAINING SURFACE
94
Patent #:
Issue Dt:
12/05/2000
Application #:
08916275
Filing Dt:
08/22/1997
Title:
TITANIUM BORIDE GATE ELECTRODE AND INTERCONNECT AND METHODS REGARDING SAME
95
Patent #:
Issue Dt:
09/19/2000
Application #:
08916276
Filing Dt:
08/22/1997
Title:
ISOLATION USING AN ANTIREFLECTIVE COATING
96
Patent #:
Issue Dt:
12/08/1998
Application #:
08916356
Filing Dt:
08/22/1997
Title:
LOCAL INTERCONNECT COMPRISING TITANIUM NITRIDE BARRIER LAYER
97
Patent #:
Issue Dt:
06/06/2000
Application #:
08916434
Filing Dt:
08/22/1997
Title:
SYSTEM FOR TESTING SEMICONDUCTOR COMPONENTS
98
Patent #:
Issue Dt:
11/02/1999
Application #:
08916584
Filing Dt:
08/22/1997
Title:
SYNCHRONOUS MEMORY WITH PROGRAMMABLE READ LATENCY
99
Patent #:
Issue Dt:
03/23/1999
Application #:
08916603
Filing Dt:
08/22/1997
Title:
HIGH AND NEGATIVE VOLTAGE COMPARE
100
Patent #:
Issue Dt:
07/27/1999
Application #:
08916604
Filing Dt:
08/22/1997
Title:
VOLTAGE PUMP SWITCH
Assignor
1
Exec Dt:
06/29/2018
Assignee
1
8000 S. FEDERAL WAY
BOISE, IDAHO 83707
Correspondence name and address
WSGR, C/O QUI LU FLOOD, SENIOR PARALEGAL
ONE MARKET, SPEAR TOWER, SUITE 3300
SAN FRANCISCO, CA 94105

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