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Reel/Frame:047243/0001   Pages: 959
Recorded: 08/23/2018
Attorney Dkt #:4816.238
Conveyance: RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).
1
Patent #:
Issue Dt:
07/22/2014
Application #:
12955359
Filing Dt:
11/29/2010
Publication #:
Pub Dt:
03/31/2011
Title:
METHOD OF FORMING VIAS IN SEMICONDUCTOR SUBSTRATES AND RESULTING STRUCTURES
2
Patent #:
Issue Dt:
02/28/2012
Application #:
12955419
Filing Dt:
11/29/2010
Publication #:
Pub Dt:
03/24/2011
Title:
SENSING AGAINST A REFERENCE CELL
3
Patent #:
Issue Dt:
08/20/2013
Application #:
12955448
Filing Dt:
11/29/2010
Publication #:
Pub Dt:
05/31/2012
Title:
MEMORY DEVICES HAVING SELECT GATES WITH P TYPE BODIES, MEMORY STRINGS HAVING SEPARATE SOURCE LINES AND METHODS
4
Patent #:
Issue Dt:
05/21/2019
Application #:
12955494
Filing Dt:
11/29/2010
Publication #:
Pub Dt:
05/31/2012
Title:
CROSS-POINT MEMORY WITH SELF-DEFINED MEMORY ELEMENTS
5
Patent #:
Issue Dt:
10/02/2012
Application #:
12955635
Filing Dt:
11/29/2010
Publication #:
Pub Dt:
06/02/2011
Title:
SEMICONDUCTOR DEVICE INCLUDING ANALOG CIRCUIT AND DIGITAL CIRCUIT
6
Patent #:
Issue Dt:
06/12/2012
Application #:
12955666
Filing Dt:
11/29/2010
Publication #:
Pub Dt:
03/24/2011
Title:
MICROELECTRONIC DIE PACKAGES WITH METAL LEADS, INCLUDING METAL LEADS FOR STACKED DIE PACKAGES, AND ASSOCIATED SYSTEMS AND METHODS
7
Patent #:
Issue Dt:
12/13/2011
Application #:
12955780
Filing Dt:
11/29/2010
Publication #:
Pub Dt:
03/24/2011
Title:
COMMUNICATION METHODS, METHODS OF FORMING AN INTERCONNECT, SIGNAL INTERCONNECTS, INTEGRATED CIRCUIT STRUCTURES, CIRCUITS, AND DATA APPARATUSES
8
Patent #:
Issue Dt:
11/15/2011
Application #:
12956570
Filing Dt:
11/30/2010
Publication #:
Pub Dt:
03/24/2011
Title:
METHODS OF FORMING AND OPERATING BACK-SIDE TRAP NON-VOLATILE MEMORY CELLS
9
Patent #:
Issue Dt:
12/10/2013
Application #:
12956660
Filing Dt:
11/30/2010
Publication #:
Pub Dt:
05/31/2012
Title:
CODE PATCHING FOR NON-VOLATILE MEMORY
10
Patent #:
NONE
Issue Dt:
Application #:
12956742
Filing Dt:
11/30/2010
Publication #:
Pub Dt:
05/31/2012
Title:
RELIABLE WRITE FOR NON-VOLATILE MEMORY
11
Patent #:
Issue Dt:
06/28/2011
Application #:
12956791
Filing Dt:
11/30/2010
Publication #:
Pub Dt:
03/24/2011
Title:
SYSTEM AND METHOD FOR CONTROLLING TIMING OF OUTPUT SIGNALS
12
Patent #:
Issue Dt:
11/18/2014
Application #:
12956853
Filing Dt:
11/30/2010
Publication #:
Pub Dt:
05/31/2012
Title:
VERIFY OR READ PULSE FOR PHASE CHANGE MEMORY AND SWITCH
13
Patent #:
Issue Dt:
02/12/2013
Application #:
12956977
Filing Dt:
11/30/2010
Publication #:
Pub Dt:
03/24/2011
Title:
DATA PATH FOR MULTI-LEVEL CELL MEMORY, METHODS FOR STORING AND METHODS FOR UTILIZING A MEMORY ARRAY
14
Patent #:
Issue Dt:
12/18/2012
Application #:
12957081
Filing Dt:
11/30/2010
Publication #:
Pub Dt:
03/24/2011
Title:
USB DEVICE COMMUNICATION APPARATUS, SYSTEMS, AND METHODS
15
Patent #:
Issue Dt:
11/24/2015
Application #:
12957286
Filing Dt:
11/30/2010
Publication #:
Pub Dt:
06/02/2011
Title:
MEMORY INCLUDING A SELECTOR SWITCH ON A VARIABLE RESISTANCE MEMORY CELL
16
Patent #:
Issue Dt:
02/07/2017
Application #:
12957364
Filing Dt:
11/30/2010
Publication #:
Pub Dt:
05/31/2012
Title:
PRESERVING DATA INTEGRITY IN A MEMORY SYSTEM
17
Patent #:
Issue Dt:
05/21/2013
Application #:
12958259
Filing Dt:
12/01/2010
Publication #:
Pub Dt:
03/31/2011
Title:
ON-DIE SYSTEM AND METHOD FOR CONTROLLING TERMINATION IMPEDANCE OF MEMORY DEVICE DATA BUS TERMINALS
18
Patent #:
Issue Dt:
06/18/2013
Application #:
12958974
Filing Dt:
12/02/2010
Publication #:
Pub Dt:
06/07/2012
Title:
ASSEMBLIES INCLUDING HEAT SINK ELEMENTS AND METHODS OF ASSEMBLING
19
Patent #:
Issue Dt:
09/27/2016
Application #:
12959015
Filing Dt:
12/02/2010
Publication #:
Pub Dt:
06/07/2012
Title:
Array Of Nonvolatile Memory Cells Having At Least Five Memory Cells Per Unit Cell, Having A Plurality Of Unit Cells Which Individually Comprise Three Elevational Regions Of Programmable Material, And/Or Having A Continuous Volume Having A combination Of A Plurality Of Vertically Oriented Memory Cells And A Plurality Of Horizontally Oriented Memory Cells; Array Of Vertically Stacked Tiers Of Nonvolatile Memory Cells
20
Patent #:
Issue Dt:
07/03/2012
Application #:
12959678
Filing Dt:
12/03/2010
Publication #:
Pub Dt:
03/24/2011
Title:
SEMICONDUCTOR PROCESSING METHODS
21
Patent #:
Issue Dt:
07/23/2013
Application #:
12960204
Filing Dt:
12/03/2010
Publication #:
Pub Dt:
06/07/2012
Title:
TRANSACTION LOG RECOVERY
22
Patent #:
Issue Dt:
11/29/2011
Application #:
12960260
Filing Dt:
12/03/2010
Publication #:
Pub Dt:
04/07/2011
Title:
MEMORY CELL PROGRAMMING
23
Patent #:
Issue Dt:
01/24/2012
Application #:
12960291
Filing Dt:
12/03/2010
Publication #:
Pub Dt:
03/31/2011
Title:
MEMORY DEVICE BIT LINE SENSING SYSTEM AND METHOD THAT COMPENSATES FOR BIT LINE RESISTANCE VARIATIONS
24
Patent #:
Issue Dt:
10/11/2011
Application #:
12960301
Filing Dt:
12/03/2010
Publication #:
Pub Dt:
03/31/2011
Title:
SYMMETRICALLY OPERATING SINGLE-ENDED INPUT BUFFER DEVICES AND METHODS
25
Patent #:
Issue Dt:
09/08/2015
Application #:
12960308
Filing Dt:
12/03/2010
Publication #:
Pub Dt:
03/31/2011
Title:
CONSTANT DELAY ZERO STANDBY DIFFERENTIAL LOGIC RECEIVER AND METHOD
26
Patent #:
Issue Dt:
08/16/2011
Application #:
12960862
Filing Dt:
12/06/2010
Publication #:
Pub Dt:
04/07/2011
Title:
METHODS OF FABRICATING AN ACCESS TRANSISTOR HAVING A POLYSILICON-COMPRISING PLUG ON INDIVIDUAL OF OPPOSING SIDES OF GATE MATERIAL
27
Patent #:
Issue Dt:
07/22/2014
Application #:
12961262
Filing Dt:
12/06/2010
Publication #:
Pub Dt:
03/31/2011
Title:
HIGH SPEED RING/BUS
28
Patent #:
Issue Dt:
08/30/2011
Application #:
12961291
Filing Dt:
12/06/2010
Publication #:
Pub Dt:
03/31/2011
Title:
MEMORY SYSTEM AND METHOD USING STACKED MEMORY DEVICE DICE, AND SYSTEM USING THE MEMORY SYSTEM
29
Patent #:
Issue Dt:
06/12/2012
Application #:
12961307
Filing Dt:
12/06/2010
Publication #:
Pub Dt:
03/31/2011
Title:
TRANSMITTER APPARATUS, SYSTEMS, AND METHODS
30
Patent #:
Issue Dt:
05/29/2012
Application #:
12961370
Filing Dt:
12/06/2010
Publication #:
Pub Dt:
06/09/2011
Title:
EPITAXIAL FORMATION SUPPORT STRUCTURES AND ASSOCIATED METHODS
31
Patent #:
Issue Dt:
02/21/2012
Application #:
12965225
Filing Dt:
12/10/2010
Publication #:
Pub Dt:
04/07/2011
Title:
METHODS OF REDUCING DEFECT FORMATION ON SILICON DIOXIDE FORMED BY ATOMIC LAYER DEPOSITION (ALD) PROCESSES
32
Patent #:
NONE
Issue Dt:
Application #:
12965301
Filing Dt:
12/10/2010
Publication #:
Pub Dt:
04/07/2011
Title:
MICROFEATURE WORKPIECES AND METHODS FOR FORMING INTERCONNECTS IN MICROFEATURE WORKPIECES
33
Patent #:
Issue Dt:
06/11/2013
Application #:
12965322
Filing Dt:
12/10/2010
Publication #:
Pub Dt:
05/19/2011
Title:
ACTIVE PIXEL SENSOR WITH MIXED ANALOG AND DIGITAL SIGNAL INTEGRATION
34
Patent #:
Issue Dt:
08/09/2011
Application #:
12966430
Filing Dt:
12/13/2010
Publication #:
Pub Dt:
04/07/2011
Title:
METHOD FOR ERASING A SEMICONDUCTOR MAGNETIC MEMORY INTEGRATING A MAGNETIC TUNNELING JUNCTION ABOVE A FLOATING-GATE MEMORY CELL
35
Patent #:
Issue Dt:
12/31/2013
Application #:
12966582
Filing Dt:
12/13/2010
Publication #:
Pub Dt:
04/07/2011
Title:
MEMORY HAVING A VERTICAL ACCESS DEVICE
36
Patent #:
Issue Dt:
08/05/2014
Application #:
12967733
Filing Dt:
12/14/2010
Publication #:
Pub Dt:
06/21/2012
Title:
APPARATUSES AND DEVICES FOR ABSORBING ELECTROMAGNETIC RADIATION, AND METHODS OF FORMING THE APPARATUSES AND DEVICES
37
Patent #:
Issue Dt:
04/03/2012
Application #:
12968512
Filing Dt:
12/15/2010
Publication #:
Pub Dt:
04/07/2011
Title:
REMOVABLE STORAGE DEVICE
38
Patent #:
Issue Dt:
06/18/2013
Application #:
12968529
Filing Dt:
12/15/2010
Publication #:
Pub Dt:
04/07/2011
Title:
DYNAMICALLY CONFIGURABLE MLC STATE ASSIGNMENT
39
Patent #:
Issue Dt:
01/01/2013
Application #:
12968714
Filing Dt:
12/15/2010
Publication #:
Pub Dt:
06/21/2012
Title:
METHODS FOR SEGMENTED PROGRAMMING AND MEMORY DEVICES
40
Patent #:
Issue Dt:
01/01/2013
Application #:
12968747
Filing Dt:
12/15/2010
Publication #:
Pub Dt:
06/30/2011
Title:
SEMICONDUCTOR DEVICE
41
Patent #:
Issue Dt:
04/23/2013
Application #:
12969418
Filing Dt:
12/15/2010
Publication #:
Pub Dt:
04/14/2011
Title:
Methods of Forming Field Effect Transistors on Substrates
42
Patent #:
Issue Dt:
03/19/2013
Application #:
12970086
Filing Dt:
12/16/2010
Publication #:
Pub Dt:
06/21/2012
Title:
PHASE INTERPOLATORS AND PUSH-PULL BUFFERS
43
Patent #:
Issue Dt:
03/05/2013
Application #:
12970694
Filing Dt:
12/16/2010
Publication #:
Pub Dt:
04/14/2011
Title:
METHODS OF MANUFACTURING A HYBRID ELECTRICAL CONTACT
44
Patent #:
Issue Dt:
07/02/2013
Application #:
12970726
Filing Dt:
12/16/2010
Publication #:
Pub Dt:
06/21/2012
Title:
SOLID STATE LIGHTING DEVICES WITH ACCESSIBLE ELECTRODES AND METHODS OF MANUFACTURING
45
Patent #:
Issue Dt:
10/16/2012
Application #:
12971587
Filing Dt:
12/17/2010
Publication #:
Pub Dt:
04/21/2011
Title:
EXPANDED PROGRAMMING WINDOW FOR NON-VOLATILE MULTILEVEL MEMORY CELLS
46
Patent #:
Issue Dt:
03/18/2014
Application #:
12972232
Filing Dt:
12/17/2010
Publication #:
Pub Dt:
04/14/2011
Title:
ADDITIONAL METAL ROUTING IN SEMICONDUCTOR DEVICES
47
Patent #:
Issue Dt:
03/27/2012
Application #:
12973110
Filing Dt:
12/20/2010
Publication #:
Pub Dt:
04/28/2011
Title:
PROGRAMMING A FLASH MEMORY DEVICE
48
Patent #:
Issue Dt:
07/31/2012
Application #:
12973607
Filing Dt:
12/20/2010
Publication #:
Pub Dt:
04/14/2011
Title:
PACKAGED SEMICONDUCTOR ASSEMBLIES AND METHODS FOR MANUFACTURING SUCH ASSEMBLIES
49
Patent #:
Issue Dt:
04/02/2013
Application #:
12974939
Filing Dt:
12/21/2010
Publication #:
Pub Dt:
09/08/2011
Title:
TECHNIQUES FOR PROVIDING A SEMICONDUCTOR MEMORY DEVICE HAVING HIERARCHICAL BIT LINES
50
Patent #:
Issue Dt:
04/29/2014
Application #:
12975494
Filing Dt:
12/22/2010
Publication #:
Pub Dt:
06/28/2012
Title:
SINGLE CHECK MEMORY DEVICES AND METHODS
51
Patent #:
Issue Dt:
02/14/2012
Application #:
12975761
Filing Dt:
12/22/2010
Publication #:
Pub Dt:
04/21/2011
Title:
BURIED DECOUPLING CAPACITORS, DEVICES AND SYSTEMS INCLUDING SAME, AND METHODS OF FABRICATION
52
Patent #:
Issue Dt:
02/25/2014
Application #:
12976454
Filing Dt:
12/22/2010
Publication #:
Pub Dt:
04/21/2011
Title:
REFRESH ALGORITHM FOR MEMORIES
53
Patent #:
Issue Dt:
06/04/2013
Application #:
12976712
Filing Dt:
12/22/2010
Publication #:
Pub Dt:
04/21/2011
Title:
PROGRAMMING MANAGEMENT DATA FOR A MEMORY
54
Patent #:
Issue Dt:
01/08/2013
Application #:
12977969
Filing Dt:
12/23/2010
Publication #:
Pub Dt:
04/21/2011
Title:
TRANSISTOR GATE FORMING METHODS AND TRANSISTOR STRUCTURES
55
Patent #:
Issue Dt:
09/10/2013
Application #:
12978722
Filing Dt:
12/27/2010
Publication #:
Pub Dt:
06/28/2012
Title:
ARRAY ASSEMBLIES WITH HIGH VOLTAGE SOLID STATE LIGHTING DIES
56
Patent #:
Issue Dt:
01/15/2013
Application #:
12979142
Filing Dt:
12/27/2010
Publication #:
Pub Dt:
06/30/2011
Title:
SEMICONDUCTOR DEVICE AND LAYOUT DESIGN APPARATUS OF SEMICONDUCTOR DEVICE
57
Patent #:
Issue Dt:
04/30/2013
Application #:
12979189
Filing Dt:
12/27/2010
Publication #:
Pub Dt:
06/28/2012
Title:
METHODS OF FORMING A NONVOLATILE MEMORY CELL AND METHODS OF FORMING AN ARRAY OF NONVOLATILE MEMORY CELLS
58
Patent #:
Issue Dt:
12/20/2016
Application #:
12979461
Filing Dt:
12/28/2010
Publication #:
Pub Dt:
06/28/2012
Title:
PHASE CHANGE MEMORY DEVICE WITH VOLTAGE CONTROL ELEMENTS
59
Patent #:
Issue Dt:
08/20/2013
Application #:
12980141
Filing Dt:
12/28/2010
Publication #:
Pub Dt:
06/30/2011
Title:
DUAL RESISTANCE HEATER FOR PHASE CHANGE DEVICES AND MANUFACTURING METHOD THEREOF
60
Patent #:
Issue Dt:
04/09/2013
Application #:
12980766
Filing Dt:
12/29/2010
Publication #:
Pub Dt:
08/18/2011
Title:
TECHNIQUES FOR CONTROLLING A SEMICONDUCTOR MEMORY DEVICE
61
Patent #:
Issue Dt:
12/01/2015
Application #:
12981330
Filing Dt:
12/29/2010
Publication #:
Pub Dt:
04/28/2011
Title:
LOW-RESISTANCE INTERCONNECTS AND METHODS OF MAKING SAME
62
Patent #:
Issue Dt:
04/16/2013
Application #:
12981688
Filing Dt:
12/30/2010
Publication #:
Pub Dt:
04/28/2011
Title:
MULTI LEVEL INHIBIT SCHEME
63
Patent #:
Issue Dt:
09/25/2012
Application #:
12981842
Filing Dt:
12/30/2010
Publication #:
Pub Dt:
04/28/2011
Title:
MITIGATION OF RUNAWAY PROGRAMMING OF A MEMORY DEVICE
64
Patent #:
Issue Dt:
12/03/2013
Application #:
12981892
Filing Dt:
12/30/2010
Publication #:
Pub Dt:
04/28/2011
Title:
MICROELECTRONIC DEVICES AND METHODS FOR MANUFACTURING MICROELECTRONIC DEVICES
65
Patent #:
Issue Dt:
05/29/2012
Application #:
12982111
Filing Dt:
12/30/2010
Publication #:
Pub Dt:
07/07/2011
Title:
SHARING PHYSICAL MEMORY LOCATIONS IN MEMORY DEVICES
66
Patent #:
Issue Dt:
10/16/2012
Application #:
12982296
Filing Dt:
12/30/2010
Publication #:
Pub Dt:
04/28/2011
Title:
STACKABLE SEMICONDUCTOR ASSEMBLIES AND METHODS OF MANUFACTURING SUCH ASSEMBLIES
67
Patent #:
Issue Dt:
09/23/2014
Application #:
12982847
Filing Dt:
12/30/2010
Publication #:
Pub Dt:
07/05/2012
Title:
MEMORY DEVICE USING EXTENDED INTERFACE COMMANDS
68
Patent #:
Issue Dt:
01/24/2012
Application #:
12984370
Filing Dt:
01/04/2011
Publication #:
Pub Dt:
04/28/2011
Title:
FRACTIONAL-RATE DECISION FEEDBACK EQUALIZATION USEFUL IN A DATA TRANSMISSION SYSTEM
69
Patent #:
Issue Dt:
05/15/2012
Application #:
12984711
Filing Dt:
01/05/2011
Publication #:
Pub Dt:
04/28/2011
Title:
SYSTEM, APPARATUS, AND METHOD FOR MODIFYING THE ORDER OF MEMORY ACCESSES
70
Patent #:
Issue Dt:
04/02/2013
Application #:
12985191
Filing Dt:
01/05/2011
Publication #:
Pub Dt:
11/10/2011
Title:
TECHNIQUES FOR REFRESHING A SEMICONDUCTOR MEMORY DEVICE
71
Patent #:
Issue Dt:
02/07/2012
Application #:
12985236
Filing Dt:
01/05/2011
Publication #:
Pub Dt:
04/28/2011
Title:
MEMORY DEVICES HAVING REDUNDANT ARRAYS FOR REPAIR
72
Patent #:
Issue Dt:
10/23/2012
Application #:
12985570
Filing Dt:
01/06/2011
Publication #:
Pub Dt:
04/28/2011
Title:
METHODS FOR FABRICATING AND FILLING CONDUCTIVE VIAS AND CONDUCTIVE VIAS SO FORMED
73
Patent #:
Issue Dt:
04/09/2013
Application #:
12985787
Filing Dt:
01/06/2011
Publication #:
Pub Dt:
07/12/2012
Title:
MEMORY ADDRESS TRANSLATION
74
Patent #:
Issue Dt:
08/13/2013
Application #:
12986280
Filing Dt:
01/07/2011
Publication #:
Pub Dt:
07/12/2012
Title:
RECURSIVE SUMMATION ALGORITHMS USEFUL FOR STATISTICAL SIGNAL ANALYSIS OF TRANSMISSION OF SIGNALS IN A COMPUTER SYSTEM
75
Patent #:
Issue Dt:
10/02/2012
Application #:
12986422
Filing Dt:
01/07/2011
Publication #:
Pub Dt:
05/05/2011
Title:
APPARATUS AND METHOD FOR ELIMINATING ARTIFACTS IN ACTIVE PIXEL SENSOR (APS) IMAGERS
76
Patent #:
Issue Dt:
10/16/2012
Application #:
12986487
Filing Dt:
01/07/2011
Publication #:
Pub Dt:
04/28/2011
Title:
SEMICONDUCTOR CONSTRUCTIONS
77
Patent #:
Issue Dt:
10/30/2012
Application #:
12986663
Filing Dt:
01/07/2011
Publication #:
Pub Dt:
07/21/2011
Title:
SEMICONDUCTOR DEVICE AND DATA PROCESSING SYSTEM INCLUDING THE SAME
78
Patent #:
Issue Dt:
01/01/2013
Application #:
12986681
Filing Dt:
01/07/2011
Publication #:
Pub Dt:
07/21/2011
Title:
SEMICONDUCTOR DEVICE AND DATA PROCESSING SYSTEM INCLUDING THE SAME
79
Patent #:
Issue Dt:
10/01/2013
Application #:
12986770
Filing Dt:
01/07/2011
Publication #:
Pub Dt:
07/12/2012
Title:
SOLUTIONS FOR CLEANING SEMICONDUCTOR STRUCTURES AND RELATED METHODS
80
Patent #:
Issue Dt:
08/13/2013
Application #:
12986806
Filing Dt:
01/07/2011
Publication #:
Pub Dt:
07/12/2012
Title:
METHODS OF FORMING A PATTERNED, SILICON-ENRICHED DEVELOPABLE ANTIREFLECTIVE MATERIAL AND SEMICONDUCTOR DEVICE STRUCTURES INCLUDING THE SAME
81
Patent #:
Issue Dt:
05/14/2013
Application #:
12986836
Filing Dt:
01/07/2011
Publication #:
Pub Dt:
07/12/2012
Title:
IMAGING DEVICES, METHODS OF FORMING SAME, AND METHODS OF FORMING SEMICONDUCTOR DEVICE STRUCTURES
82
Patent #:
Issue Dt:
05/07/2013
Application #:
12986947
Filing Dt:
01/07/2011
Publication #:
Pub Dt:
05/05/2011
Title:
SYSTEM AND METHOD FOR OPTIMIZING INTERCONNECTIONS OF COMPONENTS IN A MULTICHIP MEMORY MODULE
83
Patent #:
Issue Dt:
04/03/2012
Application #:
12986973
Filing Dt:
01/07/2011
Publication #:
Pub Dt:
05/05/2011
Title:
DELAY LINES, METHODS FOR DELAYING A SIGNAL, AND DELAY LOCK LOOPS
84
Patent #:
Issue Dt:
01/15/2013
Application #:
12987890
Filing Dt:
01/10/2011
Publication #:
Pub Dt:
05/05/2011
Title:
PACKAGED MICRODEVICES AND METHODS FOR MANUFACTURING PACKAGED MICRODEVICES
85
Patent #:
Issue Dt:
06/03/2014
Application #:
12992062
Filing Dt:
03/02/2011
Publication #:
Pub Dt:
06/16/2011
Title:
REVERSING A POTENTIAL POLARITY FOR READING PHASE-CHANGE CELLS TO SHORTEN A RECOVERY DELAY AFTER PROGRAMMING
86
Patent #:
Issue Dt:
09/27/2011
Application #:
13004967
Filing Dt:
01/12/2011
Publication #:
Pub Dt:
05/12/2011
Title:
METHODS OF UTILIZING SILICON DIOXIDE-CONTAINING MASKING STRUCTURES
87
Patent #:
Issue Dt:
02/07/2012
Application #:
13005291
Filing Dt:
01/12/2011
Publication #:
Pub Dt:
05/05/2011
Title:
M+N BIT PROGRAMMING AND M+L BIT READ FOR M BIT MEMORY CELLS
88
Patent #:
Issue Dt:
09/04/2012
Application #:
13005453
Filing Dt:
01/12/2011
Publication #:
Pub Dt:
05/05/2011
Title:
LOW VOLTAGE SENSING SCHEME HAVING REDUCED ACTIVE POWER DOWN STANDBY CURRENT
89
Patent #:
Issue Dt:
05/07/2013
Application #:
13006111
Filing Dt:
01/13/2011
Publication #:
Pub Dt:
07/19/2012
Title:
POWER SUPPLY INDUCED SIGNAL JITTER COMPENSATION
90
Patent #:
Issue Dt:
11/05/2013
Application #:
13006240
Filing Dt:
01/13/2011
Publication #:
Pub Dt:
07/19/2012
Title:
DETERMINING LOCATION OF ERROR DETECTION DATA
91
Patent #:
Issue Dt:
05/07/2013
Application #:
13007002
Filing Dt:
01/14/2011
Publication #:
Pub Dt:
05/12/2011
Title:
INTERCONNECT STRUCTURES FOR STACKED DIES, INCLUDING PENETRATING STRUCTURES FOR THROUGH-SILICON VIAS, AND ASSOCIATED SYSTEMS AND METHODS
92
Patent #:
Issue Dt:
01/22/2013
Application #:
13007274
Filing Dt:
01/14/2011
Publication #:
Pub Dt:
07/19/2012
Title:
METHODS, DEVICES, AND SYSTEMS FOR ADJUSTING SENSING VOLTAGES IN DEVICES
93
Patent #:
Issue Dt:
02/07/2012
Application #:
13007307
Filing Dt:
01/14/2011
Publication #:
Pub Dt:
05/12/2011
Title:
MULTI-PHASE DUTY-CYCLE CORRECTED CLOCK SIGNAL GENERATOR AND MEMORY HAVING SAME
94
Patent #:
Issue Dt:
12/06/2011
Application #:
13007340
Filing Dt:
01/14/2011
Publication #:
Pub Dt:
05/12/2011
Title:
CONTROL VOLTAGE TRACKING CIRCUITS, METHODS FOR RECORDING A CONTROL VOLTAGE FOR A CLOCK SYNCHRONIZATION CIRCUIT AND METHODS FOR SETTING A VOLTAGE CONTROLLED DELAY
95
Patent #:
Issue Dt:
08/07/2012
Application #:
13007361
Filing Dt:
01/14/2011
Publication #:
Pub Dt:
05/12/2011
Title:
WORD LINE DRIVERS IN NON-VOLATILE MEMORY DEVICE AND METHOD HAVING A SHARED POWER BANK AND PROCESSOR-BASED SYSTEMS USING SAME
96
Patent #:
Issue Dt:
11/08/2011
Application #:
13007743
Filing Dt:
01/17/2011
Publication #:
Pub Dt:
05/12/2011
Title:
SEMICONDUCTOR COMPONENT HAVING THROUGH WIRE INTERCONNECT WITH COMPRESSED BUMP
97
Patent #:
Issue Dt:
05/06/2014
Application #:
13007923
Filing Dt:
01/17/2011
Publication #:
Pub Dt:
05/12/2011
Title:
MEMORY DEVICE WITH ERROR DETECTION
98
Patent #:
Issue Dt:
08/14/2012
Application #:
13007971
Filing Dt:
01/17/2011
Publication #:
Pub Dt:
05/12/2011
Title:
NON-VOLATILE MULTILEVEL MEMORY CELLS WITH DATA READ OF REFERENCE CELLS
99
Patent #:
Issue Dt:
07/30/2013
Application #:
13008726
Filing Dt:
01/18/2011
Publication #:
Pub Dt:
05/26/2011
Title:
ZRXHFYSN1-X-YO2 FILMS AS HIGH K GATE DIELECTRICS
100
Patent #:
Issue Dt:
02/12/2013
Application #:
13009540
Filing Dt:
01/19/2011
Publication #:
Pub Dt:
07/19/2012
Title:
SENSE OPERATION IN A MEMORY DEVICE
Assignor
1
Exec Dt:
06/29/2018
Assignee
1
8000 S. FEDERAL WAY
BOISE, IDAHO 83707
Correspondence name and address
WSGR, C/O QUI LU FLOOD, SENIOR PARALEGAL
ONE MARKET, SPEAR TOWER, SUITE 3300
SAN FRANCISCO, CA 94105

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