|
|
Patent #:
|
|
Issue Dt:
|
12/29/1998
|
Application #:
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08961368
|
Filing Dt:
|
10/30/1997
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Title:
|
PROTECTION CIRCUIT FOR REDUNDANCY REGISTER SET-UP CELLS OF ELECTRICALLY PROGRAMMABLE NON-VOLATILE MEMORY DEVICES
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|
|
Patent #:
|
|
Issue Dt:
|
10/27/1998
|
Application #:
|
08961698
|
Filing Dt:
|
10/31/1997
|
Title:
|
METHOD FOR PROVIDING AND OPERATING UPGRADEABLE CACHE CIRCUITRY
|
|
|
Patent #:
|
|
Issue Dt:
|
11/16/1999
|
Application #:
|
08961758
|
Filing Dt:
|
10/31/1997
|
Title:
|
METHOD OF USING AN ELECTRICALLY CONDUCTIVE ELEVATION SHAPING TOOL
|
|
|
Patent #:
|
|
Issue Dt:
|
10/26/1999
|
Application #:
|
08961781
|
Filing Dt:
|
10/31/1997
|
Title:
|
HIGH VOLTAGE PROTECTION FOR AN INTEGRATED CIRCUIT INPUT BUFFER
|
|
|
Patent #:
|
|
Issue Dt:
|
08/17/1999
|
Application #:
|
08962512
|
Filing Dt:
|
10/31/1997
|
Title:
|
SHIELDED PACKAGE FOR MAGNETIC DEVICES
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|
|
Patent #:
|
|
Issue Dt:
|
11/09/1999
|
Application #:
|
08962518
|
Filing Dt:
|
10/31/1997
|
Title:
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MRAM DESIGN TO REDUCE DISSIMILAR NEAREST NEIGHBOR EFFECTS
|
|
|
Patent #:
|
|
Issue Dt:
|
11/23/1999
|
Application #:
|
08963103
|
Filing Dt:
|
11/03/1997
|
Title:
|
HIGH RESISTIVITY INTEGRATED CIRCUIT RESISTOR
|
|
|
Patent #:
|
|
Issue Dt:
|
04/04/2000
|
Application #:
|
08964091
|
Filing Dt:
|
11/04/1997
|
Title:
|
A SEMICONDUCTOR CHIP PACKAGE COMPRISIG A DIE ATTACH STRUCTURE AND A DOWNSET
|
|
|
Patent #:
|
|
Issue Dt:
|
03/21/2000
|
Application #:
|
08964164
|
Filing Dt:
|
11/04/1997
|
Title:
|
FIELD-EFFECT TRANSISTOR FOR ONE-TIME PROGRAMMABLE NONVOLATILE MEMORY ELEMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
11/16/1999
|
Application #:
|
08964619
|
Filing Dt:
|
11/05/1997
|
Title:
|
APPARATUS FOR COOLING CENTRAL PROCESSING UNITS IN PERSONAL COMPUTERS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/03/1999
|
Application #:
|
08964779
|
Filing Dt:
|
11/05/1997
|
Title:
|
METHOD OF FORMING A FIELD EFFECT TRANSISTOR
|
|
|
Patent #:
|
|
Issue Dt:
|
03/23/1999
|
Application #:
|
08964801
|
Filing Dt:
|
11/06/1997
|
Title:
|
METHOD FOR REMOVABLY COUPLING A PLURALITY OF STRUCTURES
|
|
|
Patent #:
|
|
Issue Dt:
|
10/19/1999
|
Application #:
|
08964937
|
Filing Dt:
|
11/05/1997
|
Title:
|
METHOD AND SYSTEM FOR COMMUNICATING BETWEEN USERS OF A PRODUCTIVITY TRACKING SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
01/18/2000
|
Application #:
|
08965068
|
Filing Dt:
|
11/05/1997
|
Title:
|
BICMOS NEGATIVE CHARGE PUMP
|
|
|
Patent #:
|
|
Issue Dt:
|
11/16/1999
|
Application #:
|
08965143
|
Filing Dt:
|
11/06/1997
|
Title:
|
SEMICONDUCTOR STRUCTURE HAVING AN OPTICAL SIGNAL PATH IN A SUBSTRATE AND METHOD FOR FORMING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
06/27/2000
|
Application #:
|
08965253
|
Filing Dt:
|
11/06/1997
|
Title:
|
METHOD AND APPARATUS TO ACHIEVE FAST SUSPEND IN FLASH MEMORIES
|
|
|
Patent #:
|
|
Issue Dt:
|
11/23/1999
|
Application #:
|
08965629
|
Filing Dt:
|
11/06/1997
|
Title:
|
DEVICE FOR REMOVABLY COUPLING A PLURALITY OF STRUCTURES
|
|
|
Patent #:
|
|
Issue Dt:
|
04/25/2000
|
Application #:
|
08965695
|
Filing Dt:
|
11/07/1997
|
Title:
|
ADAPTOR TOOL FOR MOUNTING COMPONENTS ON PRINTED CIRCUIT BOARDS
|
|
|
Patent #:
|
|
Issue Dt:
|
05/18/1999
|
Application #:
|
08965758
|
Filing Dt:
|
11/07/1997
|
Title:
|
METHOD OF MOUNTING COMPONENTS ON PRINTED CIRCUIT BOARDS
|
|
|
Patent #:
|
|
Issue Dt:
|
02/28/2006
|
Application #:
|
08966761
|
Filing Dt:
|
11/10/1997
|
Title:
|
ERGONOMIC COMPUTER MOUSE
|
|
|
Patent #:
|
|
Issue Dt:
|
11/23/1999
|
Application #:
|
08966945
|
Filing Dt:
|
11/10/1997
|
Title:
|
SELECTIVE ETCHING OF OXDES
|
|
|
Patent #:
|
|
Issue Dt:
|
08/15/2000
|
Application #:
|
08967354
|
Filing Dt:
|
11/07/1997
|
Title:
|
FORMATION OF PLANAR DIELECTRIC LAYERS USING LIQUID INTERFACES
|
|
|
Patent #:
|
|
Issue Dt:
|
05/16/2000
|
Application #:
|
08967766
|
Filing Dt:
|
11/10/1997
|
Title:
|
METHODS FOR FORMING SILICON NITRIDE LAYERS ON SILICON-COMPRISING SUBSTRATES
|
|
|
Patent #:
|
|
Issue Dt:
|
10/12/1999
|
Application #:
|
08968382
|
Filing Dt:
|
11/12/1997
|
Title:
|
METHOD TO FORM A DRAM CAPACITOR USING LOW TEMPERATURE REOXIDATION
|
|
|
Patent #:
|
|
Issue Dt:
|
12/21/1999
|
Application #:
|
08968439
|
Filing Dt:
|
11/12/1997
|
Title:
|
DEVICE AND METHOD FOR REPAIRING A SEMICONDUCTOR MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
04/04/2000
|
Application #:
|
08968564
|
Filing Dt:
|
11/12/1997
|
Title:
|
METHOD FOR FORMING A CONTACT DURING THE FORMATION OF A SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
05/15/2001
|
Application #:
|
08969099
|
Filing Dt:
|
11/13/1997
|
Title:
|
MEMORY USING INSULATOR TRAPS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/04/2000
|
Application #:
|
08969190
|
Filing Dt:
|
11/13/1997
|
Title:
|
METHOD FOR SUPPORTING A FIRST COMPUTER COMPONENT RELATIVE TO A SECOND COMPUTER COMPONENT
|
|
|
Patent #:
|
|
Issue Dt:
|
12/17/2002
|
Application #:
|
08969208
|
Filing Dt:
|
11/12/1997
|
Title:
|
INSULATOR FOR ELECTRICAL STRUCTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
09/19/2000
|
Application #:
|
08969638
|
Filing Dt:
|
11/13/1997
|
Title:
|
DEVICE FOR SUPPORTING A FIRST COMPUTER COMPONENT RELATIVE TO A SECOND COMPUTER COMPONENT
|
|
|
Patent #:
|
|
Issue Dt:
|
01/16/2001
|
Application #:
|
08970345
|
Filing Dt:
|
11/14/1997
|
Title:
|
SEMICONDUCTOR PROCESSING METHODS OF FORMING INTEGRATED CIRCUITRY MEMORY DEVICES, METHODS OF FORMING CAPACITOR CONTAINERS, METHODS OF MAKING ELECTRICAL CONNECTION TO CIRCUIT NODES AND RELATED INTEGRATED CIRCUITRY
|
|
|
Patent #:
|
|
Issue Dt:
|
07/13/1999
|
Application #:
|
08970347
|
Filing Dt:
|
11/14/1997
|
Title:
|
METHOD OF FORMING CMOS CIRCUITRY INCLUDING PATTERNING A LAYER OF CONDUCTIVE MATERIAL OVERLYING FIELD ISOLATION OXIDE
|
|
|
Patent #:
|
|
Issue Dt:
|
01/19/1999
|
Application #:
|
08970445
|
Filing Dt:
|
11/14/1997
|
Title:
|
DEVICE FOR PROTECTION AFTER A PAGE-WRITE OPERATION IN AN ELECTRICALLY PROGRAMMABLE MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
05/18/1999
|
Application #:
|
08970909
|
Filing Dt:
|
11/14/1997
|
Title:
|
METHOD FOR CONTROLLING ACCESS TO A COMPUTER BUS
|
|
|
Patent #:
|
|
Issue Dt:
|
01/16/2001
|
Application #:
|
08970932
|
Filing Dt:
|
11/14/1997
|
Title:
|
TECHNIQUE FOR PRODUCING SMALL ISLANDS OF SILICON ON INSULATOR
|
|
|
Patent #:
|
|
Issue Dt:
|
04/10/2001
|
Application #:
|
08971372
|
Filing Dt:
|
11/17/1997
|
Title:
|
METHOD AND SYSTEM FOR INCREASING THE PERFORMANCE OF CONSTANT ANGULAR VELOCITY CD-ROM DRIVES
|
|
|
Patent #:
|
|
Issue Dt:
|
10/31/2000
|
Application #:
|
08971594
|
Filing Dt:
|
11/17/1997
|
Title:
|
SELF-BOOTING TEST CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
03/16/1999
|
Application #:
|
08971785
|
Filing Dt:
|
11/17/1997
|
Title:
|
CLOCK FREQUENCY DETECTOR FOR A SYNCHRONOUS MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
10/12/1999
|
Application #:
|
08971869
|
Filing Dt:
|
11/19/1997
|
Title:
|
INTERMETAL DIELECTRIC PLANARIZATION BY METAL FEATURES LAYOUT MODIFICATION
|
|
|
Patent #:
|
|
Issue Dt:
|
08/15/2000
|
Application #:
|
08971870
|
Filing Dt:
|
11/19/1997
|
Title:
|
DUAL- MASKED FIELD ISOLATION
|
|
|
Patent #:
|
|
Issue Dt:
|
11/14/2000
|
Application #:
|
08971974
|
Filing Dt:
|
11/17/1997
|
Title:
|
INTER-MODULE BUFFER DETERMINATION METHODOLOGY FOR ASIC SYNTHESIS
|
|
|
Patent #:
|
|
Issue Dt:
|
06/06/2000
|
Application #:
|
08972088
|
Filing Dt:
|
11/17/1997
|
Title:
|
MICROMACHINED SILICON PROBE CARD FOR SEMICONDUCTOR DICE AND METHOD OF FABRICATION
|
|
|
Patent #:
|
|
Issue Dt:
|
08/03/1999
|
Application #:
|
08972288
|
Filing Dt:
|
11/18/1997
|
Title:
|
METHOD AND APPARATUS FOR REDUCING FIXED CHARGE IN SEMICONDUCTOR DEVICE LAYERS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/18/2000
|
Application #:
|
08972628
|
Filing Dt:
|
11/18/1997
|
Title:
|
ELECTROSTATIC DISCHARGE SAFE WORK STATION
|
|
|
Patent #:
|
|
Issue Dt:
|
01/30/2001
|
Application #:
|
08974542
|
Filing Dt:
|
11/19/1997
|
Title:
|
METHOD FOR MOUNTING A COMPONENT TO A PRINTED CIRCUIT ASSEMBLY
|
|
|
Patent #:
|
|
Issue Dt:
|
02/29/2000
|
Application #:
|
08974543
|
Filing Dt:
|
11/19/1997
|
Title:
|
COMPONENT MOUNTING MODULE FOR PRINTED CIRCUIT ASSEMBLIES
|
|
|
Patent #:
|
|
Issue Dt:
|
02/23/1999
|
Application #:
|
08975381
|
Filing Dt:
|
11/20/1997
|
Title:
|
MEMORY DEVICE COMMUNICATION LINE CONTROL
|
|
|
Patent #:
|
|
Issue Dt:
|
05/09/2000
|
Application #:
|
08976846
|
Filing Dt:
|
11/24/1997
|
Title:
|
CARRIER HAVING SLIDE CONNECTORS FOR TESTING UNPACKAGED SEMICONDUCTOR DICE
|
|
|
Patent #:
|
|
Issue Dt:
|
12/14/1999
|
Application #:
|
08976927
|
Filing Dt:
|
11/24/1997
|
Title:
|
METHOD FOR FORMING BUMPS ON A SEMICONDUCTOR DIE USING APPLIED VOLTAGE PULSES TO AN ALUMINUM WIRE
|
|
|
Patent #:
|
|
Issue Dt:
|
10/03/2000
|
Application #:
|
08977251
|
Filing Dt:
|
11/24/1997
|
Title:
|
HIGH SELECTIVITY ETCHING PROCESS FOR OXIDES
|
|
|
Patent #:
|
|
Issue Dt:
|
04/11/2000
|
Application #:
|
08977312
|
Filing Dt:
|
11/24/1997
|
Title:
|
METHOD FOR ALIGNING AND CONNECTING SEMICONDUCTOR COMPONENTS TO SUBSTRATES
|
|
|
Patent #:
|
|
Issue Dt:
|
05/09/2000
|
Application #:
|
08977339
|
Filing Dt:
|
11/24/1997
|
Title:
|
SUPER-VOLTAGE CIRCUIT WITH A FAST RESET
|
|
|
Patent #:
|
|
Issue Dt:
|
08/22/2000
|
Application #:
|
08977560
|
Filing Dt:
|
11/25/1997
|
Title:
|
METHOD FOR PERSONAL COMPUTER-BASED HOME SURVEILLANCE
|
|
|
Patent #:
|
|
Issue Dt:
|
05/11/1999
|
Application #:
|
08977757
|
Filing Dt:
|
11/25/1997
|
Title:
|
VARIABLE EQUILIBRATE VOLTAGE CIRCUIT FOR PAIRED DIGIT LINES
|
|
|
Patent #:
|
|
Issue Dt:
|
05/16/2000
|
Application #:
|
08977783
|
Filing Dt:
|
11/25/1997
|
Title:
|
OXIDE ETCH AND METHOD OF ETCHING
|
|
|
Patent #:
|
|
Issue Dt:
|
10/05/1999
|
Application #:
|
08977786
|
Filing Dt:
|
11/25/1997
|
Title:
|
ALUMINUM FILM AND METHOD OF FORMING
|
|
|
Patent #:
|
|
Issue Dt:
|
12/26/2000
|
Application #:
|
08977854
|
Filing Dt:
|
11/25/1997
|
Title:
|
TRENCH ISOLATION METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
01/23/2001
|
Application #:
|
08977868
|
Filing Dt:
|
11/25/1997
|
Title:
|
A METHOD FOR MAKING A FLOATING GATE MEMORY WITH IMPROVED INTERPOLY DIELECTRIC
|
|
|
Patent #:
|
|
Issue Dt:
|
04/08/2003
|
Application #:
|
08977869
|
Filing Dt:
|
11/25/1997
|
Title:
|
ADJUSTABLE WAFER TRANSFER MACHINE
|
|
|
Patent #:
|
|
Issue Dt:
|
05/16/2000
|
Application #:
|
08978246
|
Filing Dt:
|
11/25/1997
|
Title:
|
PERSONAL COMPUTER-BASED HOME SECURITY SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
09/19/2000
|
Application #:
|
08978342
|
Filing Dt:
|
11/25/1997
|
Title:
|
DRAM CAPACITOR ARRAYS WITH 3-CAPACITOR AND 6-CAPACITOR GEOMETRIES
|
|
|
Patent #:
|
|
Issue Dt:
|
03/14/2000
|
Application #:
|
08978501
|
Filing Dt:
|
11/25/1997
|
Title:
|
HEADER PIN PRE-LOADED METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
12/14/1999
|
Application #:
|
08978535
|
Filing Dt:
|
11/26/1997
|
Title:
|
A METHOD OF FORMING A FIDUCIAL FOR ALIGNING AN INTEGRATED CIRCUIT DIE
|
|
|
Patent #:
|
|
Issue Dt:
|
03/23/1999
|
Application #:
|
08978665
|
Filing Dt:
|
11/26/1997
|
Title:
|
METHOD AND CIRCUIT FOR GENERATING A SYNCHRONIZING ATD SIGNAL
|
|
|
Patent #:
|
|
Issue Dt:
|
05/11/1999
|
Application #:
|
08978734
|
Filing Dt:
|
11/26/1997
|
Title:
|
OP AMP CIRCUIT WITH VARIABLE RESISTANCE AND MEMORY SYSTEM INCLUDING INCLUDING SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
03/27/2001
|
Application #:
|
08978790
|
Filing Dt:
|
11/26/1997
|
Title:
|
PIGGYBACK MULTIPLE DICE ASSEMBLY
|
|
|
Patent #:
|
|
Issue Dt:
|
11/02/1999
|
Application #:
|
08979579
|
Filing Dt:
|
11/26/1997
|
Title:
|
SYSTEM FOR SPECULATIVE BRANCH TARGET PREDICITION HAVING A DYNAMIC PREDICITION HISTORY BUFFER AND A STATIC PREDICTION HISTORY BUFFER
|
|
|
Patent #:
|
|
Issue Dt:
|
12/07/1999
|
Application #:
|
08979721
|
Filing Dt:
|
11/26/1997
|
Title:
|
LEAD FRAME CASING
|
|
|
Patent #:
|
|
Issue Dt:
|
10/05/1999
|
Application #:
|
08979894
|
Filing Dt:
|
11/26/1997
|
Title:
|
APPARATUS FOR ESTABLISHING REFERENCE COORDINATES FOR A POINT ON A CONPONENT
|
|
|
Patent #:
|
|
Issue Dt:
|
11/07/2000
|
Application #:
|
08980151
|
Filing Dt:
|
11/26/1997
|
Title:
|
INNER-DIGITIZED BOND FINGERS ON BUS BARS OF SEMICONDUCTOR DEVICE PACKAGE
|
|
|
Patent #:
|
|
Issue Dt:
|
01/04/2000
|
Application #:
|
08980195
|
Filing Dt:
|
11/26/1997
|
Title:
|
CIRCUIT AND METHOD FOR THE ERASURE OF A NON-VOLATILE AND ELECTRICALLY ERASABLE MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
05/30/2000
|
Application #:
|
08980466
|
Filing Dt:
|
11/28/1997
|
Title:
|
COMPLIANT INTERCONNECT FOR TESTING A SEMICONDUCTOR DIE
|
|
|
Patent #:
|
|
Issue Dt:
|
03/07/2000
|
Application #:
|
08980528
|
Filing Dt:
|
12/01/1997
|
Title:
|
MUTLI-STATE FLASH MEMORY DEFECT MANAGEMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
09/21/1999
|
Application #:
|
08980529
|
Filing Dt:
|
12/01/1997
|
Title:
|
PROGRAMMING PULSE WITH VARYING AMPLITUDE
|
|
|
Patent #:
|
|
Issue Dt:
|
07/13/1999
|
Application #:
|
08980932
|
Filing Dt:
|
12/01/1997
|
Title:
|
WAFER SAMPLE RETAINER FOR AN ELECTRON MICROSCOPE
|
|
|
Patent #:
|
|
Issue Dt:
|
01/11/2000
|
Application #:
|
08982084
|
Filing Dt:
|
12/01/1997
|
Title:
|
USING A DATABASE FOR MANAGING SOLUTIONS TO PROBLEMS
|
|
|
Patent #:
|
|
Issue Dt:
|
04/27/1999
|
Application #:
|
08982197
|
Filing Dt:
|
12/01/1997
|
Title:
|
VOLTAGE AND TEMPERATURE COMPENSATED RING OSCILLATOR FOR A MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
11/23/1999
|
Application #:
|
08982573
|
Filing Dt:
|
12/02/1997
|
Title:
|
REVERSE ORIENTED PROCESSOR CONFIGURATION
|
|
|
Patent #:
|
|
Issue Dt:
|
07/18/2000
|
Application #:
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08984115
|
Filing Dt:
|
12/03/1997
|
Title:
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METHOD FOR USE OF BUS PARKING STATES TO COMMUNICATE DIAGNOSTIC INFORMATION
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|
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Patent #:
|
|
Issue Dt:
|
02/08/2000
|
Application #:
|
08984247
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Filing Dt:
|
12/03/1997
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Title:
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METHOD FOR TESTING SEMICONDUCTOR INTERCONNECT USING TEST STRUCTURES ON THE INTERCONNECT
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Patent #:
|
|
Issue Dt:
|
08/29/2000
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Application #:
|
08984393
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Filing Dt:
|
12/03/1997
|
Title:
|
SYSTEM FOR USE OF BUS PARKING STATES TO COMMUNICATE DIAGNOSTIC INFORMATION
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|
|
Patent #:
|
|
Issue Dt:
|
09/05/2006
|
Application #:
|
08984560
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Filing Dt:
|
12/03/1997
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Title:
|
BURST/PIPELINED EDO MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
09/02/2003
|
Application #:
|
08984561
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Filing Dt:
|
12/03/1997
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Publication #:
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|
Pub Dt:
|
11/22/2001
| | | | |
Title:
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METHOD FOR SWITCHING BETWEEN MODES OF OPERATION
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|
|
Patent #:
|
|
Issue Dt:
|
10/17/2006
|
Application #:
|
08984562
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Filing Dt:
|
12/03/1997
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Title:
|
MEMORY DEVICE FOR BURST OR PIPELINED OPERTION WITH MODE SELECTION CIRCUTRY
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|
|
Patent #:
|
|
Issue Dt:
|
09/05/2000
|
Application #:
|
08984726
|
Filing Dt:
|
12/04/1997
|
Title:
|
METHOD OF SELECTING LAYOUT OF INTEGRATED CIRCUIT PROBE CARD
|
|
|
Patent #:
|
|
Issue Dt:
|
02/02/1999
|
Application #:
|
08984766
|
Filing Dt:
|
12/04/1997
|
Title:
|
QUAD FLAT PACK INTEGRATED CIRCUIT PACKAGE
|
|
|
Patent #:
|
|
Issue Dt:
|
05/23/2000
|
Application #:
|
08985088
|
Filing Dt:
|
12/04/1997
|
Title:
|
METHOD FOR FORMING A SEMICONDUCTOR CONNECTION WITH A TOP SURFACE HAVING AN ENLARGED RECESS
|
|
|
Patent #:
|
|
Issue Dt:
|
09/14/1999
|
Application #:
|
08985588
|
Filing Dt:
|
12/05/1997
|
Title:
|
METHOD FOR FORMING A SELF-ALIGNED ISOLATION TRENCH
|
|
|
Patent #:
|
|
Issue Dt:
|
09/14/1999
|
Application #:
|
08985791
|
Filing Dt:
|
12/05/1997
|
Title:
|
CONTACTING ELEMENT FOR GROUNDING A PRINTED CIRCUIT BOARD TO A CHASSIS
|
|
|
Patent #:
|
|
Issue Dt:
|
09/14/1999
|
Application #:
|
08985792
|
Filing Dt:
|
12/05/1997
|
Title:
|
METHOD FOR GROUNDING A PRINTED CIRCUIT BOARD USING A SEPARATE METALLIC CONTACTING ELEMENT PRESSED AGAINST A METALLIC CHASSIS
|
|
|
Patent #:
|
|
Issue Dt:
|
02/15/2000
|
Application #:
|
08986428
|
Filing Dt:
|
12/08/1997
|
Title:
|
METHOD OF REMOVING SURFACE DEFECTS OR OTHER RECESSES DURING THE FORMATION OF A SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
01/11/2000
|
Application #:
|
08986541
|
Filing Dt:
|
12/08/1997
|
Title:
|
SOLDERED INTEGRATED CIRCUIT CONNECTIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
12/28/1999
|
Application #:
|
08987000
|
Filing Dt:
|
12/08/1997
|
Title:
|
CONTROLLING IMPEDANCES OF AN INTEGRATED CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
01/11/2000
|
Application #:
|
08987186
|
Filing Dt:
|
12/08/1997
|
Title:
|
APPARATUS FOR MANAGING CABLES
|
|
|
Patent #:
|
|
Issue Dt:
|
10/17/2000
|
Application #:
|
08987279
|
Filing Dt:
|
12/09/1997
|
Title:
|
METHOD AND APPARATUS OF RESOLVING A DEADLOCK BY COLLAPSING WRITEBACKS TO A MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
05/29/2001
|
Application #:
|
08987454
|
Filing Dt:
|
12/09/1997
|
Title:
|
PROCESS FOR REALIZING AN INTERMEDIATE DIELECTRIC LAYER FOR ENHANCING THE PLANARITY IN SEMICONDUCTOR ELECTRONIC DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
11/02/1999
|
Application #:
|
08987678
|
Filing Dt:
|
12/09/1997
|
Title:
|
ENHANCED LOW VOLTAGE TTL INTERFACE
|
|
|
Patent #:
|
|
Issue Dt:
|
12/21/1999
|
Application #:
|
08987819
|
Filing Dt:
|
12/10/1997
|
Title:
|
TRANSISTORS HAVING CONTROLLED CONDUCTIVE SPACERS, USES OF SUCH TRANSISTORS AND METHODS OF MAKING SUCH TRANSISTORS
|
|
|
Patent #:
|
|
Issue Dt:
|
04/11/2000
|
Application #:
|
08987892
|
Filing Dt:
|
12/10/1997
|
Title:
|
RETENTIVE RIBBON CABLE CONNECTOR
|
|
|
Patent #:
|
|
Issue Dt:
|
11/09/1999
|
Application #:
|
08988102
|
Filing Dt:
|
12/10/1997
|
Title:
|
INTEGRATED CIRCUIT INTERPOSER WITH POWER AND GROUND PLANES
|
|