|
|
Patent #:
|
|
Issue Dt:
|
08/27/2013
|
Application #:
|
13477830
|
Filing Dt:
|
05/22/2012
|
Publication #:
|
|
Pub Dt:
|
09/13/2012
| | | | |
Title:
|
DATA BUS POWER-REDUCED SEMICONDUCTOR STORAGE APPARATUS
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13478010
|
Filing Dt:
|
05/22/2012
|
Publication #:
|
|
Pub Dt:
|
11/28/2013
| | | | |
Title:
|
Semiconductor Constructions and Methods of Forming Semiconductor Constructions
|
|
|
Patent #:
|
|
Issue Dt:
|
05/12/2015
|
Application #:
|
13478750
|
Filing Dt:
|
05/23/2012
|
Publication #:
|
|
Pub Dt:
|
09/20/2012
| | | | |
Title:
|
ACTIVE MEMORY COMMAND ENGINE AND METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
12/17/2013
|
Application #:
|
13479544
|
Filing Dt:
|
05/24/2012
|
Publication #:
|
|
Pub Dt:
|
09/13/2012
| | | | |
Title:
|
METHOD AND APPARATUS PROVIDING ANALYTICAL DEVICE AND OPERATING METHOD BASED ON SOLID STATE IMAGE SENSOR
|
|
|
Patent #:
|
|
Issue Dt:
|
09/17/2013
|
Application #:
|
13480378
|
Filing Dt:
|
05/24/2012
|
Publication #:
|
|
Pub Dt:
|
09/13/2012
| | | | |
Title:
|
RANDOM TELEGRAPH SIGNAL NOISE REDUCTION SCHEME FOR SEMICONDUCTOR MEMORIES
|
|
|
Patent #:
|
|
Issue Dt:
|
08/20/2013
|
Application #:
|
13480528
|
Filing Dt:
|
05/25/2012
|
Publication #:
|
|
Pub Dt:
|
09/13/2012
| | | | |
Title:
|
STACKED SEMICONDUCTOR COMPONENT HAVING THROUGH WIRE INTERCONNECT (TWI) WITH COMPRESSED WIRE
|
|
|
Patent #:
|
|
Issue Dt:
|
04/08/2014
|
Application #:
|
13480610
|
Filing Dt:
|
05/25/2012
|
Publication #:
|
|
Pub Dt:
|
11/28/2013
| | | | |
Title:
|
Memory Cells And Methods Of Forming Memory Cells
|
|
|
Patent #:
|
|
Issue Dt:
|
10/08/2013
|
Application #:
|
13480677
|
Filing Dt:
|
05/25/2012
|
Title:
|
METHODS OF FORMING SEMICONDUCTOR CONSTRUCTIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
01/28/2014
|
Application #:
|
13480701
|
Filing Dt:
|
05/25/2012
|
Publication #:
|
|
Pub Dt:
|
09/13/2012
| | | | |
Title:
|
MAINTENANCE OF AMPLIFIED SIGNALS USING HIGH-VOLTAGE-THRESHOLD TRANSISTORS
|
|
|
Patent #:
|
|
Issue Dt:
|
04/07/2015
|
Application #:
|
13481623
|
Filing Dt:
|
05/25/2012
|
Publication #:
|
|
Pub Dt:
|
09/13/2012
| | | | |
Title:
|
DATA SECURITY FOR DIGITAL DATA STORAGE
|
|
|
Patent #:
|
|
Issue Dt:
|
09/20/2016
|
Application #:
|
13482176
|
Filing Dt:
|
05/29/2012
|
Publication #:
|
|
Pub Dt:
|
12/05/2013
| | | | |
Title:
|
SOLID STATE TRANSDUCER DIES HAVING REFLECTIVE FEATURES OVER CONTACTS AND ASSOCIATED SYSTEMS AND METHODS
|
|
|
Patent #:
|
|
Issue Dt:
|
05/28/2013
|
Application #:
|
13482517
|
Filing Dt:
|
05/29/2012
|
Publication #:
|
|
Pub Dt:
|
09/13/2012
| | | | |
Title:
|
SOLID STATE STORAGE DEVICE CONTROLLER WITH EXPANSION MODE
|
|
|
Patent #:
|
|
Issue Dt:
|
08/12/2014
|
Application #:
|
13482672
|
Filing Dt:
|
05/29/2012
|
Publication #:
|
|
Pub Dt:
|
12/05/2013
| | | | |
Title:
|
Semiconductor Constructions and Memory Arrays
|
|
|
Patent #:
|
|
Issue Dt:
|
12/03/2013
|
Application #:
|
13482743
|
Filing Dt:
|
05/29/2012
|
Publication #:
|
|
Pub Dt:
|
09/27/2012
| | | | |
Title:
|
ADVANCED DETECTION OF MEMORY DEVICE REMOVAL, AND METHODS, DEVICES AND CONNECTORS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/22/2014
|
Application #:
|
13482856
|
Filing Dt:
|
05/29/2012
|
Publication #:
|
|
Pub Dt:
|
12/05/2013
| | | | |
Title:
|
METHODS OF SEPARATING SOLID STATE TRANSDUCERS FROM SUBSTRATES AND ASSOCIATED DEVICES AND SYSTEMS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/22/2013
|
Application #:
|
13483339
|
Filing Dt:
|
05/30/2012
|
Publication #:
|
|
Pub Dt:
|
09/20/2012
| | | | |
Title:
|
METHODS OF FORMING PATTERNS ON SUBSTRATES
|
|
|
Patent #:
|
|
Issue Dt:
|
05/26/2015
|
Application #:
|
13483407
|
Filing Dt:
|
05/30/2012
|
Publication #:
|
|
Pub Dt:
|
12/05/2013
| | | | |
Title:
|
MEMORIES AND METHODS FOR PERFORMING COLUMN REPAIR
|
|
|
Patent #:
|
|
Issue Dt:
|
05/26/2015
|
Application #:
|
13483542
|
Filing Dt:
|
05/30/2012
|
Publication #:
|
|
Pub Dt:
|
09/20/2012
| | | | |
Title:
|
RESONATOR FOR THERMO OPTIC DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
04/30/2013
|
Application #:
|
13484240
|
Filing Dt:
|
05/30/2012
|
Publication #:
|
|
Pub Dt:
|
09/20/2012
| | | | |
Title:
|
DIGITAL LOCKED LOOPS AND METHODS WITH CONFIGURABLE OPERATING PARAMETERS
|
|
|
Patent #:
|
|
Issue Dt:
|
03/19/2013
|
Application #:
|
13484493
|
Filing Dt:
|
05/31/2012
|
Publication #:
|
|
Pub Dt:
|
09/20/2012
| | | | |
Title:
|
INSERTS FOR DIRECTING MOLDING COMPOUND FLOW AND SEMICONDUCTOR DIE ASSEMBLIES
|
|
|
Patent #:
|
|
Issue Dt:
|
09/10/2013
|
Application #:
|
13484944
|
Filing Dt:
|
05/31/2012
|
Publication #:
|
|
Pub Dt:
|
09/20/2012
| | | | |
Title:
|
CROSS-POINT MEMORY STRUCTURES
|
|
|
Patent #:
|
|
Issue Dt:
|
03/19/2013
|
Application #:
|
13485226
|
Filing Dt:
|
05/31/2012
|
Publication #:
|
|
Pub Dt:
|
09/20/2012
| | | | |
Title:
|
MEMORY CELL OPERATION
|
|
|
Patent #:
|
|
Issue Dt:
|
01/19/2016
|
Application #:
|
13485488
|
Filing Dt:
|
05/31/2012
|
Publication #:
|
|
Pub Dt:
|
12/05/2013
| | | | |
Title:
|
MEMORY ARRAYS AND METHODS OF FORMING AN ARRAY OF MEMORY CELLS
|
|
|
Patent #:
|
|
Issue Dt:
|
05/03/2016
|
Application #:
|
13485539
|
Filing Dt:
|
05/31/2012
|
Publication #:
|
|
Pub Dt:
|
12/05/2013
| | | | |
Title:
|
INTEGRATED CIRCUIT SUBSTRATES COMPRISING THROUGH-SUBSTRATE VIAS AND METHODS OF FORMING THROUGH-SUBSTRATE VIAS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/01/2013
|
Application #:
|
13485853
|
Filing Dt:
|
05/31/2012
|
Publication #:
|
|
Pub Dt:
|
09/20/2012
| | | | |
Title:
|
SEMICONDUCTOR PACKAGES
|
|
|
Patent #:
|
|
Issue Dt:
|
04/30/2013
|
Application #:
|
13485869
|
Filing Dt:
|
05/31/2012
|
Publication #:
|
|
Pub Dt:
|
09/20/2012
| | | | |
Title:
|
METHODS OF FORMING HIGH DENSITY STRUCTURES AND LOW DENSITY STRUCTURES WITH A SINGLE PHOTOMASK
|
|
|
Patent #:
|
|
Issue Dt:
|
10/06/2015
|
Application #:
|
13485884
|
Filing Dt:
|
05/31/2012
|
Publication #:
|
|
Pub Dt:
|
09/20/2012
| | | | |
Title:
|
Semiconductor Constructions
|
|
|
Patent #:
|
|
Issue Dt:
|
04/02/2013
|
Application #:
|
13485892
|
Filing Dt:
|
05/31/2012
|
Publication #:
|
|
Pub Dt:
|
09/20/2012
| | | | |
Title:
|
METHODS OF FORMING TRANSISTORS, AND METHODS OF FORMING MEMORY ARRAYS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/22/2013
|
Application #:
|
13486028
|
Filing Dt:
|
06/01/2012
|
Publication #:
|
|
Pub Dt:
|
09/20/2012
| | | | |
Title:
|
REDUCING EFFECTS OF ERASE DISTURB IN A MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
10/20/2015
|
Application #:
|
13486674
|
Filing Dt:
|
06/01/2012
|
Publication #:
|
|
Pub Dt:
|
12/05/2013
| | | | |
Title:
|
METHODS AND APPARATUSES FOR SHIFTING DATA SIGNALS TO MATCH COMMAND SIGNAL DELAY
|
|
|
Patent #:
|
|
Issue Dt:
|
04/07/2015
|
Application #:
|
13486767
|
Filing Dt:
|
06/01/2012
|
Publication #:
|
|
Pub Dt:
|
12/05/2013
| | | | |
Title:
|
MEMORY CELL SENSING
|
|
|
Patent #:
|
|
Issue Dt:
|
07/18/2017
|
Application #:
|
13487573
|
Filing Dt:
|
06/04/2012
|
Publication #:
|
|
Pub Dt:
|
12/05/2013
| | | | |
Title:
|
METHOD AND STRUCTURE PROVIDING OPTICAL ISOLATION OF A WAVEGUIDE ON A SILICON-ON-INSULATOR SUBSTRATE
|
|
|
Patent #:
|
|
Issue Dt:
|
02/21/2017
|
Application #:
|
13488190
|
Filing Dt:
|
06/04/2012
|
Publication #:
|
|
Pub Dt:
|
09/27/2012
| | | | |
Title:
|
NON-VOLATILE RESISTIVE OXIDE MEMORY CELLS AND METHODS OF FORMING NON-VOLATILE RESISTIVE OXIDE MEMORY CELLS
|
|
|
Patent #:
|
|
Issue Dt:
|
05/26/2015
|
Application #:
|
13488209
|
Filing Dt:
|
06/04/2012
|
Publication #:
|
|
Pub Dt:
|
09/27/2012
| | | | |
Title:
|
METHODS OF FORMING VERTICAL FIELD EFFECT TRANSISTORS, VERTICAL FIELD EFFECT TRANSISTORS, AND DRAM CELLS
|
|
|
Patent #:
|
|
Issue Dt:
|
09/30/2014
|
Application #:
|
13488231
|
Filing Dt:
|
06/04/2012
|
Publication #:
|
|
Pub Dt:
|
12/05/2013
| | | | |
Title:
|
Photomasks, Methods Of Forming A Photomask, And Methods Of Photolithographically Patterning A Substrate
|
|
|
Patent #:
|
|
Issue Dt:
|
10/11/2016
|
Application #:
|
13489246
|
Filing Dt:
|
06/05/2012
|
Publication #:
|
|
Pub Dt:
|
09/27/2012
| | | | |
Title:
|
SYSTEM AND METHOD FOR DECODING COMMANDS BASED ON COMMAND SIGNALS AND OPERATING STATE
|
|
|
Patent #:
|
|
Issue Dt:
|
01/14/2014
|
Application #:
|
13490082
|
Filing Dt:
|
06/06/2012
|
Publication #:
|
|
Pub Dt:
|
09/27/2012
| | | | |
Title:
|
TECHNIQUES FOR PACKAGING MULTIPLE DEVICE COMPONENTS
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13490328
|
Filing Dt:
|
06/06/2012
|
Publication #:
|
|
Pub Dt:
|
12/12/2013
| | | | |
Title:
|
DEVICES, SYSTEMS, AND METHODS RELATED TO DISTRIBUTED RADIATION TRANSDUCERS
|
|
|
Patent #:
|
|
Issue Dt:
|
06/03/2014
|
Application #:
|
13490369
|
Filing Dt:
|
06/06/2012
|
Publication #:
|
|
Pub Dt:
|
09/27/2012
| | | | |
Title:
|
DRAM ARRAYS
|
|
|
Patent #:
|
|
Issue Dt:
|
04/14/2015
|
Application #:
|
13490633
|
Filing Dt:
|
06/07/2012
|
Publication #:
|
|
Pub Dt:
|
12/12/2013
| | | | |
Title:
|
INTEGRITY OF AN ADDRESS BUS
|
|
|
Patent #:
|
|
Issue Dt:
|
04/26/2016
|
Application #:
|
13490690
|
Filing Dt:
|
06/07/2012
|
Publication #:
|
|
Pub Dt:
|
12/12/2013
| | | | |
Title:
|
INTEGRITY OF A DATA BUS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/15/2013
|
Application #:
|
13490968
|
Filing Dt:
|
06/07/2012
|
Publication #:
|
|
Pub Dt:
|
09/27/2012
| | | | |
Title:
|
NON-VOLATILE MEMORY DEVICE HAVING ASSIGNABLE NETWORK IDENTIFICATION
|
|
|
Patent #:
|
|
Issue Dt:
|
08/05/2014
|
Application #:
|
13491116
|
Filing Dt:
|
06/07/2012
|
Publication #:
|
|
Pub Dt:
|
12/12/2013
| | | | |
Title:
|
FILAMENTARY MEMORY DEVICES AND METHODS
|
|
|
Patent #:
|
|
Issue Dt:
|
06/03/2014
|
Application #:
|
13491311
|
Filing Dt:
|
06/07/2012
|
Publication #:
|
|
Pub Dt:
|
09/27/2012
| | | | |
Title:
|
DATA SERIALIZERS, OUTPUT BUFFERS, MEMORY DEVICES AND METHODS OF SERIALIZING
|
|
|
Patent #:
|
|
Issue Dt:
|
03/05/2013
|
Application #:
|
13491466
|
Filing Dt:
|
06/07/2012
|
Publication #:
|
|
Pub Dt:
|
09/27/2012
| | | | |
Title:
|
METHODS OF PATTERNING MATERIALS
|
|
|
Patent #:
|
|
Issue Dt:
|
09/17/2013
|
Application #:
|
13492554
|
Filing Dt:
|
06/08/2012
|
Publication #:
|
|
Pub Dt:
|
09/27/2012
| | | | |
Title:
|
MICROELECTRONIC DIE PACKAGES WITH METAL LEADS, INCLUDING METAL LEADS FOR STACKED DIE PACKAGES, AND ASSOCIATED SYSTEMS AND METHODS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/05/2014
|
Application #:
|
13493651
|
Filing Dt:
|
06/11/2012
|
Publication #:
|
|
Pub Dt:
|
10/04/2012
| | | | |
Title:
|
VARIABLE MEMORY REFRESH DEVICES AND METHODS
|
|
|
Patent #:
|
|
Issue Dt:
|
12/23/2014
|
Application #:
|
13493696
|
Filing Dt:
|
06/11/2012
|
Publication #:
|
|
Pub Dt:
|
09/27/2012
| | | | |
Title:
|
APPARATUS COMPARING VERIFIED DATA TO ORIGINAL DATA IN THE PROGRAMMING OF MEMORY CELLS
|
|
|
Patent #:
|
|
Issue Dt:
|
02/10/2015
|
Application #:
|
13493744
|
Filing Dt:
|
06/11/2012
|
Title:
|
SIGNAL SHIFTING TO ALLOW INDEPENDENT CONTROL OF IDENTICAL STACKED MEMORY MODULES
|
|
|
Patent #:
|
|
Issue Dt:
|
12/31/2013
|
Application #:
|
13493797
|
Filing Dt:
|
06/11/2012
|
Publication #:
|
|
Pub Dt:
|
10/04/2012
| | | | |
Title:
|
TRANSMITTER APPARATUS, SYSTEMS, AND METHODS
|
|
|
Patent #:
|
|
Issue Dt:
|
12/31/2013
|
Application #:
|
13494151
|
Filing Dt:
|
06/12/2012
|
Publication #:
|
|
Pub Dt:
|
10/04/2012
| | | | |
Title:
|
SEMICONDUCTOR PROCESSING METHODS
|
|
|
Patent #:
|
|
Issue Dt:
|
05/07/2013
|
Application #:
|
13494525
|
Filing Dt:
|
06/12/2012
|
Publication #:
|
|
Pub Dt:
|
10/11/2012
| | | | |
Title:
|
NON-VOLATILE MEMORY WITH BOTH SINGLE AND MULTIPLE LEVEL CELLS
|
|
|
Patent #:
|
|
Issue Dt:
|
04/08/2014
|
Application #:
|
13495287
|
Filing Dt:
|
06/13/2012
|
Publication #:
|
|
Pub Dt:
|
10/11/2012
| | | | |
Title:
|
COUPLINGS WITHIN MEMORY DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
11/10/2015
|
Application #:
|
13511987
|
Filing Dt:
|
09/19/2012
|
Publication #:
|
|
Pub Dt:
|
01/10/2013
| | | | |
Title:
|
DESCENDING SET VERIFY FOR PHASE CHANGE MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
02/10/2015
|
Application #:
|
13512000
|
Filing Dt:
|
09/21/2012
|
Publication #:
|
|
Pub Dt:
|
01/03/2013
| | | | |
Title:
|
MEMORY DEVICE HAVING ADDRESS AND COMMAND SELECTABLE CAPABILITIES
|
|
|
Patent #:
|
|
Issue Dt:
|
12/09/2014
|
Application #:
|
13512006
|
Filing Dt:
|
09/24/2012
|
Publication #:
|
|
Pub Dt:
|
05/02/2013
| | | | |
Title:
|
MODIFIED RESET STATE FOR ENHANCED READ MARGIN OF PHASE CHANGE MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
10/07/2014
|
Application #:
|
13512008
|
Filing Dt:
|
09/21/2012
|
Publication #:
|
|
Pub Dt:
|
01/03/2013
| | | | |
Title:
|
MIXED MODE PROGRAMMING FOR PHASE CHANGE MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
06/30/2015
|
Application #:
|
13513139
|
Filing Dt:
|
09/17/2012
|
Publication #:
|
|
Pub Dt:
|
01/03/2013
| | | | |
Title:
|
REFRESH ARCHITECTURE AND ALGORITHM FOR NON-VOLATILE MEMORIES
|
|
|
Patent #:
|
|
Issue Dt:
|
02/10/2015
|
Application #:
|
13514532
|
Filing Dt:
|
10/11/2012
|
Publication #:
|
|
Pub Dt:
|
02/14/2013
| | | | |
Title:
|
APPARATUS AND METHOD FOR READING A PHASE-CHANGE MEMORY CELL
|
|
|
Patent #:
|
|
Issue Dt:
|
02/02/2016
|
Application #:
|
13518361
|
Filing Dt:
|
09/30/2013
|
Publication #:
|
|
Pub Dt:
|
12/25/2014
| | | | |
Title:
|
METHODS FOR A PHASE-CHANGE MEMORY ARRAY
|
|
|
Patent #:
|
|
Issue Dt:
|
12/08/2015
|
Application #:
|
13518371
|
Filing Dt:
|
12/11/2012
|
Publication #:
|
|
Pub Dt:
|
03/28/2013
| | | | |
Title:
|
TIMING VIOLATION HANDLING IN A SYNCHRONOUS INTERFACE MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
09/02/2014
|
Application #:
|
13519846
|
Filing Dt:
|
08/24/2012
|
Publication #:
|
|
Pub Dt:
|
12/13/2012
| | | | |
Title:
|
CONTROLLING CLOCK INPUT BUFFERS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/18/2015
|
Application #:
|
13523356
|
Filing Dt:
|
06/14/2012
|
Publication #:
|
|
Pub Dt:
|
12/19/2013
| | | | |
Title:
|
METHODS OF FORMING RESISTIVE MEMORY ELEMENTS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/08/2014
|
Application #:
|
13523690
|
Filing Dt:
|
06/14/2012
|
Publication #:
|
|
Pub Dt:
|
10/04/2012
| | | | |
Title:
|
METHODS FOR PACKAGING MICROELECTRONIC DEVICES AND MICROELECTRONIC DEVICES FORMED USING SUCH METHODS
|
|
|
Patent #:
|
|
Issue Dt:
|
06/10/2014
|
Application #:
|
13524693
|
Filing Dt:
|
06/15/2012
|
Publication #:
|
|
Pub Dt:
|
10/11/2012
| | | | |
Title:
|
SEMICONDUCTOR DEVICES INCLUDING DUAL GATE STRUCTURES AND METHODS OF FABRICATION
|
|
|
Patent #:
|
|
Issue Dt:
|
03/25/2014
|
Application #:
|
13524732
|
Filing Dt:
|
06/15/2012
|
Publication #:
|
|
Pub Dt:
|
10/11/2012
| | | | |
Title:
|
CONFIGURABLE BANDWIDTH MEMORY DEVICES AND METHODS
|
|
|
Patent #:
|
|
Issue Dt:
|
05/28/2013
|
Application #:
|
13524809
|
Filing Dt:
|
06/15/2012
|
Publication #:
|
|
Pub Dt:
|
10/11/2012
| | | | |
Title:
|
CAPACITOR-LESS MEMORY CELL, DEVICE, SYSTEM AND METHOD OF MAKING SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
02/24/2015
|
Application #:
|
13524872
|
Filing Dt:
|
06/15/2012
|
Publication #:
|
|
Pub Dt:
|
12/19/2013
| | | | |
Title:
|
ARCHITECTURE FOR 3-D NAND MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
10/27/2015
|
Application #:
|
13525035
|
Filing Dt:
|
06/15/2012
|
Publication #:
|
|
Pub Dt:
|
12/19/2013
| | | | |
Title:
|
APPARATUSES AND METHODS TO MODIFY PILLAR POTENTIAL
|
|
|
Patent #:
|
|
Issue Dt:
|
07/08/2014
|
Application #:
|
13525730
|
Filing Dt:
|
06/18/2012
|
Publication #:
|
|
Pub Dt:
|
10/11/2012
| | | | |
Title:
|
MEMORY DEVICE COMPRISING AN ARRAY PORTION AND A LOGIC PORTION
|
|
|
Patent #:
|
|
Issue Dt:
|
02/03/2015
|
Application #:
|
13526225
|
Filing Dt:
|
06/18/2012
|
Publication #:
|
|
Pub Dt:
|
10/11/2012
| | | | |
Title:
|
SELF-ALIGNED NANO-STRUCTURES
|
|
|
Patent #:
|
|
Issue Dt:
|
07/08/2014
|
Application #:
|
13526792
|
Filing Dt:
|
06/19/2012
|
Publication #:
|
|
Pub Dt:
|
10/11/2012
| | | | |
Title:
|
SPACER PROCESS FOR ON PITCH CONTACTS AND RELATED STRUCTURES
|
|
|
Patent #:
|
|
Issue Dt:
|
12/30/2014
|
Application #:
|
13527173
|
Filing Dt:
|
06/19/2012
|
Publication #:
|
|
Pub Dt:
|
12/19/2013
| | | | |
Title:
|
MEMORY CELLS, SEMICONDUCTOR DEVICE STRUCTURES, MEMORY SYSTEMS, AND METHODS OF FABRICATION
|
|
|
Patent #:
|
|
Issue Dt:
|
06/09/2015
|
Application #:
|
13527262
|
Filing Dt:
|
06/19/2012
|
Publication #:
|
|
Pub Dt:
|
12/19/2013
| | | | |
Title:
|
MEMORY CELLS, SEMICONDUCTOR DEVICE STRUCTURES, MEMORY SYSTEMS, AND METHODS OF FABRICATION
|
|
|
Patent #:
|
|
Issue Dt:
|
04/02/2013
|
Application #:
|
13528028
|
Filing Dt:
|
06/20/2012
|
Publication #:
|
|
Pub Dt:
|
10/11/2012
| | | | |
Title:
|
METHODS OF FORMING FIELD EFFECT TRANSISTORS, PLURALITIES OF FIELD EFFECT TRANSISTORS, AND DRAM CIRCUITRY COMPRISING A PLURALITY OF INDIVIDUAL MEMORY CELLS
|
|
|
Patent #:
|
|
Issue Dt:
|
01/07/2014
|
Application #:
|
13528342
|
Filing Dt:
|
06/20/2012
|
Publication #:
|
|
Pub Dt:
|
10/18/2012
| | | | |
Title:
|
METHODS OF FORMING STRUCTURES HAVING NANOTUBES EXTENDING BETWEEN OPPOSING ELECTRODES AND STRUCTURES INCLUDING SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
05/28/2013
|
Application #:
|
13528574
|
Filing Dt:
|
06/20/2012
|
Publication #:
|
|
Pub Dt:
|
10/11/2012
| | | | |
Title:
|
EPITAXIAL DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
06/03/2014
|
Application #:
|
13529006
|
Filing Dt:
|
06/21/2012
|
Publication #:
|
|
Pub Dt:
|
12/26/2013
| | | | |
Title:
|
Methods of Forming Semiconductor Constructions
|
|
|
Patent #:
|
|
Issue Dt:
|
02/02/2016
|
Application #:
|
13529769
|
Filing Dt:
|
06/21/2012
|
Publication #:
|
|
Pub Dt:
|
12/26/2013
| | | | |
Title:
|
APPARATUSES AND METHODS TO CHANGE INFORMATION VALUES
|
|
|
Patent #:
|
|
Issue Dt:
|
03/03/2015
|
Application #:
|
13530732
|
Filing Dt:
|
06/22/2012
|
Publication #:
|
|
Pub Dt:
|
12/26/2013
| | | | |
Title:
|
MEMORY PROGRAMMING TO REDUCE THERMAL DISTURB
|
|
|
Patent #:
|
|
Issue Dt:
|
11/03/2015
|
Application #:
|
13531077
|
Filing Dt:
|
06/22/2012
|
Publication #:
|
|
Pub Dt:
|
10/18/2012
| | | | |
Title:
|
SYSTEM AND METHOD OF INDIRECT REGISTER ACCESS VIA DIRECTLY ACCESSIBLE REGISTERS
|
|
|
Patent #:
|
|
Issue Dt:
|
09/29/2015
|
Application #:
|
13531090
|
Filing Dt:
|
06/22/2012
|
Publication #:
|
|
Pub Dt:
|
12/26/2013
| | | | |
Title:
|
DATA COMPRESSION AND MANAGEMENT
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13531139
|
Filing Dt:
|
06/22/2012
|
Publication #:
|
|
Pub Dt:
|
12/26/2013
| | | | |
Title:
|
WEAR LEVELING MEMORY USING ERROR RATE
|
|
|
Patent #:
|
|
Issue Dt:
|
11/12/2013
|
Application #:
|
13531241
|
Filing Dt:
|
06/22/2012
|
Publication #:
|
|
Pub Dt:
|
10/18/2012
| | | | |
Title:
|
Methods of Removing Silicon Dioxide
|
|
|
Patent #:
|
|
Issue Dt:
|
06/09/2015
|
Application #:
|
13531341
|
Filing Dt:
|
06/22/2012
|
Publication #:
|
|
Pub Dt:
|
12/26/2013
| | | | |
Title:
|
APPARATUSES AND METHODS FOR ADJUSTING A MINIMUM FORWARD PATH DELAY OF A SIGNAL PATH
|
|
|
Patent #:
|
|
Issue Dt:
|
06/10/2014
|
Application #:
|
13532239
|
Filing Dt:
|
06/25/2012
|
Publication #:
|
|
Pub Dt:
|
10/18/2012
| | | | |
Title:
|
MEMORY MODULES AND MEMORY DEVICES HAVING MEMORY DEVICE STACKS, AND METHOD OF FORMING SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
06/25/2013
|
Application #:
|
13532293
|
Filing Dt:
|
06/25/2012
|
Title:
|
ION IMPLANTATION METHOD FOR SEMICONDUCTOR SIDEWALLS
|
|
|
Patent #:
|
|
Issue Dt:
|
01/27/2015
|
Application #:
|
13532301
|
Filing Dt:
|
06/25/2012
|
Publication #:
|
|
Pub Dt:
|
10/18/2012
| | | | |
Title:
|
SYSTEMS, MEMORIES, AND METHODS FOR OPERATING MEMORY ARRAYS
|
|
|
Patent #:
|
|
Issue Dt:
|
02/18/2014
|
Application #:
|
13532483
|
Filing Dt:
|
06/25/2012
|
Publication #:
|
|
Pub Dt:
|
10/18/2012
| | | | |
Title:
|
METHODS OF FORMING A NONVOLATILE MEMORY CELL AND METHODS OF FORMING AN ARRAY OF NONVOLATILE MEMORY CELLS ARRAY OF NONVOLATILE MEMORY CELLS
|
|
|
Patent #:
|
|
Issue Dt:
|
01/21/2014
|
Application #:
|
13533890
|
Filing Dt:
|
06/26/2012
|
Publication #:
|
|
Pub Dt:
|
10/25/2012
| | | | |
Title:
|
Systems and Methods to Determine Motion Parameters Using RFID Tags
|
|
|
Patent #:
|
|
Issue Dt:
|
03/26/2013
|
Application #:
|
13534038
|
Filing Dt:
|
06/27/2012
|
Publication #:
|
|
Pub Dt:
|
11/15/2012
| | | | |
Title:
|
METHOD FOR FABRICATING STACKED SEMICONDUCTOR SYSTEM WITH ENCAPSULATED THROUGH WIRE INTERCONNECTS (TWI)
|
|
|
Patent #:
|
|
Issue Dt:
|
08/05/2014
|
Application #:
|
13535048
|
Filing Dt:
|
06/27/2012
|
Publication #:
|
|
Pub Dt:
|
01/02/2014
| | | | |
Title:
|
THYRISTOR MEMORY AND METHODS OF OPERATION
|
|
|
Patent #:
|
|
Issue Dt:
|
01/27/2015
|
Application #:
|
13535322
|
Filing Dt:
|
06/27/2012
|
Publication #:
|
|
Pub Dt:
|
10/25/2012
| | | | |
Title:
|
Methods Of Removing Particles From Over Semiconductor Substrates
|
|
|
Patent #:
|
|
Issue Dt:
|
05/06/2014
|
Application #:
|
13537150
|
Filing Dt:
|
06/29/2012
|
Publication #:
|
|
Pub Dt:
|
10/25/2012
| | | | |
Title:
|
MULTIPLE LEVEL PROGRAM VERIFY IN A MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
02/17/2015
|
Application #:
|
13538272
|
Filing Dt:
|
06/29/2012
|
Publication #:
|
|
Pub Dt:
|
01/02/2014
| | | | |
Title:
|
DEVICES, SYSTEMS, AND METHODS RELATED TO PLANARIZING SEMICONDUCTOR DEVICES AFTER FORMING OPENINGS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/12/2016
|
Application #:
|
13538714
|
Filing Dt:
|
06/29/2012
|
Publication #:
|
|
Pub Dt:
|
10/18/2012
| | | | |
Title:
|
A METHOD AND SYSTEM TO DYNAMICALLY POWER-DOWN A BLOCK OF A PATTERN-RECOGNITION PROCESSOR
|
|
|
Patent #:
|
|
Issue Dt:
|
10/29/2013
|
Application #:
|
13538796
|
Filing Dt:
|
06/29/2012
|
Publication #:
|
|
Pub Dt:
|
10/25/2012
| | | | |
Title:
|
SYSTEMS AND METHODS FOR EXPOSING SEMICONDUCTOR WORKPIECES TO VAPORS FOR THROUGH-HOLE CLEANING AND/OR OTHER PROCESSES
|
|
|
Patent #:
|
|
Issue Dt:
|
04/12/2016
|
Application #:
|
13538891
|
Filing Dt:
|
06/29/2012
|
Publication #:
|
|
Pub Dt:
|
11/29/2012
| | | | |
Title:
|
CONDUCTIVE STRUCTURES FOR MICROFEATURE DEVICES AND METHODS FOR FABRICATING MICROFEATURE DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
03/03/2015
|
Application #:
|
13539990
|
Filing Dt:
|
07/02/2012
|
Publication #:
|
|
Pub Dt:
|
01/02/2014
| | | | |
Title:
|
ERASE OPERATIONS WITH ERASE-VERIFY VOLTAGES BASED ON WHERE IN THE ERASE OPERATIONS AN ERASE CYCLE OCCURS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/20/2013
|
Application #:
|
13540510
|
Filing Dt:
|
07/02/2012
|
Publication #:
|
|
Pub Dt:
|
11/01/2012
| | | | |
Title:
|
METHODS FOR ETCHING DOPED OXIDES IN THE MANUFACTURE OF MICROFEATURE DEVICES
|
|