skip navigationU S P T O SealUnited States Patent and Trademark Office AOTW logo
Home|Site Index|Search|Guides|Contacts|eBusiness|eBiz alerts|News|Help
Assignments on the Web > Patent Query
Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:047243/0001   Pages: 959
Recorded: 08/23/2018
Attorney Dkt #:4816.238
Conveyance: RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).
1
Patent #:
Issue Dt:
01/24/2017
Application #:
14253649
Filing Dt:
04/15/2014
Publication #:
Pub Dt:
08/14/2014
Title:
FORMING A MEMORY DEVICE USING SPUTTERING TO DEPOSIT SILVER-SELENIDE FILM
2
Patent #:
Issue Dt:
05/03/2016
Application #:
14253989
Filing Dt:
04/16/2014
Publication #:
Pub Dt:
09/11/2014
Title:
SWITCHING DEVICE STRUCTURES AND METHODS
3
Patent #:
Issue Dt:
06/07/2016
Application #:
14254173
Filing Dt:
04/16/2014
Publication #:
Pub Dt:
10/22/2015
Title:
METHOD AND APPARATUS PROVIDING COMPENSATION FOR WAVELENGTH DRIFT IN PHOTONIC STRUCTURES
4
Patent #:
Issue Dt:
09/29/2015
Application #:
14254327
Filing Dt:
04/16/2014
Publication #:
Pub Dt:
10/22/2015
Title:
Methods Of Forming Ferroelectric Capacitors
5
Patent #:
Issue Dt:
11/29/2016
Application #:
14254378
Filing Dt:
04/16/2014
Publication #:
Pub Dt:
10/22/2015
Title:
APPARATUSES AND METHODS FOR IMPLEMENTING MASKED WRITE COMMANDS
6
Patent #:
Issue Dt:
10/13/2015
Application #:
14254433
Filing Dt:
04/16/2014
Publication #:
Pub Dt:
08/14/2014
Title:
MEMORY DEVICE WORD LINE DRIVERS AND METHODS
7
Patent #:
Issue Dt:
05/31/2016
Application #:
14254434
Filing Dt:
04/16/2014
Publication #:
Pub Dt:
08/14/2014
Title:
METHOD AND APPARATUS PROVIDING INTEGRATED CIRCUIT HAVING REDISTRIBUTION LAYER WITH RECESSED CONNECTORS
8
Patent #:
Issue Dt:
12/30/2014
Application #:
14254720
Filing Dt:
04/16/2014
Publication #:
Pub Dt:
08/14/2014
Title:
Semiconductor Constructions, DRAM Arrays, and Methods of Forming Semiconductor Constructions
9
Patent #:
Issue Dt:
03/29/2016
Application #:
14255064
Filing Dt:
04/17/2014
Publication #:
Pub Dt:
10/30/2014
Title:
DATA PROTECTION ACROSS MULTIPLE MEMORY BLOCKS
10
Patent #:
Issue Dt:
05/19/2015
Application #:
14255283
Filing Dt:
04/17/2014
Publication #:
Pub Dt:
08/14/2014
Title:
ARRAYS OF VERTICALLY STACKED TIERS OF NON-VOLATILE CROSS POINT MEMORY CELLS
11
Patent #:
Issue Dt:
12/29/2015
Application #:
14255300
Filing Dt:
04/17/2014
Publication #:
Pub Dt:
08/14/2014
Title:
CAPACITOR FORMING METHODS
12
Patent #:
Issue Dt:
01/12/2016
Application #:
14255510
Filing Dt:
04/17/2014
Publication #:
Pub Dt:
08/14/2014
Title:
FAILURE RECOVERY MEMORY DEVICES AND METHODS
13
Patent #:
Issue Dt:
10/20/2015
Application #:
14255525
Filing Dt:
04/17/2014
Publication #:
Pub Dt:
10/23/2014
Title:
LOGICAL ADDRESS TRANSLATION
14
Patent #:
Issue Dt:
07/21/2015
Application #:
14256634
Filing Dt:
04/18/2014
Publication #:
Pub Dt:
08/14/2014
Title:
SYSTEM AND METHOD FOR UPDATING READ-ONLY MEMORY IN SMART CARD MEMORY MODULES
15
Patent #:
Issue Dt:
02/23/2016
Application #:
14256655
Filing Dt:
04/18/2014
Publication #:
Pub Dt:
10/22/2015
Title:
MEMORY CELLS, METHODS OF FABRICATION, AND SEMICONDUCTOR DEVICES
16
Patent #:
Issue Dt:
04/28/2015
Application #:
14257114
Filing Dt:
04/21/2014
Publication #:
Pub Dt:
08/14/2014
Title:
SEMICONDUCTOR MODULE SYSTEM HAVING ENCAPSULATED THROUGH WIRE INTERCONNECT (TWI)
17
Patent #:
Issue Dt:
11/01/2016
Application #:
14258317
Filing Dt:
04/22/2014
Publication #:
Pub Dt:
08/14/2014
Title:
CURRENT MODE SENSE AMPLIFIER WITH LOAD CIRCUIT FOR PERFORMANCE STABILITY
18
Patent #:
Issue Dt:
03/24/2015
Application #:
14258476
Filing Dt:
04/22/2014
Publication #:
Pub Dt:
08/14/2014
Title:
METHOD FOR PROVIDING ELECTRICAL CONNECTIONS TO SPACED CONDUCTIVE LINES
19
Patent #:
Issue Dt:
07/16/2019
Application #:
14258522
Filing Dt:
04/22/2014
Publication #:
Pub Dt:
10/02/2014
Title:
CLOCK CIRCUITS AND APPARATUS CONTAINING SUCH
20
Patent #:
Issue Dt:
05/21/2019
Application #:
14258875
Filing Dt:
04/22/2014
Publication #:
Pub Dt:
08/14/2014
Title:
SYSTEM IN PACKAGE (SIP) WITH DUAL LAMINATE INTERPOSERS
21
Patent #:
Issue Dt:
10/06/2015
Application #:
14258885
Filing Dt:
04/22/2014
Publication #:
Pub Dt:
09/04/2014
Title:
Methods of Processing Substrates and Methods of Forming Conductive Connections to Substrates
22
Patent #:
Issue Dt:
10/04/2016
Application #:
14259313
Filing Dt:
04/23/2014
Publication #:
Pub Dt:
08/21/2014
Title:
Semiconductor Constructions and Methods of Forming Semiconductor Constructions
23
Patent #:
Issue Dt:
10/14/2014
Application #:
14259376
Filing Dt:
04/23/2014
Publication #:
Pub Dt:
08/21/2014
Title:
MEMORY CELLS AND METHODS OF FORMING MEMORY CELLS
24
Patent #:
Issue Dt:
01/20/2015
Application #:
14259403
Filing Dt:
04/23/2014
Publication #:
Pub Dt:
08/21/2014
Title:
DATA PATHS USING A FIRST SIGNAL TO CAPTURE DATA AND A SECOND SIGNAL TO OUTPUT DATA AND METHODS FOR PROVIDING DATA
25
Patent #:
Issue Dt:
01/05/2016
Application #:
14259405
Filing Dt:
04/23/2014
Publication #:
Pub Dt:
10/30/2014
Title:
DETERMINING SOFT DATA FOR COMBINATIONS OF MEMORY CELLS
26
Patent #:
Issue Dt:
08/15/2017
Application #:
14259556
Filing Dt:
04/23/2014
Publication #:
Pub Dt:
10/29/2015
Title:
METHODS OF FORMING A MEMORY CELL MATERIAL, AND RELATED METHODS OF FORMING A SEMICONDUCTOR DEVICE STRUCTURE, MEMORY CELL MATERIALS, AND SEMICONDUCTOR DEVICE STRUCTURES
27
Patent #:
Issue Dt:
08/28/2018
Application #:
14260940
Filing Dt:
04/24/2014
Publication #:
Pub Dt:
10/29/2015
Title:
Field Effect Transistor Constructions With Gate Insulator Having Local Regions Radially There-Through That Have Different Capacitance At Different Circumferential Locations Relative To A Channel Core Periphery
28
Patent #:
Issue Dt:
02/16/2016
Application #:
14260977
Filing Dt:
04/24/2014
Publication #:
Pub Dt:
10/29/2015
Title:
Ferroelectric Field Effect Transistors, Pluralities Of Ferroelectric Field Effect Transistors Arrayed In Row Lines And Column Lines, And Methods Of Forming A Plurality Of Ferroelectric Field Effect Transistors
29
Patent #:
Issue Dt:
08/02/2016
Application #:
14261674
Filing Dt:
04/25/2014
Publication #:
Pub Dt:
08/21/2014
Title:
MEMORY APPARATUS AND SYSTEM WITH SHARED WORDLINE DECODER
30
Patent #:
Issue Dt:
03/28/2017
Application #:
14261901
Filing Dt:
04/25/2014
Publication #:
Pub Dt:
08/21/2014
Title:
OHMIC CONTACTS FOR SEMICONDUCTOR STRUCTURES
31
Patent #:
Issue Dt:
07/25/2017
Application #:
14261956
Filing Dt:
04/25/2014
Publication #:
Pub Dt:
10/29/2015
Title:
APPARATUSES AND METHODS FOR MEMORY MANAGEMENT
32
Patent #:
Issue Dt:
03/29/2016
Application #:
14262308
Filing Dt:
04/25/2014
Publication #:
Pub Dt:
08/21/2014
Title:
DYNAMIC DATA CACHES, DECODERS AND DECODING METHODS
33
Patent #:
Issue Dt:
05/26/2015
Application #:
14262538
Filing Dt:
04/25/2014
Publication #:
Pub Dt:
10/30/2014
Title:
SOLID STATE LIGHTING DEVICES WITH CELLULAR ARRAYS AND ASSOCIATED METHODS OF MANUFACTURING
34
Patent #:
Issue Dt:
08/16/2016
Application #:
14263037
Filing Dt:
04/28/2014
Publication #:
Pub Dt:
08/21/2014
Title:
HOT MEMORY BLOCK TABLE IN A SOLID STATE STORAGE DEVICE
35
Patent #:
Issue Dt:
03/29/2016
Application #:
14263321
Filing Dt:
04/28/2014
Publication #:
Pub Dt:
09/18/2014
Title:
OPTICAL INTERCONNECT IN HIGH-SPEED MEMORY SYSTEMS
36
Patent #:
Issue Dt:
11/17/2015
Application #:
14263322
Filing Dt:
04/28/2014
Publication #:
Pub Dt:
08/14/2014
Title:
THREE-DIMENSIONAL STRUCTURED MEMORY DEVICES
37
Patent #:
Issue Dt:
09/19/2017
Application #:
14263610
Filing Dt:
04/28/2014
Publication #:
Pub Dt:
10/29/2015
Title:
FERROELECTRIC MEMORY AND METHODS OF FORMING THE SAME
38
Patent #:
Issue Dt:
01/12/2016
Application #:
14263736
Filing Dt:
04/28/2014
Publication #:
Pub Dt:
11/27/2014
Title:
SINGLE CHECK MEMORY DEVICES AND METHODS
39
Patent #:
Issue Dt:
06/23/2015
Application #:
14263780
Filing Dt:
04/28/2014
Publication #:
Pub Dt:
08/14/2014
Title:
TECHNIQUES FOR FORMING A CONTACT TO A BURIED DIFFUSION LAYER IN A SEMICONDUCTOR MEMORY DEVICE
40
Patent #:
Issue Dt:
06/23/2015
Application #:
14263825
Filing Dt:
04/28/2014
Publication #:
Pub Dt:
10/30/2014
Title:
ERROR RECOVERY STORAGE ALONG A MEMORY STRING
41
Patent #:
Issue Dt:
08/16/2016
Application #:
14264584
Filing Dt:
04/29/2014
Publication #:
Pub Dt:
10/29/2015
Title:
STACKED SEMICONDUCTOR DIE ASSEMBLIES WITH SUPPORT MEMBERS AND ASSOCIATED SYSTEMS AND METHODS
42
Patent #:
Issue Dt:
08/02/2016
Application #:
14264699
Filing Dt:
04/29/2014
Publication #:
Pub Dt:
10/29/2015
Title:
STACKED SEMICONDUCTOR DIE ASSEMBLIES WITH DIE SUPPORT MEMBERS AND ASSOCIATED SYSTEMS AND METHODS
43
Patent #:
Issue Dt:
12/15/2015
Application #:
14265168
Filing Dt:
04/29/2014
Publication #:
Pub Dt:
10/29/2015
Title:
Methods of Forming Memory Arrays
44
Patent #:
Issue Dt:
02/24/2015
Application #:
14265609
Filing Dt:
04/30/2014
Publication #:
Pub Dt:
08/21/2014
Title:
SEMICONDUCTOR CONSTRUCTIONS, SEMICONDUCTOR PROCESSING METHODS, METHODS OF FORMING CONTACT PADS, AND METHODS OF FORMING ELECTRICAL CONNECTIONS BETWEEN METAL-CONTAINING LAYERS
45
Patent #:
NONE
Issue Dt:
Application #:
14265928
Filing Dt:
04/30/2014
Publication #:
Pub Dt:
08/21/2014
Title:
METHOD OF FORMING A DRAM ARRAY OF DEVICES WITH VERTICALLY INTEGRATED RECESSED ACCESS DEVICE AND DIGITLINE
46
Patent #:
Issue Dt:
11/01/2016
Application #:
14266165
Filing Dt:
04/30/2014
Publication #:
Pub Dt:
11/05/2015
Title:
APPARATUSES SUPPORTING MULTIPLE INTERFACE TYPES AND METHODS OF OPERATING THE SAME
47
Patent #:
Issue Dt:
03/08/2016
Application #:
14266365
Filing Dt:
04/30/2014
Publication #:
Pub Dt:
11/05/2015
Title:
PHASE CHANGE MEMORY STACK WITH TREATED SIDEWALLS
48
Patent #:
Issue Dt:
04/05/2016
Application #:
14266415
Filing Dt:
04/30/2014
Publication #:
Pub Dt:
11/05/2015
Title:
PHASE CHANGE MEMORY STACK WITH TREATED SIDEWALLS
49
Patent #:
Issue Dt:
08/13/2019
Application #:
14266456
Filing Dt:
04/30/2014
Publication #:
Pub Dt:
11/05/2015
Title:
PHASE CHANGE MEMORY STACK WITH TREATED SIDEWALLS
50
Patent #:
Issue Dt:
04/21/2015
Application #:
14268125
Filing Dt:
05/02/2014
Publication #:
Pub Dt:
10/16/2014
Title:
MEMORY CONTROLLERS, MEMORY SYSTEMS, SOLID STATE DRIVES AND METHODS FOR PROCESSING A NUMBER OF COMMANDS
51
Patent #:
Issue Dt:
05/17/2016
Application #:
14268587
Filing Dt:
05/02/2014
Publication #:
Pub Dt:
10/02/2014
Title:
MEMORY ARRAYS AND METHODS OF FORMING SAME
52
Patent #:
Issue Dt:
09/13/2016
Application #:
14268649
Filing Dt:
05/02/2014
Publication #:
Pub Dt:
10/02/2014
Title:
THREE DIMENSIONAL MEMORY ARRAY ARCHITECTURE
53
Patent #:
Issue Dt:
06/11/2019
Application #:
14269348
Filing Dt:
05/05/2014
Publication #:
Pub Dt:
08/28/2014
Title:
MICROELECTRONIC WORKPIECE PROCESSING SYSTEMS AND ASSOCIATED METHODS OF COLOR CORRECTION
54
Patent #:
Issue Dt:
02/02/2016
Application #:
14269349
Filing Dt:
05/05/2014
Publication #:
Pub Dt:
08/28/2014
Title:
VOLTAGE GENERATORS HAVING REDUCED OR ELIMINATED CROSS CURRENT
55
Patent #:
Issue Dt:
08/18/2015
Application #:
14269397
Filing Dt:
05/05/2014
Publication #:
Pub Dt:
09/18/2014
Title:
OBJECT ORIENTED MEMORY IN SOLID STATE DEVICES
56
Patent #:
Issue Dt:
03/01/2016
Application #:
14269445
Filing Dt:
05/05/2014
Publication #:
Pub Dt:
10/02/2014
Title:
MEMORY ADDRESS TRANSLATION
57
Patent #:
Issue Dt:
03/24/2015
Application #:
14269731
Filing Dt:
05/05/2014
Publication #:
Pub Dt:
08/28/2014
Title:
Apparatuses and Methods for Compensating for Power Supply Sensitivities of a Circuit in a Clock Path
58
Patent #:
Issue Dt:
05/05/2015
Application #:
14269853
Filing Dt:
05/05/2014
Publication #:
Pub Dt:
08/28/2014
Title:
PATTERN-RECOGNITION PROCESSOR WITH MATCHING-DATA REPORTING MODULE
59
Patent #:
Issue Dt:
10/20/2015
Application #:
14269869
Filing Dt:
05/05/2014
Publication #:
Pub Dt:
10/30/2014
Title:
READ BIAS MANAGEMENT TO REDUCE READ ERRORS FOR PHASE CHANGE MEMORY
60
Patent #:
Issue Dt:
10/20/2015
Application #:
14269873
Filing Dt:
05/05/2014
Publication #:
Pub Dt:
08/28/2014
Title:
MEMORY HAVING INTERNAL PROCESSORS AND METHODS OF CONTROLLING MEMORY ACCESS
61
Patent #:
Issue Dt:
02/10/2015
Application #:
14269944
Filing Dt:
05/05/2014
Publication #:
Pub Dt:
08/28/2014
Title:
DRAM CELL DESIGN WITH FOLDED DIGITLINE SENSE AMPLIFIER
62
Patent #:
Issue Dt:
08/25/2015
Application #:
14269970
Filing Dt:
05/05/2014
Publication #:
Pub Dt:
08/28/2014
Title:
PINNING CONTENT IN NONVOLATILE MEMORY
63
Patent #:
Issue Dt:
02/10/2015
Application #:
14270638
Filing Dt:
05/06/2014
Publication #:
Pub Dt:
08/28/2014
Title:
MEMORY DIES, STACKED MEMORIES, MEMORY DEVICES AND METHODS
64
Patent #:
Issue Dt:
07/05/2016
Application #:
14270944
Filing Dt:
05/06/2014
Publication #:
Pub Dt:
11/12/2015
Title:
APPARATUSES AND METHODS FOR PERFORMING MULTIPLE MEMORY OPERATIONS
65
Patent #:
Issue Dt:
04/26/2016
Application #:
14272015
Filing Dt:
05/07/2014
Publication #:
Pub Dt:
11/12/2015
Title:
APPARATUSES AND METHODS FOR BI-DIRECTIONAL ACCESS OF CROSS-POINT ARRAYS
66
Patent #:
Issue Dt:
07/28/2015
Application #:
14272928
Filing Dt:
05/08/2014
Publication #:
Pub Dt:
08/28/2014
Title:
PLASMA PROCESSING WITH PREIONIZED AND PREDISSOCIATED TUNING GASES AND ASSOCIATED SYSTEMS AND METHODS
67
Patent #:
Issue Dt:
08/04/2015
Application #:
14273138
Filing Dt:
05/08/2014
Publication #:
Pub Dt:
08/28/2014
Title:
PACKAGED INTEGRATED CIRCUIT DEVICES WITH THROUGH-BODY CONDUCTIVE VIAS, AND METHODS OF MAKING SAME
68
Patent #:
Issue Dt:
01/31/2017
Application #:
14273867
Filing Dt:
05/09/2014
Publication #:
Pub Dt:
11/12/2015
Title:
INTERCONNECT SYSTEMS AND METHODS USING HYBRID MEMORY CUBE LINKS TO SEND PACKETIZED DATA OVER DIFFERENT ENDPOINTS OF A DATA HANDLING DEVICE
69
Patent #:
Issue Dt:
02/16/2016
Application #:
14274146
Filing Dt:
05/09/2014
Publication #:
Pub Dt:
09/04/2014
Title:
RE-BUILDING MAPPING INFORMATION FOR MEMORY DEVICES
70
Patent #:
Issue Dt:
11/22/2016
Application #:
14274195
Filing Dt:
05/09/2014
Publication #:
Pub Dt:
11/12/2015
Title:
PROTECTION ZONES IN VIRTUALIZED PHYSICAL ADDRESSES FOR RECONFIGURABLE MEMORY SYSTEMS USING A MEMORY ABSTRACTION
71
Patent #:
Issue Dt:
11/29/2016
Application #:
14274307
Filing Dt:
05/09/2014
Publication #:
Pub Dt:
09/04/2014
Title:
WIRING CONFIGURATION OF A BUS SYSTEM AND POWER WIRES IN A MEMORY CHIP
72
Patent #:
Issue Dt:
02/16/2016
Application #:
14274364
Filing Dt:
05/09/2014
Publication #:
Pub Dt:
11/12/2015
Title:
DEFLATE COMPRESSION ALGORITHM
73
Patent #:
Issue Dt:
09/08/2015
Application #:
14274455
Filing Dt:
05/09/2014
Publication #:
Pub Dt:
09/04/2014
Title:
SUB-RESOLUTION ASSIST DEVICES AND METHODS
74
Patent #:
Issue Dt:
09/29/2015
Application #:
14274933
Filing Dt:
05/12/2014
Publication #:
Pub Dt:
09/04/2014
Title:
MULTI-TIERED SEMICONDUCTOR DEVICES AND ASSOCIATED METHODS
75
Patent #:
Issue Dt:
09/22/2015
Application #:
14274988
Filing Dt:
05/12/2014
Publication #:
Pub Dt:
09/04/2014
Title:
METHODS OF FORMING DUAL GATE STRUCTURES
76
Patent #:
Issue Dt:
11/08/2016
Application #:
14275211
Filing Dt:
05/12/2014
Publication #:
Pub Dt:
08/28/2014
Title:
OVER-LIMIT ELECTRICAL CONDITION PROTECTION CIRCUITS AND METHODS
77
Patent #:
Issue Dt:
03/31/2015
Application #:
14275414
Filing Dt:
05/12/2014
Publication #:
Pub Dt:
09/04/2014
Title:
SEMICONDUCTOR STRUCTURES INCLUDING TIGHT PITCH CONTACTS
78
Patent #:
Issue Dt:
05/14/2019
Application #:
14275585
Filing Dt:
05/12/2014
Publication #:
Pub Dt:
11/06/2014
Title:
Systems and Methods for Internal Initialization of a Nonvolatile Memory
79
Patent #:
Issue Dt:
10/06/2015
Application #:
14275599
Filing Dt:
05/12/2014
Publication #:
Pub Dt:
11/06/2014
Title:
FAULT-TOLERANT NON-VOLATILE INTEGRATED CIRCUIT MEMORY
80
Patent #:
Issue Dt:
09/01/2015
Application #:
14275600
Filing Dt:
05/12/2014
Publication #:
Pub Dt:
09/04/2014
Title:
LITHOGRAPHY METHOD AND DEVICE
81
Patent #:
Issue Dt:
10/27/2015
Application #:
14275727
Filing Dt:
05/12/2014
Publication #:
Pub Dt:
11/13/2014
Title:
METHOD AND APPARATUS FOR CONFIGURING WRITE PERFORMANCE FOR ELECTRICALLY WRITABLE MEMORY DEVICES
82
Patent #:
Issue Dt:
12/01/2015
Application #:
14275847
Filing Dt:
05/12/2014
Publication #:
Pub Dt:
09/04/2014
Title:
JFET DEVICES WITH INCREASED BARRIER HEIGHT AND METHODS OF MAKING SAME
83
Patent #:
Issue Dt:
01/26/2016
Application #:
14276163
Filing Dt:
05/13/2014
Publication #:
Pub Dt:
09/04/2014
Title:
SOLID STATE LIGHTING DEVICES WITH REDUCED CRYSTAL LATTICE DISLOCATIONS AND ASSOCIATED METHODS OF MANUFACTURING
84
Patent #:
Issue Dt:
11/10/2015
Application #:
14276198
Filing Dt:
05/13/2014
Publication #:
Pub Dt:
09/04/2014
Title:
Arrays Of Nonvolatile Memory Cells And Methods Of Forming Arrays Of Nonvolatile Memory Cells
85
Patent #:
Issue Dt:
03/22/2016
Application #:
14276204
Filing Dt:
05/13/2014
Publication #:
Pub Dt:
09/04/2014
Title:
SEMICONDUCTOR DEVICE STRUCTURES COMPRISING A POLYMER BONDED TO A BASE MATERIAL AND METHODS OF FABRICATION
86
Patent #:
NONE
Issue Dt:
Application #:
14276473
Filing Dt:
05/13/2014
Publication #:
Pub Dt:
09/04/2014
Title:
GROWN NANOFIN TRANSISTORS
87
Patent #:
Issue Dt:
01/12/2016
Application #:
14277134
Filing Dt:
05/14/2014
Publication #:
Pub Dt:
09/04/2014
Title:
Field Effect Transistor Devices
88
Patent #:
Issue Dt:
01/05/2016
Application #:
14277150
Filing Dt:
05/14/2014
Publication #:
Pub Dt:
08/28/2014
Title:
VERTICAL MOSFET TRANSISTOR, IN PARTICULAR OPERATING AS A SELECTOR IN NONVOLATILE MEMORY DEVICES
89
Patent #:
Issue Dt:
10/28/2014
Application #:
14277200
Filing Dt:
05/14/2014
Publication #:
Pub Dt:
09/04/2014
Title:
DISTRIBUTED SEMICONDUCTOR DEVICE METHODS, APPARATUS, AND SYSTEMS
90
Patent #:
Issue Dt:
06/23/2015
Application #:
14277221
Filing Dt:
05/14/2014
Publication #:
Pub Dt:
09/04/2014
Title:
MIXED VALENT OXIDE MEMORY AND METHOD
91
Patent #:
Issue Dt:
05/24/2016
Application #:
14277301
Filing Dt:
05/14/2014
Publication #:
Pub Dt:
10/09/2014
Title:
PROGRAMMING MEMORY CELLS USING SMALLER STEP VOLTAGES FOR HIGHER PROGRAM LEVELS
92
Patent #:
NONE
Issue Dt:
Application #:
14277323
Filing Dt:
05/14/2014
Publication #:
Pub Dt:
09/04/2014
Title:
LITHOGRAPHY WAVE-FRONT CONTROL SYSTEM AND METHOD
93
Patent #:
Issue Dt:
12/09/2014
Application #:
14277352
Filing Dt:
05/14/2014
Publication #:
Pub Dt:
09/04/2014
Title:
PIXEL TO PIXEL CHARGE COPIER CIRCUIT APPARATUS, SYSTEMS, AND METHODS
94
Patent #:
Issue Dt:
07/14/2015
Application #:
14277443
Filing Dt:
05/14/2014
Publication #:
Pub Dt:
09/04/2014
Title:
POWER SAVING MEMORY APPARATUS, SYSTEMS, AND METHODS
95
Patent #:
Issue Dt:
05/05/2015
Application #:
14277507
Filing Dt:
05/14/2014
Publication #:
Pub Dt:
09/04/2014
Title:
METHODS FOR FORMING A CONDUCTIVE MATERIAL AND METHODS FOR FORMING A CONDUCTIVE STRUCTURE
96
Patent #:
Issue Dt:
12/01/2015
Application #:
14277981
Filing Dt:
05/15/2014
Publication #:
Pub Dt:
10/02/2014
Title:
DATA RECOVERY IN A SOLID STATE STORAGE SYSTEM
97
Patent #:
Issue Dt:
05/17/2016
Application #:
14278510
Filing Dt:
05/15/2014
Publication #:
Pub Dt:
09/25/2014
Title:
BOOT PARTITIONS IN MEMORY DEVICES AND SYSTEMS
98
Patent #:
Issue Dt:
07/12/2016
Application #:
14280206
Filing Dt:
05/16/2014
Publication #:
Pub Dt:
11/19/2015
Title:
APPARATUSES AND METHODS FOR ACCESSING MEMORY INCLUDING SENSE AMPLIFIER SECTIONS AND COUPLED SOURCES
99
Patent #:
Issue Dt:
12/27/2016
Application #:
14280840
Filing Dt:
05/19/2014
Publication #:
Pub Dt:
09/11/2014
Title:
TIMING SYNCHRONIZATION CIRCUIT WITH LOOP COUNTER
100
Patent #:
Issue Dt:
08/09/2016
Application #:
14280861
Filing Dt:
05/19/2014
Publication #:
Pub Dt:
09/11/2014
Title:
MEMORY SYSTEMS AND METHODS FOR CONTROLLING THE TIMING OF RECEIVING READ DATA
Assignor
1
Exec Dt:
06/29/2018
Assignee
1
8000 S. FEDERAL WAY
BOISE, IDAHO 83707
Correspondence name and address
WSGR, C/O QUI LU FLOOD, SENIOR PARALEGAL
ONE MARKET, SPEAR TOWER, SUITE 3300
SAN FRANCISCO, CA 94105

Search Results as of: 05/14/2024 01:27 AM
If you have any comments or questions concerning the data displayed, contact PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified: August 25, 2017 v.2.6
| .HOME | INDEX| SEARCH | eBUSINESS | CONTACT US | PRIVACY STATEMENT