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Reel/Frame:047243/0001   Pages: 959
Recorded: 08/23/2018
Attorney Dkt #:4816.238
Conveyance: RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).
1
Patent #:
Issue Dt:
04/23/2019
Application #:
14705762
Filing Dt:
05/06/2015
Publication #:
Pub Dt:
11/12/2015
Title:
SEMICONDUCTOR MEMORY DEVICE INCLUDING OUTPUT BUFFER
2
Patent #:
Issue Dt:
05/01/2018
Application #:
14706182
Filing Dt:
05/07/2015
Publication #:
Pub Dt:
11/10/2016
Title:
Magnetic Tunnel Junctions
3
Patent #:
Issue Dt:
09/13/2016
Application #:
14706258
Filing Dt:
05/07/2015
Publication #:
Pub Dt:
11/19/2015
Title:
SEMICONDUCTOR DEVICE INCLUDING FILLING MATERIAL PROVIDED IN SPACE DEFINED BY THREE SEMICONDUCTOR CHIPS
4
Patent #:
Issue Dt:
11/03/2020
Application #:
14706490
Filing Dt:
05/07/2015
Publication #:
Pub Dt:
11/12/2015
Title:
IN-MEMORY LIGHTWEIGHT MEMORY COHERENCE PROTOCOL
5
Patent #:
Issue Dt:
11/17/2020
Application #:
14706516
Filing Dt:
05/07/2015
Publication #:
Pub Dt:
11/12/2015
Title:
STACKED MEMORY DEVICE SYSTEM INTERCONNECT DIRECTORY-BASED CACHE COHERENCE METHODOLOGY
6
Patent #:
Issue Dt:
11/07/2017
Application #:
14706827
Filing Dt:
05/07/2015
Publication #:
Pub Dt:
08/27/2015
Title:
SOLID-STATE TRANSDUCER DEVICES WITH OPTICALLY-TRANSMISSIVE CARRIER SUBSTRATES AND RELATED SYSTEMS, METHODS, AND DEVICES
7
Patent #:
Issue Dt:
12/13/2016
Application #:
14707684
Filing Dt:
05/08/2015
Publication #:
Pub Dt:
08/27/2015
Title:
THRESHOLD VOLTAGE COMPENSATION IN A MEMORY
8
Patent #:
Issue Dt:
08/13/2019
Application #:
14707749
Filing Dt:
05/08/2015
Publication #:
Pub Dt:
08/27/2015
Title:
METHODS FOR FORMING A STRING OF MEMORY CELLS AND APPARATUSES HAVING A VERTICAL STRING OF MEMORY CELLS INCLUDING METAL
9
Patent #:
Issue Dt:
03/21/2017
Application #:
14707878
Filing Dt:
05/08/2015
Publication #:
Pub Dt:
11/10/2016
Title:
FREQUENCY SYNTHESIS FOR MEMORY INPUT-OUTPUT OPERATIONS
10
Patent #:
Issue Dt:
11/20/2018
Application #:
14707893
Filing Dt:
05/08/2015
Publication #:
Pub Dt:
08/27/2015
Title:
APPARATUSES AND METHODS FOR SELECTIVE ROW REFRESHES
11
Patent #:
Issue Dt:
01/01/2019
Application #:
14707951
Filing Dt:
05/08/2015
Publication #:
Pub Dt:
11/19/2015
Title:
SEMICONDUCTOR DEVICE INCLUDING SENSOR
12
Patent #:
Issue Dt:
08/22/2017
Application #:
14708001
Filing Dt:
05/08/2015
Publication #:
Pub Dt:
11/26/2015
Title:
SEMICONDUCTOR DEVICE INCLUDING AMPLIFIER
13
Patent #:
Issue Dt:
04/19/2016
Application #:
14709210
Filing Dt:
05/11/2015
Publication #:
Pub Dt:
08/27/2015
Title:
APPARATUSES AND METHODS INCLUDING MEMORY ARRAY DATA LINE SELECTION
14
Patent #:
Issue Dt:
10/11/2016
Application #:
14710498
Filing Dt:
05/12/2015
Publication #:
Pub Dt:
08/27/2015
Title:
SYSTEMS AND METHODS USING SINGLE ANTENNA FOR MULTIPLE RESONANT FREQUENCY RANGES
15
Patent #:
Issue Dt:
07/12/2016
Application #:
14710976
Filing Dt:
05/13/2015
Publication #:
Pub Dt:
09/03/2015
Title:
MEMORY ARRAYS WITH A MEMORY CELL ADJACENT TO A SMALLER SIZE OF A PILLAR HAVING A GREATER CHANNEL LENGTH THAN A MEMORY CELL ADJACENT TO A LARGER SIZE OF THE PILLAR AND METHODS
16
Patent #:
Issue Dt:
06/07/2016
Application #:
14711138
Filing Dt:
05/13/2015
Publication #:
Pub Dt:
11/19/2015
Title:
SEMICONDUCTOR CHIP COVERED WITH SEALING RESIN HAVING A FILLER MATERIAL
17
Patent #:
Issue Dt:
10/10/2017
Application #:
14712219
Filing Dt:
05/14/2015
Publication #:
Pub Dt:
09/03/2015
Title:
METHODS OF FORMING ONE OR MORE COVERED VOIDS IN A SEMICONDUCTOR SUBSTRATE
18
Patent #:
Issue Dt:
07/19/2016
Application #:
14712241
Filing Dt:
05/14/2015
Title:
MEMORY STRUCTURES AND RELATED CROSS-POINT MEMORY ARRAYS, ELECTRONIC SYSTEMS, AND METHODS OF FORMING MEMORY STRUCTURES
19
Patent #:
NONE
Issue Dt:
Application #:
14712291
Filing Dt:
05/14/2015
Publication #:
Pub Dt:
09/03/2015
Title:
Memory Cells and Methods Of Forming Memory Cells
20
Patent #:
Issue Dt:
05/08/2018
Application #:
14712610
Filing Dt:
05/14/2015
Publication #:
Pub Dt:
11/17/2016
Title:
APPARATUSES AND METHODS FOR ASYMMETRIC INPUT/OUTPUT INTERFACE FOR A MEMORY
21
Patent #:
Issue Dt:
03/06/2018
Application #:
14713121
Filing Dt:
05/15/2015
Publication #:
Pub Dt:
12/10/2015
Title:
VIRTUAL ADDRESS TABLE
22
Patent #:
Issue Dt:
03/21/2017
Application #:
14713229
Filing Dt:
05/15/2015
Publication #:
Pub Dt:
11/26/2015
Title:
SEMICONDUCTOR DEVICE INCLUDING PLURAL SEMICONDUCTOR CHIPS STACKED ON SUBSTRATE
23
Patent #:
Issue Dt:
05/10/2016
Application #:
14713468
Filing Dt:
05/15/2015
Publication #:
Pub Dt:
09/03/2015
Title:
VALIDATING PERSISTENT MEMORY CONTENT FOR PROCESSOR MAIN MEMORY
24
Patent #:
Issue Dt:
07/11/2017
Application #:
14713724
Filing Dt:
05/15/2015
Publication #:
Pub Dt:
12/10/2015
Title:
APPARATUSES AND METHODS FOR PARITY DETERMINATION USING SENSING CIRCUITRY
25
Patent #:
Issue Dt:
04/11/2017
Application #:
14713836
Filing Dt:
05/15/2015
Publication #:
Pub Dt:
09/03/2015
Title:
METHOD FOR FORMING A CIRCUIT BOARD VIA STRUCTURE FOR HIGH SPEED SIGNALING
26
Patent #:
Issue Dt:
06/14/2016
Application #:
14713878
Filing Dt:
05/15/2015
Publication #:
Pub Dt:
10/15/2015
Title:
APPARATUSES, SENSE CIRCUITS, AND METHODS FOR COMPENSATING FOR A WORDLINE VOLTAGE INCREASE
27
Patent #:
Issue Dt:
04/24/2018
Application #:
14713881
Filing Dt:
05/15/2015
Publication #:
Pub Dt:
09/03/2015
Title:
Forming a carbon nano-tube dispersion
28
Patent #:
Issue Dt:
03/20/2018
Application #:
14713942
Filing Dt:
05/15/2015
Publication #:
Pub Dt:
11/26/2015
Title:
APPARATUSES AND METHODS FOR CONTROLLING REFRESH OPERATIONS
29
Patent #:
Issue Dt:
08/16/2016
Application #:
14714599
Filing Dt:
05/18/2015
Title:
PACKAGE-ON-PACKAGE SEMICONDUCTOR ASSEMBLIES AND METHODS OF MANUFACTURING THE SAME
30
Patent #:
Issue Dt:
02/14/2017
Application #:
14714962
Filing Dt:
05/18/2015
Publication #:
Pub Dt:
11/24/2016
Title:
APPARATUS HAVING DICE TO PERORM REFRESH OPERATIONS
31
Patent #:
Issue Dt:
10/03/2017
Application #:
14714999
Filing Dt:
05/18/2015
Publication #:
Pub Dt:
12/10/2015
Title:
DATA STORAGE LAYOUT
32
Patent #:
Issue Dt:
11/15/2016
Application #:
14715001
Filing Dt:
05/18/2015
Publication #:
Pub Dt:
12/10/2015
Title:
COMPARISON OPERATIONS ON LOGICAL REPRESENTATIONS OF VALUES IN MEMORY
33
Patent #:
Issue Dt:
04/18/2017
Application #:
14715126
Filing Dt:
05/18/2015
Publication #:
Pub Dt:
09/10/2015
Title:
NON-VOLATILE MEMORY INCLUDING REFERENCE SIGNAL PATH
34
Patent #:
Issue Dt:
09/27/2016
Application #:
14715161
Filing Dt:
05/18/2015
Publication #:
Pub Dt:
12/10/2015
Title:
APPARATUSES AND METHODS FOR PERFORMING AN EXCLUSIVE OR OPERATION USING SENSING CIRCUITRY
35
Patent #:
Issue Dt:
01/31/2017
Application #:
14715169
Filing Dt:
05/18/2015
Publication #:
Pub Dt:
09/03/2015
Title:
NON-VOLATILE MEMORY PROGRAMMING
36
Patent #:
Issue Dt:
11/28/2017
Application #:
14716079
Filing Dt:
05/19/2015
Publication #:
Pub Dt:
12/10/2015
Title:
COMPARISON OPERATIONS IN MEMORY
37
Patent #:
Issue Dt:
09/19/2017
Application #:
14716176
Filing Dt:
05/19/2015
Publication #:
Pub Dt:
11/24/2016
Title:
SEMICONDUCTOR DEVICE ASSEMBLY WITH HEAT TRANSFER STRUCTURE FORMED FROM SEMICONDUCTOR MATERIAL
38
Patent #:
Issue Dt:
10/10/2017
Application #:
14717471
Filing Dt:
05/20/2015
Publication #:
Pub Dt:
11/24/2016
Title:
VIRTUAL GROUND SENSING CIRCUITRY AND RELATED DEVICES, SYSTEMS, AND METHODS FOR CROSSPOINT FERROELECTRIC MEMORY
39
Patent #:
Issue Dt:
07/18/2017
Application #:
14717491
Filing Dt:
05/20/2015
Publication #:
Pub Dt:
12/10/2015
Title:
PERFORMING LOGICAL OPERATIONS USING SENSING CIRCUITRY
40
Patent #:
Issue Dt:
07/18/2017
Application #:
14717580
Filing Dt:
05/20/2015
Publication #:
Pub Dt:
12/10/2015
Title:
PERFORMING LOGICAL OPERATIONS USING SENSING CIRCUITRY
41
Patent #:
Issue Dt:
09/06/2016
Application #:
14717784
Filing Dt:
05/20/2015
Publication #:
Pub Dt:
09/10/2015
Title:
RESISTANCE VARIABLE MEMORY SENSING
42
Patent #:
Issue Dt:
03/07/2017
Application #:
14718461
Filing Dt:
05/21/2015
Publication #:
Pub Dt:
01/07/2016
Title:
HOST CONTROLLER
43
Patent #:
Issue Dt:
06/26/2018
Application #:
14718649
Filing Dt:
05/21/2015
Publication #:
Pub Dt:
11/24/2016
Title:
TRANSLATION LOOKASIDE BUFFER IN MEMORY
44
Patent #:
Issue Dt:
01/31/2017
Application #:
14718785
Filing Dt:
05/21/2015
Publication #:
Pub Dt:
09/10/2015
Title:
VERTICAL MEMORY DEVICES, MEMORY ARRAYS, AND MEMORY DEVICES
45
Patent #:
Issue Dt:
08/28/2018
Application #:
14719053
Filing Dt:
05/21/2015
Publication #:
Pub Dt:
09/10/2015
Title:
RESISTIVE MEMORY SENSING
46
Patent #:
Issue Dt:
03/22/2016
Application #:
14719519
Filing Dt:
05/22/2015
Publication #:
Pub Dt:
09/10/2015
Title:
DETERMINING AND USING SOFT DATA IN MEMORY DEVICES AND SYSTEMS
47
Patent #:
Issue Dt:
02/26/2019
Application #:
14720015
Filing Dt:
05/22/2015
Publication #:
Pub Dt:
11/24/2016
Title:
SEMICONDUCTOR DEVICE ASSEMBLY WITH VAPOR CHAMBER
48
Patent #:
Issue Dt:
09/20/2016
Application #:
14721086
Filing Dt:
05/26/2015
Publication #:
Pub Dt:
12/10/2015
Title:
PERFORMING LOGICAL OPERATIONS USING SENSING CIRCUITRY
49
Patent #:
Issue Dt:
11/08/2016
Application #:
14721841
Filing Dt:
05/26/2015
Publication #:
Pub Dt:
09/10/2015
Title:
CONTROL ARRANGEMENTS AND METHODS FOR ACCESSING BLOCK ORIENTED NONVOLATILE MEMORY
50
Patent #:
Issue Dt:
11/06/2018
Application #:
14721913
Filing Dt:
05/26/2015
Publication #:
Pub Dt:
12/01/2016
Title:
METHODS AND APPARATUSES FOR ERROR CORRECTION
51
Patent #:
Issue Dt:
03/28/2017
Application #:
14722824
Filing Dt:
05/27/2015
Publication #:
Pub Dt:
12/01/2016
Title:
DEVICES AND METHODS INCLUDING AN ETCH STOP PROTECTION MATERIAL
52
Patent #:
Issue Dt:
04/18/2017
Application #:
14722889
Filing Dt:
05/27/2015
Publication #:
Pub Dt:
09/17/2015
Title:
FORMING ARRAY CONTACTS IN SEMICONDUCTOR MEMORIES
53
Patent #:
Issue Dt:
05/30/2017
Application #:
14722941
Filing Dt:
05/27/2015
Publication #:
Pub Dt:
09/10/2015
Title:
COUNTER OPERATION IN A STATE MACHINE LATTICE
54
Patent #:
Issue Dt:
01/24/2017
Application #:
14724065
Filing Dt:
05/28/2015
Publication #:
Pub Dt:
09/17/2015
Title:
METHODS, DEVICES, AND SYSTEMS FOR DATA SENSING
55
Patent #:
Issue Dt:
09/11/2018
Application #:
14724366
Filing Dt:
05/28/2015
Publication #:
Pub Dt:
12/10/2015
Title:
APPARATUSES AND METHODS FOR PERFORMING INVERT OPERATIONS USING SENSING CIRCUITRY
56
Patent #:
Issue Dt:
08/15/2017
Application #:
14724446
Filing Dt:
05/28/2015
Publication #:
Pub Dt:
12/03/2015
Title:
SYSTEMS AND METHODS FOR TRANSMITTING PACKETS IN A SCALABLE MEMORY SYSTEM PROTOCOL
57
Patent #:
Issue Dt:
08/29/2017
Application #:
14724473
Filing Dt:
05/28/2015
Publication #:
Pub Dt:
12/03/2015
Title:
SYSTEMS AND METHODS FOR PACKING DATA IN A SCALABLE MEMORY SYSTEM PROTOCOL
58
Patent #:
Issue Dt:
03/21/2017
Application #:
14724489
Filing Dt:
05/28/2015
Publication #:
Pub Dt:
12/03/2015
Title:
SYSTEMS AND METHODS FOR REORDERING PACKET TRANSMISSIONS IN A SCALABLE MEMORY SYSTEM PROTOCOL
59
Patent #:
Issue Dt:
11/21/2017
Application #:
14724510
Filing Dt:
05/28/2015
Publication #:
Pub Dt:
12/03/2015
Title:
SYSTEMS AND METHODS FOR THROTTLING PACKET TRANSMISSION IN A SCALABLE MEMORY SYSTEM PROTOCOL
60
Patent #:
Issue Dt:
12/26/2017
Application #:
14724529
Filing Dt:
05/28/2015
Publication #:
Pub Dt:
09/17/2015
Title:
METHODS, APPARATUS, AND SYSTEMS TO REPAIR MEMORY
61
Patent #:
Issue Dt:
08/02/2016
Application #:
14724554
Filing Dt:
05/28/2015
Publication #:
Pub Dt:
09/17/2015
Title:
TIME-DOMAIN SIGNAL GENERATION
62
Patent #:
Issue Dt:
07/04/2017
Application #:
14724558
Filing Dt:
05/28/2015
Publication #:
Pub Dt:
12/03/2015
Title:
SYSTEMS AND METHODS FOR IMPROVING EFFICIENCIES OF A MEMORY SYSTEM
63
Patent #:
Issue Dt:
04/25/2017
Application #:
14724945
Filing Dt:
05/29/2015
Publication #:
Pub Dt:
12/01/2016
Title:
PROGRAMMING MEMORY CELLS TO BE PROGRAMMED TO DIFFERENT LEVELS TO AN INTERMEDIATE LEVEL FROM A LOWEST LEVEL
64
Patent #:
Issue Dt:
12/29/2015
Application #:
14725619
Filing Dt:
05/29/2015
Publication #:
Pub Dt:
09/17/2015
Title:
APPARATUSES AND METHODS FOR COUPLING LOAD CURRENT TO A COMMON SOURCE
65
Patent #:
Issue Dt:
08/02/2016
Application #:
14725672
Filing Dt:
05/29/2015
Publication #:
Pub Dt:
09/17/2015
Title:
DEVICES AND METHODS FOR OPERATING A SOLID STATE DRIVE
66
Patent #:
Issue Dt:
01/03/2017
Application #:
14725697
Filing Dt:
05/29/2015
Publication #:
Pub Dt:
09/17/2015
Title:
ENABLE/DISABLE OF MEMORY CHUNKS DURING MEMORY ACCESS
67
Patent #:
Issue Dt:
11/22/2016
Application #:
14725749
Filing Dt:
05/29/2015
Publication #:
Pub Dt:
09/17/2015
Title:
TWO-PART PROGRAMMING METHODS
68
Patent #:
Issue Dt:
04/04/2017
Application #:
14725864
Filing Dt:
05/29/2015
Publication #:
Pub Dt:
12/17/2015
Title:
SEMICONDUCTOR DEVICE HAVING OUTPUT BUFFERS AND VOLTAGE PATH COUPLED TO OUTPUT BUFFERS
69
Patent #:
Issue Dt:
10/10/2017
Application #:
14725956
Filing Dt:
05/29/2015
Publication #:
Pub Dt:
12/10/2015
Title:
APPARATUSES AND METHODS FOR PERFORMING LOGICAL OPERATIONS USING SENSING CIRCUITRY
70
Patent #:
Issue Dt:
01/31/2017
Application #:
14726005
Filing Dt:
05/29/2015
Publication #:
Pub Dt:
12/01/2016
Title:
SEMICONDUCTOR DEVICE WITH MODIFIED CURRENT DISTRIBUTION
71
Patent #:
Issue Dt:
10/25/2016
Application #:
14726063
Filing Dt:
05/29/2015
Publication #:
Pub Dt:
02/18/2016
Title:
SEMICONDUCTOR DEVICE INCLUDING INPUT/OUTPUT CIRCUIT
72
Patent #:
Issue Dt:
06/27/2017
Application #:
14726150
Filing Dt:
05/29/2015
Publication #:
Pub Dt:
12/03/2015
Title:
SYSTEMS AND METHODS FOR SEGMENTING DATA STRUCTURES IN A MEMORY SYSTEM
73
Patent #:
Issue Dt:
01/24/2017
Application #:
14726779
Filing Dt:
06/01/2015
Publication #:
Pub Dt:
10/15/2015
Title:
MEMORY CELLS AND SEMICONDUCTOR STRUCTURES INCLUDING ELECTRODES COMPRISING A METAL, AND RELATED METHODS
74
Patent #:
Issue Dt:
03/29/2016
Application #:
14727106
Filing Dt:
06/01/2015
Publication #:
Pub Dt:
09/17/2015
Title:
PHASE CHANGE MEMORY CELLS INCLUDING NITROGENATED CARBON MATERIALS, AND RELATED METHODS
75
Patent #:
Issue Dt:
05/31/2016
Application #:
14728268
Filing Dt:
06/02/2015
Publication #:
Pub Dt:
09/17/2015
Title:
MEMORY CELLS AND METHODS OF FABRICATION
76
Patent #:
Issue Dt:
09/06/2016
Application #:
14728900
Filing Dt:
06/02/2015
Publication #:
Pub Dt:
09/17/2015
Title:
METHOD OF DYNAMICALLY SELECTING MEMORY CELL CAPACITY
77
Patent #:
Issue Dt:
03/26/2019
Application #:
14730062
Filing Dt:
06/03/2015
Publication #:
Pub Dt:
10/15/2015
Title:
METHOD AND APPARATUS FOR PROVIDING PRELOADED NON-VOLATILE MEMORY CONTENT
78
Patent #:
Issue Dt:
09/13/2016
Application #:
14730372
Filing Dt:
06/04/2015
Title:
LEAKAGE CURRENT DETECTION
79
Patent #:
Issue Dt:
01/09/2018
Application #:
14730681
Filing Dt:
06/04/2015
Publication #:
Pub Dt:
12/08/2016
Title:
METHODS OF MANUFACTURING MULTI-DIE SEMICONDUCTOR DEVICE PACKAGES AND RELATED ASSEMBLIES
80
Patent #:
Issue Dt:
07/18/2017
Application #:
14733330
Filing Dt:
06/08/2015
Publication #:
Pub Dt:
01/14/2016
Title:
SEMICONDUCTOR DEVICES WITH RECESSED INTERCONNECTS
81
Patent #:
Issue Dt:
02/14/2017
Application #:
14733603
Filing Dt:
06/08/2015
Publication #:
Pub Dt:
09/24/2015
Title:
APPARATUSES AND METHODS FOR PROVIDING SET AND RESET VOLTAGES AT THE SAME TIME
82
Patent #:
Issue Dt:
01/01/2019
Application #:
14733664
Filing Dt:
06/08/2015
Publication #:
Pub Dt:
09/24/2015
Title:
RECYCLED VERSION NUMBER VALUES IN FLASH MEMORY
83
Patent #:
Issue Dt:
07/12/2016
Application #:
14734483
Filing Dt:
06/09/2015
Publication #:
Pub Dt:
09/24/2015
Title:
DETERMINING SOFT DATA USING A CLASSIFICATION CODE
84
Patent #:
Issue Dt:
06/05/2018
Application #:
14735312
Filing Dt:
06/10/2015
Publication #:
Pub Dt:
10/29/2015
Title:
DETERMINING WHETHER A MEMORY CELL STATE IS IN A VALLEY BETWEEN ADJACENT DATA STATES
85
Patent #:
Issue Dt:
02/02/2016
Application #:
14735350
Filing Dt:
06/10/2015
Publication #:
Pub Dt:
10/01/2015
Title:
MEMORY DEVICES WITH LOCAL AND GLOBAL DEVICES AT SUBSTANTIALLY THE SAME LEVEL ABOVE STACKED TIERS OF MEMORY CELLS AND METHODS
86
Patent #:
Issue Dt:
07/04/2017
Application #:
14735498
Filing Dt:
06/10/2015
Publication #:
Pub Dt:
12/15/2016
Title:
MEMORY HAVING A STATIC CACHE AND A DYNAMIC CACHE
87
Patent #:
Issue Dt:
09/12/2017
Application #:
14735803
Filing Dt:
06/10/2015
Publication #:
Pub Dt:
12/15/2016
Title:
DATA STORAGE ERROR PROTECTION
88
Patent #:
Issue Dt:
09/19/2017
Application #:
14735838
Filing Dt:
06/10/2015
Publication #:
Pub Dt:
12/15/2016
Title:
STRIPE MAPPING IN MEMORY
89
Patent #:
Issue Dt:
11/07/2017
Application #:
14736005
Filing Dt:
06/10/2015
Publication #:
Pub Dt:
12/15/2016
Title:
CLOCK SIGNAL AND SUPPLY VOLTAGE VARIATION TRACKING
90
Patent #:
Issue Dt:
04/03/2018
Application #:
14736052
Filing Dt:
06/10/2015
Publication #:
Pub Dt:
10/01/2015
Title:
INSTRUCTION INSERTION IN STATE MACHINE ENGINES
91
Patent #:
Issue Dt:
05/22/2018
Application #:
14738423
Filing Dt:
06/12/2015
Publication #:
Pub Dt:
10/01/2015
Title:
SYSTEM AND METHOD FOR UPDATING READ-ONLY MEMORY IN SMART CARD MEMORY MODULES
92
Patent #:
Issue Dt:
05/31/2016
Application #:
14738453
Filing Dt:
06/12/2015
Publication #:
Pub Dt:
10/01/2015
Title:
FORMING RESISTIVE RANDOM ACCESS MEMORIES TOGETHER WITH FUSE ARRAYS
93
Patent #:
Issue Dt:
06/07/2016
Application #:
14738663
Filing Dt:
06/12/2015
Publication #:
Pub Dt:
12/10/2015
Title:
DISCONTINUOUS PATTERNED BONDS FOR SEMICONDUCTOR DEVICES AND ASSOCIATED SYSTEMS AND METHODS
94
Patent #:
Issue Dt:
05/17/2016
Application #:
14739452
Filing Dt:
06/15/2015
Publication #:
Pub Dt:
10/01/2015
Title:
SEMICONDUCTOR STRUCTURES AND DEVICES INCLUDING CONDUCTIVE LINES AND PERIPHERAL CONDUCTIVE PADS
95
Patent #:
NONE
Issue Dt:
Application #:
14740072
Filing Dt:
06/15/2015
Publication #:
Pub Dt:
10/01/2015
Title:
DRAM Cells and Methods of Forming Silicon Dioxide
96
Patent #:
Issue Dt:
02/23/2016
Application #:
14740074
Filing Dt:
06/15/2015
Publication #:
Pub Dt:
10/01/2015
Title:
CONFIGURABLE REFERENCE CURRENT GENERATION FOR NON VOLATILE MEMORY
97
Patent #:
Issue Dt:
10/03/2017
Application #:
14740685
Filing Dt:
06/16/2015
Publication #:
Pub Dt:
12/22/2016
Title:
BOOSTING CHANNELS OF MEMORY CELLS TO REDUCE PROGRAM DISTURB
98
Patent #:
Issue Dt:
12/13/2016
Application #:
14740738
Filing Dt:
06/16/2015
Publication #:
Pub Dt:
10/29/2015
Title:
MEMORY CELLS HAVING A COMMON GATE TERMINAL
99
Patent #:
Issue Dt:
01/24/2017
Application #:
14742979
Filing Dt:
06/18/2015
Publication #:
Pub Dt:
10/08/2015
Title:
VERTICALLY BASE-CONNECTED BIPOLAR TRANSISTOR
100
Patent #:
NONE
Issue Dt:
Application #:
14743124
Filing Dt:
06/18/2015
Publication #:
Pub Dt:
10/22/2015
Title:
MULTI-CHIP MODULES INCLUDING STACKED SEMICONDUCTOR DICE
Assignor
1
Exec Dt:
06/29/2018
Assignee
1
8000 S. FEDERAL WAY
BOISE, IDAHO 83707
Correspondence name and address
WSGR, C/O QUI LU FLOOD, SENIOR PARALEGAL
ONE MARKET, SPEAR TOWER, SUITE 3300
SAN FRANCISCO, CA 94105

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