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|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/22/1998
|
Application #:
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08655683
|
Filing Dt:
|
06/03/1996
|
|
Title:
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METHOD OF FORMING CMOS CIRCUITRY INCLUDING PATTERNING A LAYER OF CONDUCTIVE MATERIAL OVERLYING FIELD ISOLATION OXIDE
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Patent #:
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|
Issue Dt:
|
08/17/1999
|
Application #:
|
08655728
|
Filing Dt:
|
05/30/1996
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|
Title:
|
SILICON NITRIDE DEPOSITION METHOD
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/02/1997
|
Application #:
|
08655884
|
Filing Dt:
|
05/31/1996
|
|
Title:
|
LUMINESCENT PHOSPHOR AND METHODS RELATING TO PRODUCTION THEREOF
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/02/1997
|
Application #:
|
08656712
|
Filing Dt:
|
06/03/1996
|
|
Title:
|
METHOD FOR FORMING A METALLIZATION LAYER
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/11/1998
|
Application #:
|
08657816
|
Filing Dt:
|
05/31/1996
|
|
Title:
|
SEMICONDUCTOR PROCESSING METHOD FOR PROVIDING LARGE GRAIN POLYSILICON FILMS
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|
|
|
Patent #:
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|
Issue Dt:
|
09/07/1999
|
Application #:
|
08657854
|
Filing Dt:
|
05/31/1996
|
|
Title:
|
METHOD AND APPARATUS FOR TESTING UNPACKAGED SEMICONDUCTOR DICE
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|
|
|
|
Patent #:
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|
Issue Dt:
|
07/21/1998
|
Application #:
|
08659145
|
Filing Dt:
|
06/05/1996
|
|
Title:
|
METHOD OF WAFER CLEANING, AND SYSTEM AND CLEANING SOLUTION REGARDING SAME
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|
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|
Patent #:
|
|
Issue Dt:
|
08/15/2000
|
Application #:
|
08659724
|
Filing Dt:
|
06/06/1996
|
|
Title:
|
HIGH SPEED GLOBAL ROW REDUNDANCY SYSTEM
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/28/1998
|
Application #:
|
08660109
|
Filing Dt:
|
06/07/1996
|
|
Title:
|
MEMORY DEVICE WITH MULTIPLE INPUT/OUTPUT CONNECTIONS
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|
|
|
Patent #:
|
|
Issue Dt:
|
09/29/1998
|
Application #:
|
08660110
|
Filing Dt:
|
06/07/1996
|
|
Title:
|
SYSTEM AND METHOD FOR CHANGING THE CONNECTED BEHAVIOR OF A CIRCUIT DESIGN SCHEMATIC
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|
|
|
Patent #:
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|
Issue Dt:
|
10/21/1997
|
Application #:
|
08660204
|
Filing Dt:
|
06/03/1996
|
|
Title:
|
CIRCUIT FOR GENERATING A DELAYED STANDBY SIGNAL IN RESPONSE TO AN EXTERNAL STANDBY COMMAND
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|
|
|
Patent #:
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|
Issue Dt:
|
07/07/1998
|
Application #:
|
08660847
|
Filing Dt:
|
06/10/1996
|
|
Title:
|
METHOD FOR FORMING A CAPACITOR
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|
|
|
|
Patent #:
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|
Issue Dt:
|
04/06/1999
|
Application #:
|
08660849
|
Filing Dt:
|
06/10/1996
|
|
Title:
|
TANTALUM- ALUMINUM- NITROGEN MATERIAL FOR SEMICONDUCTOR DEVICES
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/15/1998
|
Application #:
|
08661081
|
Filing Dt:
|
06/10/1996
|
|
Title:
|
METHOD AND SYSTEM FOR CREATING A NETLIST ALLOWING CURRENT MEASUREMENT THROUGH A SUB-CIRCUIT
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/20/1999
|
Application #:
|
08662414
|
Filing Dt:
|
06/10/1996
|
|
Title:
|
CARRIER FOR TESTING SEMICONDUCTOR DICE
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/16/1999
|
Application #:
|
08662483
|
Filing Dt:
|
06/13/1996
|
|
Title:
|
UNDER-PAD FOR CHEMICAL-MECHANICAL PLANARIZATION OF SEMICONDUCTOR WAFERS
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|
|
|
Patent #:
|
|
Issue Dt:
|
01/27/1998
|
Application #:
|
08662852
|
Filing Dt:
|
06/12/1996
|
|
Title:
|
METHOD FOR GROWING FIELD OXIDE TO MINIMIZE BIRDS' BREAK LENGTH
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|
|
|
Patent #:
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|
Issue Dt:
|
06/17/1997
|
Application #:
|
08662978
|
Filing Dt:
|
06/13/1996
|
|
Title:
|
SEMICONDUCTOR FILM WAFER CASSETTE
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|
|
|
Patent #:
|
|
Issue Dt:
|
09/28/1999
|
Application #:
|
08663386
|
Filing Dt:
|
06/13/1996
|
|
Title:
|
ORD SELECTION LOGIC TO IMPLEMENT AN 80 OR 96-BIT CACHE SRAM
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|
|
|
|
Patent #:
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|
Issue Dt:
|
11/24/1998
|
Application #:
|
08663524
|
Filing Dt:
|
06/13/1996
|
|
Title:
|
CHARGE PUMP TYPE OF NEGATIVE VOLTAGE GENERATOR CIRCUIT AND METHOD
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|
|
|
|
Patent #:
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|
Issue Dt:
|
02/23/1999
|
Application #:
|
08663551
|
Filing Dt:
|
06/13/1996
|
|
Title:
|
SPUTTERED METAL SILICIDE FILM STRESS CONTROL BY GRAIN BOUNDARY STUFFING
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/05/1999
|
Application #:
|
08663996
|
Filing Dt:
|
06/14/1996
|
|
Title:
|
METHOD OF DEPOSITING A SMOOTH CONFORMAL ALUMINUM FILM ON A REFRACTORY METAL NITRIDE LAYER
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|
|
|
Patent #:
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|
Issue Dt:
|
06/02/1998
|
Application #:
|
08664083
|
Filing Dt:
|
06/13/1996
|
|
Title:
|
PHASE GENERATOR CIRCUIT FOR CHARGE PUMP TYPE OF NEGATIVE SUPPLY CIRCUIT
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|
|
|
|
Patent #:
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|
Issue Dt:
|
04/20/1999
|
Application #:
|
08664109
|
Filing Dt:
|
06/13/1996
|
|
Title:
|
STRUCTURE AND A METHOD FOR STORING INFORMATION IN A SEMICONDUCTOR DEVICE
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|
|
|
|
Patent #:
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|
Issue Dt:
|
09/29/1998
|
Application #:
|
08664305
|
Filing Dt:
|
06/11/1996
|
|
Title:
|
METHOD OF FORMING A TA2O5 DIELECTRIC LAYER, METHOD OF FORMING A CAPACITOR HAVING A TA2O5 DIELECTRIC LAYER, AND CAPACITOR CONSTRUCTION
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|
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|
Patent #:
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|
Issue Dt:
|
10/14/1997
|
Application #:
|
08664409
|
Filing Dt:
|
06/17/1996
|
|
Title:
|
LEADS BETWEEN CHIPS ASSEMBLY
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/02/1997
|
Application #:
|
08664829
|
Filing Dt:
|
06/17/1996
|
|
Title:
|
THIN FILM TRANSISTOR REDUNDANCY STRUCTURE
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/17/1998
|
Application #:
|
08664875
|
Filing Dt:
|
06/18/1996
|
|
Title:
|
ECL TO CMOS LEVEL TRANSLATOR USING DELAYED FEEDBACK FOR HIGH SPEED BICMOS APPLICATIONS
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/10/1998
|
Application #:
|
08665405
|
Filing Dt:
|
06/18/1996
|
|
Title:
|
CIRCUIT BOARD RETENTION SYSTEM
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|
|
|
|
Patent #:
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|
Issue Dt:
|
10/05/1999
|
Application #:
|
08665481
|
Filing Dt:
|
06/18/1996
|
|
Title:
|
METAL-OXIDE-SEMICONDUCTOR CAPACITOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/12/1996
|
Application #:
|
08665621
|
Filing Dt:
|
06/18/1996
|
|
Title:
|
RAM ROW DECODE CIRCUITRY THAT UTILIZES A PRECHARGE CIRCUIT THAT IS DEACTIVATED BY A FEEDBACK FROM AN ACTIVATED WORD LINE DRIVER
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/19/1997
|
Application #:
|
08665862
|
Filing Dt:
|
06/19/1996
|
|
Title:
|
NEGATIVE WORD LINE VOLTAGE REGULATION CIRCUIT FOR ELECTRICALLY ERASABLE SEMICONDUCTOR MEMORY DEVICES
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/09/1998
|
Application #:
|
08666247
|
Filing Dt:
|
06/20/1996
|
|
Title:
|
METHOD AND APPARATUS FOR BACK-END REPAIR OF MULTI-CHIP MODULES
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/22/1998
|
Application #:
|
08666896
|
Filing Dt:
|
06/19/1996
|
|
Title:
|
CAPACITOR CONSTRUCTION HAVING AN AMORPHOUS ELECTRICALLY CONDUCTIVE LAYER
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|
|
|
|
Patent #:
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|
Issue Dt:
|
12/21/1999
|
Application #:
|
08667097
|
Filing Dt:
|
06/20/1996
|
|
Title:
|
PROCESS FOR FORMING AN INTEGRATED CIRCUIT COMPRISING NON-VOLATILE MEMORY CELLS AND SIDE TRANSISTORS AND CORRESPONDING IC
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/23/1999
|
Application #:
|
08667704
|
Filing Dt:
|
06/21/1996
|
|
Title:
|
THERMAL CONDITIONING APPARATUS
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/19/1999
|
Application #:
|
08667705
|
Filing Dt:
|
06/21/1996
|
|
Title:
|
SPIN COATING BOWL
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/14/1998
|
Application #:
|
08667738
|
Filing Dt:
|
06/21/1996
|
|
Title:
|
MODULAR RESIST PROCESSING SYSTEM
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/23/1998
|
Application #:
|
08667740
|
Filing Dt:
|
06/21/1996
|
|
Title:
|
SPIN COATING BOWL EXHAUST SYSTEM
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|
|
|
|
Patent #:
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|
Issue Dt:
|
12/15/1998
|
Application #:
|
08667784
|
Filing Dt:
|
06/21/1996
|
|
Title:
|
SPIN COATING DISPENSE ARM ASSEMBLY
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/16/1999
|
Application #:
|
08667785
|
Filing Dt:
|
06/21/1996
|
|
Title:
|
SPIN COATING SPINDLE AND CHUCK ASSEMBLY
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|
|
|
|
Patent #:
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|
Issue Dt:
|
11/25/1997
|
Application #:
|
08667907
|
Filing Dt:
|
06/12/1996
|
|
Title:
|
METHOD OF DEPOSITING TUNGSTEN NITRIDE USING A SOURCE GAS COMPRISING SILICON
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|
|
|
|
Patent #:
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|
Issue Dt:
|
12/08/1998
|
Application #:
|
08668045
|
Filing Dt:
|
06/18/1996
|
|
Title:
|
APPARATUS AND METHOD FOR CONTROLLING THE TEMPERATURE OF AN INTEGRATED CIRCUIT UNDER TEST
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/03/1998
|
Application #:
|
08668765
|
Filing Dt:
|
06/25/1996
|
|
Title:
|
LOC SIMM
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|
|
|
|
Patent #:
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|
Issue Dt:
|
10/20/1998
|
Application #:
|
08668855
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Filing Dt:
|
06/24/1996
|
|
Title:
|
METHOD OF INHIBITING DEPOSITION OF MATERIAL ON AN INTERNAL WALL OF A CHEMICAL VAPOR DEPOSITION REACTOR
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|
|
|
|
Patent #:
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|
Issue Dt:
|
01/05/1999
|
Application #:
|
08670179
|
Filing Dt:
|
06/20/1996
|
|
Title:
|
PROCESS FOR FORMING AN INTEGRATED CIRCUIT COMPRISING NON-VOLATILE MEMORY CELLS AND SIDE TRANSISTORS OF AT LEAST TWO DIFFERENT TYPES, AND CORRESPONDING IC
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/22/1998
|
Application #:
|
08670318
|
Filing Dt:
|
08/22/1996
|
|
Title:
|
METHOD OF FORMING CONTACT OPENINGS AND AN ELECTRONIC COMPONENT FORMED FROM THE SAME AND OTHER METHODS
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/01/1998
|
Application #:
|
08670644
|
Filing Dt:
|
06/26/1996
|
|
Title:
|
CAPACITOR, AND METHODS FOR FORMING A CAPACITOR
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/13/1999
|
Application #:
|
08671163
|
Filing Dt:
|
06/26/1996
|
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Title:
|
ETCHING METHOD FOR REDUCING COSPING AT OPENINGS
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|
|
|
Patent #:
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|
Issue Dt:
|
11/11/1997
|
Application #:
|
08671248
|
Filing Dt:
|
06/27/1996
|
|
Title:
|
INTEGRATED CIRCUIT M0DULE HAVING ON-CHIP SURGE CAPACITORS
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|
|
|
|
Patent #:
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|
Issue Dt:
|
02/02/1999
|
Application #:
|
08671315
|
Filing Dt:
|
07/16/1996
|
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Title:
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SINGLE DIGIT LINE WITH CELL CONTACT INTERCONNECT
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|
|
|
Patent #:
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|
Issue Dt:
|
07/22/1997
|
Application #:
|
08671717
|
Filing Dt:
|
06/28/1996
|
|
Title:
|
METHOD AND APPARATUS FOR MONITORING ILLEGAL CONDITIONS IN A NONVOLATILE MEMORY CIRCUIT
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/07/1998
|
Application #:
|
08671848
|
Filing Dt:
|
06/28/1996
|
|
Title:
|
MEMORY DEVICE WITH IMPROVED YIELD AND RELIABILITY
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|
|
|
|
Patent #:
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|
Issue Dt:
|
08/11/1998
|
Application #:
|
08672411
|
Filing Dt:
|
06/28/1996
|
|
Title:
|
APPARATUS FOR PROTECTING GATE ELECTRODES OF TARGET TRANSISITORS IN THE GATE ARRAY FROM GATE CHARGING BY EMPLOYING FREE TRANSISTORS IN THE GATE ARRAY
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|
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|
Patent #:
|
|
Issue Dt:
|
05/26/1998
|
Application #:
|
08672412
|
Filing Dt:
|
06/28/1996
|
|
Title:
|
SLOW SPEED DRIVER WITH CONTROLLED SLEW RATE
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|
|
|
|
Patent #:
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|
Issue Dt:
|
06/27/2000
|
Application #:
|
08672643
|
Filing Dt:
|
06/28/1996
|
|
Title:
|
MULTIVOLTAGE KEYED ELECTRICAL CONNECTOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/23/1998
|
Application #:
|
08672678
|
Filing Dt:
|
06/28/1996
|
|
Title:
|
APPARATUS AND METHOD FOR COMPUTATION OF STICKY BIT IN A MULTI-STAGE SHIFTER USED FOR FLOATING POINT ARITHMETIC
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/16/1997
|
Application #:
|
08672979
|
Filing Dt:
|
06/28/1996
|
|
Title:
|
METHOD OF SPUTTER DEPOSITION
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|
|
|
|
Patent #:
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|
Issue Dt:
|
06/01/1999
|
Application #:
|
08673277
|
Filing Dt:
|
06/28/1996
|
|
Title:
|
CLADDING OF AN INTERCONNECT FOR IMPROVED ELECTROMIGRATION PERFORMANCE
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|
|
|
|
Patent #:
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|
Issue Dt:
|
03/10/1998
|
Application #:
|
08673773
|
Filing Dt:
|
06/27/1996
|
|
Title:
|
METHOD OF FORMING CONTACT VIAS AND INTERCONNECT CHANNELS IN A DIELECTRIC LAYER STACK WITH A SINGLE MASK
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|
|
|
Patent #:
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|
Issue Dt:
|
11/09/1999
|
Application #:
|
08673930
|
Filing Dt:
|
07/01/1996
|
|
Title:
|
DIRECT CONNECT CARRIER FOR TESTING SEMICONDUCTOR DICE AND METHOD OF FABRICATION
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|
|
|
|
Patent #:
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|
Issue Dt:
|
05/18/1999
|
Application #:
|
08674194
|
Filing Dt:
|
07/01/1996
|
|
Title:
|
METHOD OF FORMING THIN FILM TRANSISTORS
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/27/1999
|
Application #:
|
08674473
|
Filing Dt:
|
07/02/1996
|
|
Title:
|
METHOD AND APPARATUS FOR TESTING SEMICONDUCTOR DICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/19/1998
|
Application #:
|
08674655
|
Filing Dt:
|
06/25/1996
|
|
Title:
|
SEMICONDUCTOR PROCESSING METHODS OF FORMING COMPLEMENTARY METAL OXIDE SEMICONDUCTOR MEMORY AND OTHER CIRCUITRY, AND MEMORY AND OTHER CIRCUITRY
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|
|
|
|
Patent #:
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|
Issue Dt:
|
08/10/1999
|
Application #:
|
08674886
|
Filing Dt:
|
07/02/1996
|
|
Title:
|
THIN FILM TRANSISTORS
|
|
|
|
|
Patent #:
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|
Issue Dt:
|
07/14/1998
|
Application #:
|
08675007
|
Filing Dt:
|
07/03/1996
|
|
Title:
|
MULTIPLE STAGED POWER UP OF INTEGRATED CIRCUIT
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|
|
|
|
Patent #:
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|
Issue Dt:
|
08/19/1997
|
Application #:
|
08675993
|
Filing Dt:
|
07/09/1996
|
|
Title:
|
METHOD OF FORMING A LINE OF HIGH DENSITY FLOATING GATE TRANSISTORS
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|
|
|
|
Patent #:
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|
Issue Dt:
|
06/02/1998
|
Application #:
|
08675997
|
Filing Dt:
|
07/09/1996
|
|
Title:
|
CAPACITOR, INTEGRATED CIRCUITRY, DIFFUSION BARRIERS, AND METHOD FOR FORMING AN ELECTRICALLY CONDUCTIVE DIFFUSION BARRIER
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|
|
|
|
Patent #:
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|
Issue Dt:
|
03/23/1999
|
Application #:
|
08676587
|
Filing Dt:
|
07/08/1996
|
|
Title:
|
USING IMPLANTS TO LOWER ANNEAL TEMPERATURES
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|
|
|
|
Patent #:
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|
Issue Dt:
|
06/09/1998
|
Application #:
|
08676593
|
Filing Dt:
|
07/08/1996
|
|
Title:
|
METHOD OF ANNEALING FILM STACKS AND DEVICE HAVING STACK PRODUCED BY SAME
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|
|
|
|
Patent #:
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|
Issue Dt:
|
12/09/2003
|
Application #:
|
08676708
|
Filing Dt:
|
07/08/1996
|
|
Publication #:
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Pub Dt:
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12/13/2001
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Title:
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DEVICES HAVING IMPROVED CAPACITANCE AND METHODS OF THEIR FABRICATION
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Patent #:
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Issue Dt:
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09/22/1998
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Application #:
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08677267
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Filing Dt:
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07/09/1996
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Title:
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UPGRADEABLE CACHE CIRCUIT USING HIGH SPEED MULTIPLEXER
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Patent #:
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Issue Dt:
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08/22/2000
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Application #:
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08677514
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Filing Dt:
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07/10/1996
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Title:
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METHOD OF FORMING AN INTERLEVEL DIELECTRIC
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Patent #:
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Issue Dt:
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03/17/1998
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Application #:
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08677810
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Filing Dt:
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07/10/1996
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Title:
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CONTROLLABLE ONE-SHOT CIRCUIT AND METHOD FOR CONTROLLING OPERATION OF MEMORY CIRCUIT USING SAME
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Patent #:
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Issue Dt:
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08/24/1999
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Application #:
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08679197
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Filing Dt:
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07/12/1996
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Title:
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METHOD FOR EXTRACTING A RESISTOR NETWORK FROM AN INTEGRATED CIRCUIT POLYGON LAYOUT
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Patent #:
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Issue Dt:
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07/21/1998
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Application #:
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08679656
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Filing Dt:
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07/12/1996
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Title:
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METHOD FOR SETTING THE THRESHOLD VOLTAGE OF A REFERENCE MEMORY CELL
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Patent #:
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Issue Dt:
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09/16/1997
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Application #:
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08679705
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Filing Dt:
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07/11/1996
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Title:
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METHOD OF FORMING A RESISTOR AND INTEGRATED CIRCUITRY HAVING A RESISTOR CONSTRUCTION
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Patent #:
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Issue Dt:
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10/13/1998
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Application #:
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08680157
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Filing Dt:
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07/15/1996
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Title:
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COMPUTER SYSTEM AND BUS CONTROLLER FOR CONTROLLING ACCESS TO A COMPUTER BUS
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Patent #:
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Issue Dt:
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07/14/1998
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Application #:
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08680332
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Filing Dt:
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07/11/1996
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Title:
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METHOD OF FORMING A RESISTOR AND INTEGRATED CIRCUITRY HAVING A RESISTOR CONSTRUCTION
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Patent #:
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Issue Dt:
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12/15/1998
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Application #:
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08680790
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Filing Dt:
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07/11/1996
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Title:
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SEMICONDUCTOR PROCESSING METHOD OF FORMING AN INSULATING DIELECTRIC LAYER AND A CONTACT OPENING THEREIN
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Patent #:
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Issue Dt:
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06/02/1998
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Application #:
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08680907
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Filing Dt:
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07/16/1996
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Title:
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CROSS-SECTION SAMPLE STAINING TOOL
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Patent #:
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Issue Dt:
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07/28/1998
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Application #:
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08681527
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Filing Dt:
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07/22/1996
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Title:
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OUTPUT DATA COMPRESSION SCHEME FOR USE IN TESTING IC MEMORIES
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Patent #:
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Issue Dt:
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05/18/1999
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Application #:
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08681674
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Filing Dt:
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07/29/1996
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Title:
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COMBINED CACHE TAG AND DATA MEMORY ARCHITECTURE
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Patent #:
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Issue Dt:
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02/10/1998
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Application #:
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08681885
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Filing Dt:
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07/29/1996
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Title:
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HYBRID FRAME WITH LEAD-LOCK TAPE
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Patent #:
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Issue Dt:
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03/09/1999
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Application #:
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08682108
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Filing Dt:
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07/17/1996
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Title:
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COMPARATOR UTILIZING REDUNDANCY
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Patent #:
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Issue Dt:
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10/27/1998
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Application #:
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08682147
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Filing Dt:
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07/17/1996
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Title:
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PLANARIZATION SLURRY INCLUDING A DISPERSANT AND METHOD OF USING SAME
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Patent #:
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Issue Dt:
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06/29/1999
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Application #:
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08682308
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Filing Dt:
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07/17/1996
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Title:
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PLANARIZATION FLUID COMPOSITION CHELATING AGENTS AND PLANARIZATION METHOD USING SAME
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Patent #:
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Issue Dt:
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07/11/2000
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Application #:
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08682935
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Filing Dt:
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07/16/1996
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Title:
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TECHNIQUE FOR ELIMINATION OF PITTING ON SILICON SUBSTRATE DURING GATE STACK ETCH
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Patent #:
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Issue Dt:
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10/06/1998
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Application #:
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08683474
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Filing Dt:
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07/18/1996
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Title:
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CLOCKING SCHEME AND CHARGE TRANSFER SWITCH FOR INCREASING THE EFFICIENCY OF A CHARGE PUMP OR OTHER CIRCUIT
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Patent #:
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Issue Dt:
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10/14/1997
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Application #:
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08683701
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Filing Dt:
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07/18/1996
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Title:
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VCCP PUMP FOR LOW VOLTAGE OPERATION
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Patent #:
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Issue Dt:
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06/02/1998
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Application #:
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08684192
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Filing Dt:
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07/19/1996
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Title:
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CHARGE PUMP CIRCUIT WITH MULTIPLE BOOST STAGES
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Patent #:
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Issue Dt:
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08/19/1997
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Application #:
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08684406
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Filing Dt:
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07/19/1996
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Title:
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UNBALANCED LATCH AND FUSE CIRCUIT INCLUDING THE SAME
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Patent #:
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Issue Dt:
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04/07/1998
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Application #:
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08684431
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Filing Dt:
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07/19/1996
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Title:
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MODULATED SLOPE SIGNAL GENERATION CIRCUIT, PARTICULARLY FOR LATCH DATA SENSING ARRANGEMENTS
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Patent #:
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Issue Dt:
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10/20/1998
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Application #:
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08685049
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Filing Dt:
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07/23/1996
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Title:
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METHOD FOR OXIDATION AND CRYSTALLIZATION OF FERROELECTRIC MATERIAL
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Patent #:
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Issue Dt:
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09/15/1998
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Application #:
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08685952
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Filing Dt:
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07/22/1996
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Title:
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METHOD AND APPARATUS FOR GUIDED TOURING OF INTERNET/INTRANET WEBSITES
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Patent #:
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Issue Dt:
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08/05/1997
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Application #:
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08686386
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Filing Dt:
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07/25/1996
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Title:
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CAPACITOR CONSTRUCTION WITH OXIDATION BARRIER BLOCKS
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Patent #:
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Issue Dt:
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02/27/2001
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Application #:
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08687145
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Filing Dt:
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07/24/1996
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Title:
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FLASH EEPROM WITH ON-CHIP ERASE SOURCE VOLTAGE GENERATOR
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Patent #:
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Issue Dt:
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09/15/1998
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Application #:
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08687248
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Filing Dt:
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07/25/1996
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Title:
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A CAPACITOR CONSTRUCTION WITH OXIDATION BARRIER BLOCK
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Patent #:
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Issue Dt:
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01/27/1998
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Application #:
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08688098
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Filing Dt:
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07/29/1996
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Title:
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HIGH RESISTANCE RESISTORS FOR LIMITING CATHODE CURRENT IN FIELD EMISSION DISPLAYS
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Patent #:
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Issue Dt:
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08/04/1998
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Application #:
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08688368
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Filing Dt:
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07/30/1996
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Title:
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METHOD FOR FABRICATING CHIP MODULES
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