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Reel/Frame:047243/0001   Pages: 959
Recorded: 08/23/2018
Attorney Dkt #:4816.238
Conveyance: RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).
Total properties: 17987
Page 46 of 180
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1
Patent #:
6451685
Issue Dt:
09/17/2002
Application #:
09777816
Filing Dt:
02/05/2001
Publication #:
US20020106884
Pub Dt:
08/08/2002
Title:
METHOD FOR MULTILEVEL COPPER INTERCONNECTS FOR ULTRA LARGE SCALE INTEGRATION
2
Patent #:
6552953
Issue Dt:
04/22/2003
Application #:
09777835
Filing Dt:
02/05/2001
Publication #:
US20020122346
Pub Dt:
09/05/2002
Title:
HIGH SPEED SIGNAL PATH AND METHOD
3
Patent #:
6462402
Issue Dt:
10/08/2002
Application #:
09778318
Filing Dt:
02/06/2001
Publication #:
US20010017401
Pub Dt:
08/30/2001
Title:
MICROELECTRONIC SUBSTRATE COMPRISED OF ETCH STOP LAYER, STIFFENING LAYER, AND ENDPOINTING LAYER
4
Patent #:
6429634
Issue Dt:
08/06/2002
Application #:
09778330
Filing Dt:
02/06/2001
Publication #:
US20010020839
Pub Dt:
09/13/2001
Title:
VOLTAGE BOOSTING DEVICE, IN PARTICULAR FOR SPEEDING POWER-UP OF MULTILEVEL NONVOLATILE MEMORIES
5
Patent #:
6737740
Issue Dt:
05/18/2004
Application #:
09778913
Filing Dt:
02/08/2001
Publication #:
US20020105087
Pub Dt:
08/08/2002
Title:
HIGH PERFORMANCE SILICON CONTACT FOR FLIP CHIP
6
Patent #:
6429125
Issue Dt:
08/06/2002
Application #:
09779034
Filing Dt:
02/07/2001
Publication #:
US20010007792
Pub Dt:
07/12/2001
Title:
MICROELECTRONIC DEVICE FABRICATING METHOD
7
Patent #:
6638820
Issue Dt:
10/28/2003
Application #:
09779983
Filing Dt:
02/08/2001
Publication #:
US20020106849
Pub Dt:
08/08/2002
Title:
METHOD OF FORMING CHALCOGENIDE COMPRISING DEVICES, METHOD OF PRECLUDING DIFFUSION OF A METAL INTO ADJACENT CHALCOGENIDE MATERIAL, AND CHALCOGENIDE COMPRISING DEVICES
8
Patent #:
6496034
Issue Dt:
12/17/2002
Application #:
09780087
Filing Dt:
02/09/2001
Publication #:
US20020109526
Pub Dt:
08/15/2002
Title:
PROGRAMMABLE LOGIC ARRAYS WITH ULTRA THIN BODY TRANSISTORS
9
Patent #:
6531727
Issue Dt:
03/11/2003
Application #:
09780125
Filing Dt:
02/09/2001
Publication #:
US20020109176
Pub Dt:
08/15/2002
Title:
OPEN BIT LINE DRAM WITH ULTRA THIN BODY TRANSISTORS
10
Patent #:
6566682
Issue Dt:
05/20/2003
Application #:
09780126
Filing Dt:
02/09/2001
Publication #:
US20020109138
Pub Dt:
08/15/2002
Title:
PROGRAMMABLE MEMORY ADDRESS AND DECODE CIRCUITS WITH ULTRA THIN VERTICAL BODY TRANSISTORS
11
Patent #:
6377070
Issue Dt:
04/23/2002
Application #:
09780129
Filing Dt:
02/09/2001
Title:
IN SERVICE PROGRAMMABLE LOGIC ARRAYS WITH ULTRA THIN VERTICAL BODY TRANSISTORS
12
Patent #:
6559491
Issue Dt:
05/06/2003
Application #:
09780130
Filing Dt:
02/09/2001
Publication #:
US20020109173
Pub Dt:
08/15/2002
Title:
FOLDED BIT LINE DRAM WITH ULTRA THIN BODY TRANSISTORS
13
Patent #:
6448601
Issue Dt:
09/10/2002
Application #:
09780144
Filing Dt:
02/09/2001
Publication #:
US20020110039
Pub Dt:
08/15/2002
Title:
MEMORY ADDRESS AND DECODE CIRCUITS WITH ULTRA THIN BODY TRANSISTORS
14
Patent #:
6424001
Issue Dt:
07/23/2002
Application #:
09780169
Filing Dt:
02/09/2001
Publication #:
US20020109163
Pub Dt:
08/15/2002
Title:
FLASH MEMORY WITH ULTRA THIN VERTICAL BODY TRANSISTORS
15
Patent #:
6780675
Issue Dt:
08/24/2004
Application #:
09780207
Filing Dt:
02/09/2001
Publication #:
US20010008777
Pub Dt:
07/19/2001
Title:
FLIP-CHIP TECHNIQUE FOR CHIP ASSEMBLY
16
Patent #:
6838714
Issue Dt:
01/04/2005
Application #:
09780390
Filing Dt:
02/12/2001
Publication #:
US20010017382
Pub Dt:
08/30/2001
Title:
LOW LEAKAGE DIODES, INCLUDING PHOTODIODES
17
Patent #:
6480429
Issue Dt:
11/12/2002
Application #:
09781808
Filing Dt:
02/12/2001
Publication #:
US20020145921
Pub Dt:
10/10/2002
Title:
SHARED REDUNDANCY FOR MEMORY HAVING COLUMN ADDRESSING
18
Patent #:
6946393
Issue Dt:
09/20/2005
Application #:
09782441
Filing Dt:
02/13/2001
Publication #:
US20010009807
Pub Dt:
07/26/2001
Title:
SMALL GRAIN SIZE, CONFORMAL ALUMINUM INTERCONNECTS AND METHOD FOR THEIR FORMATION
19
Patent #:
6774487
Issue Dt:
08/10/2004
Application #:
09782498
Filing Dt:
02/13/2001
Publication #:
US20010005621
Pub Dt:
06/28/2001
Title:
SMALL GRAIN SIZE, CONFORMAL ALUMINUM INTERCONNECTS AND METHOD FOR THEIR FORMATION
20
Patent #:
6422907
Issue Dt:
07/23/2002
Application #:
09782811
Filing Dt:
02/14/2001
Publication #:
US20010010991
Pub Dt:
08/02/2001
Title:
ELECTRODE STRUCTURES, DISPLAY DEVICES CONTAINING THE SAME, AND METHODS FOR MAKING THE SAME
21
Patent #:
6755718
Issue Dt:
06/29/2004
Application #:
09782893
Filing Dt:
02/13/2001
Publication #:
US20010006871
Pub Dt:
07/05/2001
Title:
APPARATUS AND METHOD FOR CONDITIONING AND MONITORING MEDIA USED FOR CHEMICAL-MECHANICAL PLANARIZATION
22
Patent #:
6733363
Issue Dt:
05/11/2004
Application #:
09782913
Filing Dt:
02/13/2001
Publication #:
US20010006873
Pub Dt:
07/05/2001
Title:
APPARATUS AND METHOD FOR CONDITIONING AND MONITORING MEDIA USED FOR CHEMICAL-MECHANICAL PLANARIZATION
23
Patent #:
6773332
Issue Dt:
08/10/2004
Application #:
09782914
Filing Dt:
02/13/2001
Publication #:
US20010006874
Pub Dt:
07/05/2001
Title:
APPARATUS AND METHOD FOR CONDITIONING AND MONITORING MEDIA USED FOR CHEMICAL-MECHANICAL PLANARIZATION
24
Patent #:
6461930
Issue Dt:
10/08/2002
Application #:
09784835
Filing Dt:
02/16/2001
Publication #:
US20010009797
Pub Dt:
07/26/2001
Title:
CAPACITOR AND METHOD FOR FORMING THE SAME
25
Patent #:
6404272
Issue Dt:
06/11/2002
Application #:
09785042
Filing Dt:
02/13/2001
Publication #:
US20010017565
Pub Dt:
08/30/2001
Title:
CHARGE PUMP BOOSTER DEVICE WITH TRANSFER AND RECOVERY OF THE CHARGE
26
Patent #:
6418051
Issue Dt:
07/09/2002
Application #:
09785079
Filing Dt:
02/14/2001
Publication #:
US20020001237
Pub Dt:
01/03/2002
Title:
NON-VOLATILE MEMORY DEVICE WITH CONFIGURABLE ROW REDUNDANCY
27
Patent #:
6404273
Issue Dt:
06/11/2002
Application #:
09785083
Filing Dt:
02/13/2001
Publication #:
US20020050852
Pub Dt:
05/02/2002
Title:
VOLTAGE BOOSTER WITH A LOW OUTPUT RESISTANCE
28
Patent #:
6495471
Issue Dt:
12/17/2002
Application #:
09785728
Filing Dt:
02/16/2001
Publication #:
US20010009810
Pub Dt:
07/26/2001
Title:
ETCHING PROCESS USING A BUFFER LAYER
29
Patent #:
6725321
Issue Dt:
04/20/2004
Application #:
09786418
Filing Dt:
03/01/2001
Title:
MEMORY SYSTEM
30
Patent #:
6489215
Issue Dt:
12/03/2002
Application #:
09788145
Filing Dt:
02/16/2001
Publication #:
US20010009801
Pub Dt:
07/26/2001
Title:
METHOD OF MAKING INSULATOR FOR ELECTRICAL STRUCTURES
31
Patent #:
6448842
Issue Dt:
09/10/2002
Application #:
09788623
Filing Dt:
02/13/2001
Publication #:
US20010022735
Pub Dt:
09/20/2001
Title:
HIGH-EFFICIENCY BIDIRECTIONAL VOLTAGE BOOSTING DEVICE
32
Patent #:
6287932
Issue Dt:
09/11/2001
Application #:
09789146
Filing Dt:
02/20/2001
Publication #:
US20010005034
Pub Dt:
06/28/2001
Title:
Inductor with magnetic material layers
33
Patent #:
6492233
Issue Dt:
12/10/2002
Application #:
09789274
Filing Dt:
02/20/2001
Publication #:
US20010010957
Pub Dt:
08/02/2001
Title:
MEMORY CELL WITH VERTICAL TRANSISTOR AND BURIED WORD AND BODY LINES
34
Patent #:
6395579
Issue Dt:
05/28/2002
Application #:
09789892
Filing Dt:
02/21/2001
Publication #:
US20010008780
Pub Dt:
07/19/2001
Title:
Controlling packaging encapsulant leakage
35
Patent #:
6426292
Issue Dt:
07/30/2002
Application #:
09790286
Filing Dt:
02/22/2001
Publication #:
US20010007793
Pub Dt:
07/12/2001
Title:
METHODS FOR FORMING IRIDIUM AND PLATINUM CONTAINING FILMS ON SUBSTRATES
36
Patent #:
6486713
Issue Dt:
11/26/2002
Application #:
09790525
Filing Dt:
02/23/2001
Publication #:
US20020118592
Pub Dt:
08/29/2002
Title:
DIFFERENTIAL INPUT BUFFER BIAS PULSER
37
Patent #:
6466485
Issue Dt:
10/15/2002
Application #:
09792536
Filing Dt:
02/23/2001
Publication #:
US20020048188
Pub Dt:
04/25/2002
Title:
VOLTAGE REGULATOR AND DATA PATH FOR A MEMORY DEVICE
38
Patent #:
6411562
Issue Dt:
06/25/2002
Application #:
09792537
Filing Dt:
02/23/2001
Publication #:
US20020024866
Pub Dt:
02/28/2002
Title:
VOLTAGE REGULATOR AND DATA PATH FOR A MEMORY DEVICE
39
Patent #:
6456556
Issue Dt:
09/24/2002
Application #:
09792553
Filing Dt:
02/23/2001
Publication #:
US20020024867
Pub Dt:
02/28/2002
Title:
VOLTAGE REGULATOR AND DATA PATH FOR A MEMORY DEVICE
40
Patent #:
6475831
Issue Dt:
11/05/2002
Application #:
09792771
Filing Dt:
02/23/2001
Publication #:
US20010006829
Pub Dt:
07/05/2001
Title:
LOW PROFILE MULTI-IC CHIP PACKAGE CONNECTOR
41
Patent #:
6858865
Issue Dt:
02/22/2005
Application #:
09792777
Filing Dt:
02/23/2001
Publication #:
US20020135048
Pub Dt:
09/26/2002
Title:
DOPED ALUMINUM OXIDE DIELECTRICS
42
Patent #:
6456149
Issue Dt:
09/24/2002
Application #:
09794685
Filing Dt:
02/27/2001
Publication #:
US20010007431
Pub Dt:
07/12/2001
Title:
LOW CURRENT REDUNDANCY ANTI-FUSE METHOD AND APPARATUS
43
Patent #:
6686790
Issue Dt:
02/03/2004
Application #:
09794707
Filing Dt:
02/27/2001
Publication #:
US20010006351
Pub Dt:
07/05/2001
Title:
LOW CURRENT REDUNDANCY ANTI-FUSE METHOD AND APPARATUS
44
Patent #:
6858934
Issue Dt:
02/22/2005
Application #:
09795746
Filing Dt:
02/28/2001
Publication #:
US20010009303
Pub Dt:
07/26/2001
Title:
SEMICONDUCTOR DEVICE STRUCTURES INCLUDING METAL SILICIDE INTERCONNECT STRUCTURES THAT EXTEND AT LEAST PARTIALLY OVER TRANSISTOR GATE STRUCTURES AND METHODS FOR MAKING THE SAME
45
Patent #:
7214616
Issue Dt:
05/08/2007
Application #:
09795949
Filing Dt:
02/28/2001
Publication #:
US20010010389
Pub Dt:
08/02/2001
Title:
HOMOJUNCTION SEMICONDUCTOR DEVICES WITH LOW BARRIER TUNNEL OXIDE CONTACTS
46
Patent #:
6413788
Issue Dt:
07/02/2002
Application #:
09796326
Filing Dt:
02/28/2001
Title:
KEEPERS FOR MRAM ELECTRODES
47
Patent #:
6887753
Issue Dt:
05/03/2005
Application #:
09797098
Filing Dt:
02/28/2001
Publication #:
US20020119640
Pub Dt:
08/29/2002
Title:
Methods of forming semiconductor circuitry, and semiconductor circuit constructions
48
Patent #:
6507534
Issue Dt:
01/14/2003
Application #:
09797171
Filing Dt:
02/27/2001
Publication #:
US20010028598
Pub Dt:
10/11/2001
Title:
COLUMN DECODER CIRCUIT FOR PAGE READING OF A SEMICONDUCTOR MEMORY
49
Patent #:
6852167
Issue Dt:
02/08/2005
Application #:
09797324
Filing Dt:
03/01/2001
Publication #:
US20020122885
Pub Dt:
09/05/2002
Title:
METHODS, SYSTEMS, AND APPARATUS FOR UNIFORM CHEMICAL-VAPOR DEPOSITIONS
50
Patent #:
6548223
Issue Dt:
04/15/2003
Application #:
09797352
Filing Dt:
02/28/2001
Publication #:
US20020119397
Pub Dt:
08/29/2002
Title:
METHODS OF FORMING PATTERNS ACROSS PHOTORESIST AND METHODS OF FORMING RADIATION-PATTERNING TOOLS
51
Patent #:
6541391
Issue Dt:
04/01/2003
Application #:
09797356
Filing Dt:
02/28/2001
Publication #:
US20020119656
Pub Dt:
08/29/2002
Title:
METHODS OF CLEANING SURFACES OF COPPER-CONTAINING MATERIALS, AND METHODS OF FORMING OPENINGS TO COPPER-CONTAINING SUBSTRATES
52
Patent #:
6419145
Issue Dt:
07/16/2002
Application #:
09797380
Filing Dt:
03/01/2001
Publication #:
US20010008248
Pub Dt:
07/19/2001
Title:
Lead penetrating clamping system
53
Patent #:
6426898
Issue Dt:
07/30/2002
Application #:
09797682
Filing Dt:
03/05/2001
Title:
METHOD OF REDUCING TRAPPED HOLES INDUCED BY ERASE OPERATIONS IN THE TUNNEL OXIDE OF FLASH MEMORY CELLS
54
Patent #:
6348365
Issue Dt:
02/19/2002
Application #:
09797792
Filing Dt:
03/02/2001
Title:
PCRAM cell manufacturing
55
Patent #:
6548852
Issue Dt:
04/15/2003
Application #:
09797900
Filing Dt:
03/01/2001
Publication #:
US20010023953
Pub Dt:
09/27/2001
Title:
INTEGRATED CIRCUITRY AND METHODS OF FORMING CIRCUITRY
56
Patent #:
7282457
Issue Dt:
10/16/2007
Application #:
09798445
Filing Dt:
03/02/2001
Publication #:
US20010008750
Pub Dt:
07/19/2001
Title:
APPARATUS FOR STABILIZING HIGH PRESSURE OXIDATION OF A SEMICONDUCTOR DEVICE
57
Patent #:
6686241
Issue Dt:
02/03/2004
Application #:
09798778
Filing Dt:
03/02/2001
Publication #:
US20010049176
Pub Dt:
12/06/2001
Title:
METHOD OF FORMING LOW-RESISTIVITY CONNECTIONS IN NON-VOLATILE MEMORIES
58
Patent #:
6670720
Issue Dt:
12/30/2003
Application #:
09799179
Filing Dt:
03/05/2001
Publication #:
US20010008283
Pub Dt:
07/19/2001
Title:
SEMICONDUCTOR CHIP PACKAGE
59
Patent #:
6400613
Issue Dt:
06/04/2002
Application #:
09799222
Filing Dt:
03/05/2001
Title:
POSITIVE WRITE MASKING METHOD AND APPARATUS
60
Patent #:
6611020
Issue Dt:
08/26/2003
Application #:
09799754
Filing Dt:
03/06/2001
Publication #:
US20010020717
Pub Dt:
09/13/2001
Title:
METHOD CELL STRUCTURE
61
Patent #:
6552431
Issue Dt:
04/22/2003
Application #:
09800189
Filing Dt:
03/06/2001
Publication #:
US20010040293
Pub Dt:
11/15/2001
Title:
SEMICONDUCTOR STRUCTURE WITH A TITANIUM ALUMINUM NITRIDE LAYER AND METHOD FOR FABRICATING SAME
62
Patent #:
6709978
Issue Dt:
03/23/2004
Application #:
09800373
Filing Dt:
03/06/2001
Publication #:
US20020127835
Pub Dt:
09/12/2002
Title:
A METHOD FOR FORMING INTEGRATED CIRCUITS USING HIGH ASPECT RATIO VIAS THROUGH A SEMICONDUCTOR WAFER
63
Patent #:
6662279
Issue Dt:
12/09/2003
Application #:
09801216
Filing Dt:
03/07/2001
Publication #:
US20020129190
Pub Dt:
09/12/2002
Title:
DQMASK TO FORCE INTERNAL DATA TO MASK EXTERNAL DATA IN A FLASH MEMORY
64
Patent #:
6839875
Issue Dt:
01/04/2005
Application #:
09801222
Filing Dt:
03/07/2001
Publication #:
US20010052102
Pub Dt:
12/13/2001
Title:
METHOD AND APPARATUS FOR PERFORMING ERROR CORRECTION ON DATA READ FROM A MULTISTATE MEMORY
65
Patent #:
6627549
Issue Dt:
09/30/2003
Application #:
09801265
Filing Dt:
03/07/2001
Publication #:
US20010053612
Pub Dt:
12/20/2001
Title:
METHODS FOR MAKING NEARLY PLANAR DIELECTRIC FILMS IN INTEGRATED CIRCUITS
66
Patent #:
6424576
Issue Dt:
07/23/2002
Application #:
09801960
Filing Dt:
03/08/2001
Title:
APPARATUS AND METHODS FOR SELECTIVELY DISABLING OUTPUTS IN INTEGRATED CIRCUIT DEVICES
67
Patent #:
6759707
Issue Dt:
07/06/2004
Application #:
09802234
Filing Dt:
03/08/2001
Publication #:
US20020127798
Pub Dt:
09/12/2002
Title:
A 2F2 MEMORY DEVICE SYSTEM
68
Patent #:
6549975
Issue Dt:
04/15/2003
Application #:
09802269
Filing Dt:
03/08/2001
Publication #:
US20020129193
Pub Dt:
09/12/2002
Title:
TRI-STATING OUTPUT BUFFER DURING INITIALIZATION OF SYNCHRONOUS MEMORY
69
Patent #:
6535038
Issue Dt:
03/18/2003
Application #:
09802363
Filing Dt:
03/09/2001
Publication #:
US20020125927
Pub Dt:
09/12/2002
Title:
REDUCED JITTER CLOCK GENERATOR CIRCUIT AND METHOD FOR APPLYING PROPERLY PHASED CLOCK SIGNALS TO CLOCKED DEVICES
70
Patent #:
6557090
Issue Dt:
04/29/2003
Application #:
09802384
Filing Dt:
03/09/2001
Publication #:
US20020169919
Pub Dt:
11/14/2002
Title:
COLUMN ADDRESS PATH CIRCUIT AND METHOD FOR MEMORY DEVICES HAVING A BURST ACCESS MODE
71
Patent #:
6772366
Issue Dt:
08/03/2004
Application #:
09802451
Filing Dt:
03/09/2001
Publication #:
US20020152417
Pub Dt:
10/17/2002
Title:
METHOD AND APPARATUS FOR DETECTING AC REMOVAL
72
Patent #:
6469376
Issue Dt:
10/22/2002
Application #:
09803045
Filing Dt:
03/12/2001
Publication #:
US20020127770
Pub Dt:
09/12/2002
Title:
DIE SUPPORT STRUCTURE
73
Patent #:
6618291
Issue Dt:
09/09/2003
Application #:
09803047
Filing Dt:
03/12/2001
Publication #:
US20020114182
Pub Dt:
08/22/2002
Title:
WRITE STATE MACHINE ARCHITECTURE FOR FLASH MEMORY INTERNAL INSTRUCTIONS
74
Patent #:
6542569
Issue Dt:
04/01/2003
Application #:
09803061
Filing Dt:
03/08/2001
Publication #:
US20010021960
Pub Dt:
09/13/2001
Title:
MEMORY DEVICE COMMAND BUFFER APPARATUS AND METHOD AND MEMORY DEVICES AND COMPUTER SYSTEMS USING SAME
75
Patent #:
6678133
Issue Dt:
01/13/2004
Application #:
09803156
Filing Dt:
03/09/2001
Publication #:
US20020126430
Pub Dt:
09/12/2002
Title:
ELECTROSTATIC DISCHARGE PROTECTION WITH INPUT IMPEDANCE
76
Patent #:
6392955
Issue Dt:
05/21/2002
Application #:
09804010
Filing Dt:
03/12/2001
Publication #:
US20020009014
Pub Dt:
01/24/2002
Title:
CIRCUIT FOR ELIMINATING IDLE CYCLES IN A MEMORY DEVICE
77
Patent #:
6554672
Issue Dt:
04/29/2003
Application #:
09804026
Filing Dt:
03/12/2001
Publication #:
US20020125816
Pub Dt:
09/12/2002
Title:
FLAT PANEL DISPLAY, METHOD OF HIGH VACUUM SEALING
78
Patent #:
6469932
Issue Dt:
10/22/2002
Application #:
09804125
Filing Dt:
03/12/2001
Publication #:
US20020126529
Pub Dt:
09/12/2002
Title:
MEMORY WITH ROW REDUNDANCY
79
Patent #:
6882082
Issue Dt:
04/19/2005
Application #:
09804224
Filing Dt:
03/13/2001
Publication #:
US20040225777
Pub Dt:
11/11/2004
Title:
MEMORY REPEATER
80
Patent #:
6441483
Issue Dt:
08/27/2002
Application #:
09804421
Filing Dt:
03/30/2001
Title:
DIE STACKING SCHEME
81
Patent #:
6381174
Issue Dt:
04/30/2002
Application #:
09804561
Filing Dt:
03/12/2001
Title:
NON-VOLATILE MEMORY DEVICE WITH REDUNDANT COLUMNS
82
Patent #:
6403493
Issue Dt:
06/11/2002
Application #:
09804616
Filing Dt:
03/12/2001
Publication #:
US20010021583
Pub Dt:
09/13/2001
Title:
MICROELECTRONIC DEVICE FABRICATING METHODS
83
Patent #:
6356495
Issue Dt:
03/12/2002
Application #:
09804617
Filing Dt:
03/12/2001
Publication #:
US20010010641
Pub Dt:
08/02/2001
Title:
Memory array architecture, method of operating a dynamic random access memory, and method of manufacturing a dynamic random access memory
84
Patent #:
6638833
Issue Dt:
10/28/2003
Application #:
09804693
Filing Dt:
03/09/2001
Title:
PROCESS FOR THE FABRICATION OF INTEGRATED DEVICES WITH REDUCTION OF DAMAGE FROM PLASMA
85
Patent #:
6901541
Issue Dt:
05/31/2005
Application #:
09804837
Filing Dt:
03/13/2001
Publication #:
US20020133765
Pub Dt:
09/19/2002
Title:
MEMORY TESTING METHOD AND APPARATUS
86
Patent #:
6498510
Issue Dt:
12/24/2002
Application #:
09805100
Filing Dt:
03/14/2001
Publication #:
US20020130682
Pub Dt:
09/19/2002
Title:
ADAPTIVE THRESHOLD LOGIC CIRCUIT
87
Patent #:
6538494
Issue Dt:
03/25/2003
Application #:
09805207
Filing Dt:
03/14/2001
Publication #:
US20020130699
Pub Dt:
09/19/2002
Title:
PUMP CIRCUITS USING FLYBACK EFFECT FROM INTEGRATED INDUCTANCE
88
Patent #:
6636946
Issue Dt:
10/21/2003
Application #:
09805663
Filing Dt:
03/13/2001
Publication #:
US20020133673
Pub Dt:
09/19/2002
Title:
SYSTEM AND METHOD FOR CACHING DATA BASED ON IDENTITY OF REQUESTOR
89
Patent #:
6987822
Issue Dt:
01/17/2006
Application #:
09805742
Filing Dt:
03/13/2001
Publication #:
US20020131535
Pub Dt:
09/19/2002
Title:
CIRCUIT AND METHOD FOR REDUCING NOISE INTERFERENCE IN DIGITAL DIFFERENTIAL INPUT RECEIVERS
90
Patent #:
6563345
Issue Dt:
05/13/2003
Application #:
09805909
Filing Dt:
03/15/2001
Publication #:
US20020130685
Pub Dt:
09/19/2002
Title:
MONOTONIC DYNAMIC STATIC PSEUDO-NMOS LOGIC CIRCUITS
91
Patent #:
6972223
Issue Dt:
12/06/2005
Application #:
09805911
Filing Dt:
03/15/2001
Publication #:
US20020132397
Pub Dt:
09/19/2002
Title:
USE OF ATOMIC OXYGEN PROCESS FOR IMPROVED BARRIER LAYER
92
Patent #:
6780652
Issue Dt:
08/24/2004
Application #:
09805914
Filing Dt:
03/15/2001
Publication #:
US20020132464
Pub Dt:
09/19/2002
Title:
SELF-ALIGNED MRAM CONTACT AND METHOD OF FABRICATION
93
Patent #:
6514797
Issue Dt:
02/04/2003
Application #:
09805915
Filing Dt:
03/15/2001
Publication #:
US20020130401
Pub Dt:
09/19/2002
Title:
UNDERFILL APPLICATIONS USING FILM TECHNOLOGY
94
Patent #:
6653154
Issue Dt:
11/25/2003
Application #:
09805916
Filing Dt:
03/15/2001
Publication #:
US20020132375
Pub Dt:
09/19/2002
Title:
Method of forming self-aligned, trenchless magnetoresistive random-access memory (MRAM) structure with sidewall containment of MRAM structure
95
Patent #:
6515925
Issue Dt:
02/04/2003
Application #:
09805933
Filing Dt:
03/15/2001
Publication #:
US20020131311
Pub Dt:
09/19/2002
Title:
BALANCED SENSE AMPLIFIER CONTROL FOR OPEN DIGIT LINE ARCHITECTURE MEMORY DEVICES
96
Patent #:
6734510
Issue Dt:
05/11/2004
Application #:
09808114
Filing Dt:
03/15/2001
Publication #:
US20020130378
Pub Dt:
09/19/2002
Title:
TECHNIQUE TO MITIGATE SHORT CHANNEL EFFECTS WITH VERTICAL GATE TRANSISTOR WITH DIFFERENT GATE MATERIALS
97
Patent #:
6437604
Issue Dt:
08/20/2002
Application #:
09808139
Filing Dt:
03/15/2001
Title:
CLOCKED DIFFERENTIAL CASCODE VOLTAGE SWITCH WITH PASS GATE LOGIC
98
Patent #:
6933729
Issue Dt:
08/23/2005
Application #:
09808140
Filing Dt:
03/15/2001
Publication #:
US20020133748
Pub Dt:
09/19/2002
Title:
METHOD AND APPARATUS FOR MEASURING ON-CHIP POWER SUPPLY INTEGRITY
99
Patent #:
6421282
Issue Dt:
07/16/2002
Application #:
09808249
Filing Dt:
03/14/2001
Title:
CASCADE-BOOTED PROGRAMMING VOLTAGE CIRCUIT
100
Patent #:
6809014
Issue Dt:
10/26/2004
Application #:
09808261
Filing Dt:
03/14/2001
Publication #:
US20020132412
Pub Dt:
09/19/2002
Title:
METHOD TO FABRICATE SURFACE P-CHANNEL CMOS
Assignor
1
U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Exec Dt:
06/29/2018
Assignee
1
MICRON TECHNOLOGY, INC.
8000 S. FEDERAL WAY
BOISE, IDAHO 83707
Correspondence name and address
WSGR, C/O QUI LU FLOOD, SENIOR PARALEGAL
ONE MARKET, SPEAR TOWER, SUITE 3300
SAN FRANCISCO, CA 94105

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