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Reel/Frame:047243/0001   Pages: 959
Recorded: 08/23/2018
Attorney Dkt #:4816.238
Conveyance: RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).
Total properties: 17987
Page 55 of 180
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1
Patent #:
6504743
Issue Dt:
01/07/2003
Application #:
10007571
Filing Dt:
11/07/2001
Publication #:
US20020041508
Pub Dt:
04/11/2002
Title:
DIE ARCHITECTURE ACCOMMODATING HIGH-SPEED SEMICONDUCTOR DEVICES
2
Patent #:
6844738
Issue Dt:
01/18/2005
Application #:
10007672
Filing Dt:
12/10/2001
Publication #:
US20030107382
Pub Dt:
06/12/2003
Title:
COAXIAL RADIO FREQUENCY ADAPTER AND METHOD
3
Patent #:
6815994
Issue Dt:
11/09/2004
Application #:
10007871
Filing Dt:
11/13/2001
Publication #:
US20020089885
Pub Dt:
07/11/2002
Title:
METHOD OF SCALING DIGITAL CIRCUITS AND CONTROLLING THE TIMING RELATIONSHIP BETWEEN DIGITAL CIRCUITS
4
Patent #:
6580493
Issue Dt:
06/17/2003
Application #:
10008108
Filing Dt:
11/13/2001
Publication #:
US20020042023
Pub Dt:
04/11/2002
Title:
APPARATUS FOR EXPOSING SEMICONDUCTOR WAFERS IN A MANNER THAT PROMOTES RADIAL PROCESSING UNIFORMITY
5
Patent #:
6812064
Issue Dt:
11/02/2004
Application #:
10008136
Filing Dt:
11/07/2001
Publication #:
US20030087507
Pub Dt:
05/08/2003
Title:
OZONE TREATMENT OF A GROUND SEMICONDUCTOR DIE TO IMPROVE ADHESIVE BONDING TO A SUBSTRATE
6
Patent #:
6643206
Issue Dt:
11/04/2003
Application #:
10008409
Filing Dt:
11/13/2001
Publication #:
US20020039318
Pub Dt:
04/04/2002
Title:
TIMING FUSE METHOD FOR DELAYING SIGNALS IN A MEMORY DEVICE
7
Patent #:
6559627
Issue Dt:
05/06/2003
Application #:
10008540
Filing Dt:
11/07/2001
Publication #:
US20020089317
Pub Dt:
07/11/2002
Title:
VOLTAGE REGULATOR FOR LOW-CONSUMPTION CIRCUITS
8
Patent #:
6596606
Issue Dt:
07/22/2003
Application #:
10008652
Filing Dt:
11/09/2001
Publication #:
US20020042188
Pub Dt:
04/11/2002
Title:
SEMICONDUCTOR RAISED SOURCE-DRAIN STRUCTURE
9
Patent #:
7115957
Issue Dt:
10/03/2006
Application #:
10008653
Filing Dt:
11/09/2001
Publication #:
US20020043694
Pub Dt:
04/18/2002
Title:
SEMICONDUCTOR RAISED SOURCE-DRAIN STRUCTURE
10
Patent #:
6597045
Issue Dt:
07/22/2003
Application #:
10008655
Filing Dt:
11/09/2001
Publication #:
US20020053688
Pub Dt:
05/09/2002
Title:
SEMICONDUCTOR RAISED SOURCE-DRAIN STRUCTURE
11
Patent #:
6600335
Issue Dt:
07/29/2003
Application #:
10008843
Filing Dt:
11/13/2001
Publication #:
US20020043986
Pub Dt:
04/18/2002
Title:
BALL GRID ARRAY CHIP PACKAGES HAVING IMPROVED TESTING AND STACKING CHARACTERISTICS
12
Patent #:
6420789
Issue Dt:
07/16/2002
Application #:
10008891
Filing Dt:
11/13/2001
Title:
BALL GRID ARRAY CHIP PACKAGES HAVING IMPROVED TESTING AND STACKING CHARACTERISTICS
13
Patent #:
6635948
Issue Dt:
10/21/2003
Application #:
10008900
Filing Dt:
12/05/2001
Publication #:
US20030102517
Pub Dt:
06/05/2003
Title:
SEMICONDUCTOR DEVICE WITH ELECTRICALLY COUPLED SPIRAL INDUCTORS
14
Patent #:
6856733
Issue Dt:
02/15/2005
Application #:
10008922
Filing Dt:
12/07/2001
Publication #:
US20030108294
Pub Dt:
06/12/2003
Title:
1 X N FANOUT WAVEGUIDE PHOTODETECTOR
15
Patent #:
6707165
Issue Dt:
03/16/2004
Application #:
10010022
Filing Dt:
12/06/2001
Publication #:
US20020038915
Pub Dt:
04/04/2002
Title:
USE OF RESIDUAL ORGANIC COMPOUNDS TO FACILITATE GATE BREAK ON A CARRIER SUBSTRATE FOR A SEMICONDUCTOR DEVICE
16
Patent #:
6747327
Issue Dt:
06/08/2004
Application #:
10010025
Filing Dt:
12/06/2001
Publication #:
US20020053693
Pub Dt:
05/09/2002
Title:
TRANSISTOR WITH NITROGEN-HARDENED GATE OXIDE
17
Patent #:
6626656
Issue Dt:
09/30/2003
Application #:
10010113
Filing Dt:
11/13/2001
Publication #:
US20020051831
Pub Dt:
05/02/2002
Title:
APPARATUS FOR ENCASING ARRAY PACKAGES
18
Patent #:
6573765
Issue Dt:
06/03/2003
Application #:
10010760
Filing Dt:
11/30/2001
Publication #:
US20020101272
Pub Dt:
08/01/2002
Title:
INPUT-OUTPUT BUFFER CIRCUIT AND METHOD FOR AVOIDING INADVERTENT CONDUCTION OF A PULL-UP TRANSISTOR
19
Patent #:
6624660
Issue Dt:
09/23/2003
Application #:
10010820
Filing Dt:
12/06/2001
Publication #:
US20030107406
Pub Dt:
06/12/2003
Title:
CMOS OUTPUT DRIVER FOR SEMICONDUCTOR DEVICE AND RELATED METHOD FOR IMPROVING LATCH-UP IMMUNITY IN A CMOS OUTPUT DRIVER
20
Patent #:
6448664
Issue Dt:
09/10/2002
Application #:
10011196
Filing Dt:
11/13/2001
Title:
BALL GRID ARRAY CHIP PACKAGES HAVING IMPROVED TESTING AND STACKING CHARACTERISTICS
21
Patent #:
6844255
Issue Dt:
01/18/2005
Application #:
10011212
Filing Dt:
10/09/2001
Publication #:
US20030068879
Pub Dt:
04/10/2003
Title:
METHODS OF PROVIDING AN INTERLEVEL DIELECTRIC LAYER INTERMEDIATE DIFFERENT ELEVATION CONDUCTIVE METAL LAYERS IN THE FABRICATION OF INTEGRATED CIRCUITRY
22
Patent #:
6740971
Issue Dt:
05/25/2004
Application #:
10011525
Filing Dt:
11/05/2001
Publication #:
US20020042160
Pub Dt:
04/11/2002
Title:
CAVITY BALL GRID ARRAY APPARATUS HAVING IMPROVED INDUCTANCE CHARACTERISTICS
23
Patent #:
6906417
Issue Dt:
06/14/2005
Application #:
10011686
Filing Dt:
11/13/2001
Publication #:
US20020047216
Pub Dt:
04/25/2002
Title:
BALL GRID ARRAY UTILIZING SOLDER BALLS HAVING A CORE MATERIAL COVERED BY A METAL LAYER
24
Patent #:
6882031
Issue Dt:
04/19/2005
Application #:
10012665
Filing Dt:
10/30/2001
Publication #:
US20020074622
Pub Dt:
06/20/2002
Title:
AMMONIA GAS PASSIVATION ON NITRIDE ENCAPSULATED DEVICES
25
Patent #:
6576553
Issue Dt:
06/10/2003
Application #:
10012808
Filing Dt:
11/13/2001
Publication #:
US20020042201
Pub Dt:
04/11/2002
Title:
CHEMICAL MECHANICAL PLANARIZATION OF CONDUCTIVE MATERIAL
26
Patent #:
6563223
Issue Dt:
05/13/2003
Application #:
10013090
Filing Dt:
12/07/2001
Publication #:
US20020050641
Pub Dt:
05/02/2002
Title:
INTERCONNECTION COMPONENT FOR FACILITATING TESTING OF PACKAGED INTEGRATED CIRCUITS
27
Patent #:
6949789
Issue Dt:
09/27/2005
Application #:
10013322
Filing Dt:
11/13/2001
Publication #:
US20020117709
Pub Dt:
08/29/2002
Title:
USE OF DILUTE STEAM AMBIENT FOR IMPROVEMENT OF FLASH DEVICES
28
Patent #:
RE39194
Issue Dt:
07/18/2006
Application #:
10013333
Filing Dt:
12/06/2001
Title:
METHOD AND APPARATUS FOR CONTROLLING PLANARIZING CHARACTERISTICS IN MECHANICAL AND CHEMICAL-MECHANICAL PLANARIZATION OF MICROELECTRONIC SUBSTRATES
29
Patent #:
6628565
Issue Dt:
09/30/2003
Application #:
10014013
Filing Dt:
11/05/2001
Publication #:
US20030086328
Pub Dt:
05/08/2003
Title:
PREDECODE COLUMN ARCHITECTURE AND METHOD
30
Patent #:
6709893
Issue Dt:
03/23/2004
Application #:
10015337
Filing Dt:
12/11/2001
Publication #:
US20020041034
Pub Dt:
04/11/2002
Title:
INTERCONNECTIONS FOR A SEMICONDUCTOR DEVICE AND METHOD FOR FORMING SAME
31
Patent #:
6806187
Issue Dt:
10/19/2004
Application #:
10015811
Filing Dt:
11/02/2001
Publication #:
US20020079581
Pub Dt:
06/27/2002
Title:
ELECTRICAL CONTACT FOR HIGH DIELECTRIC CONSTANT CAPACITORS AND METHOD FOR FABRICATING THE SAME
32
Patent #:
6545510
Issue Dt:
04/08/2003
Application #:
10016513
Filing Dt:
12/10/2001
Title:
INPUT BUFFER AND METHOD FOR VOLTAGE LEVEL DETECTION
33
Patent #:
6635917
Issue Dt:
10/21/2003
Application #:
10016538
Filing Dt:
12/12/2001
Publication #:
US20020045308
Pub Dt:
04/18/2002
Title:
SEMICONDUCTOR PROCESSING METHODS OF FORMING A PLURALITY OF CAPACITORS ON A SUBSTRATE, BIT LINE CONTACTS AND METHOD OF FORMING BIT LINE CONTACTS
34
Patent #:
6510102
Issue Dt:
01/21/2003
Application #:
10016721
Filing Dt:
10/29/2001
Publication #:
US20020075749
Pub Dt:
06/20/2002
Title:
METHOD FOR GENERATING MEMORY ADDRESSES FOR ACCESSING MEMORY-CELL ARRAYS IN MEMORY DEVICES
35
Patent #:
6667903
Issue Dt:
12/23/2003
Application #:
10017502
Filing Dt:
12/14/2001
Publication #:
US20020149963
Pub Dt:
10/17/2002
Title:
PROGRAMMING METHOD FOR A MULTILEVEL MEMORY CELL
36
Patent #:
6545894
Issue Dt:
04/08/2003
Application #:
10017515
Filing Dt:
12/11/2001
Publication #:
US20020073392
Pub Dt:
06/13/2002
Title:
DIE ARCHITECTURE ACCOMMODATING HIGH-SPEED SEMICONDUCTOR DEVICES
37
Patent #:
6501669
Issue Dt:
12/31/2002
Application #:
10017517
Filing Dt:
12/11/2001
Publication #:
US20020075716
Pub Dt:
06/20/2002
Title:
DIE ARCHITECTURE ACCOMMODATING HIGH-SPEED SEMICONDUCTOR DEVICES
38
Patent #:
6645845
Issue Dt:
11/11/2003
Application #:
10017557
Filing Dt:
12/14/2001
Publication #:
US20020119624
Pub Dt:
08/29/2002
Title:
INTEGRATED CIRCUITRY AND METHODS OF FORMING CIRCUITRY
39
Patent #:
6614691
Issue Dt:
09/02/2003
Application #:
10017657
Filing Dt:
12/12/2001
Publication #:
US20030107923
Pub Dt:
06/12/2003
Title:
FLASH MEMORY HAVING SEPARATE READ AND WRITE PATHS
40
Patent #:
6795326
Issue Dt:
09/21/2004
Application #:
10017664
Filing Dt:
12/12/2001
Publication #:
US20030107092
Pub Dt:
06/12/2003
Title:
FLASH ARRAY IMPLEMENTATION WITH LOCAL AND GLOBAL BIT LINES
41
Patent #:
6621720
Issue Dt:
09/16/2003
Application #:
10019771
Filing Dt:
12/27/2001
Title:
VOLTAGE PRODUCTION CIRCUIT
42
Patent #:
6889430
Issue Dt:
05/10/2005
Application #:
10020352
Filing Dt:
12/12/2001
Publication #:
US20020043397
Pub Dt:
04/18/2002
Title:
METHOD OF SELECTIVELY ADJUSTING SURFACE TENSION OF SOLDERMASK MATERIAL
43
Patent #:
6545899
Issue Dt:
04/08/2003
Application #:
10020371
Filing Dt:
12/12/2001
Title:
ROM EMBEDDED DRAM WITH BIAS SENSING
44
Patent #:
7325025
Issue Dt:
01/29/2008
Application #:
10020447
Filing Dt:
12/18/2001
Publication #:
US20030115237
Pub Dt:
06/19/2003
Title:
LOOK-AHEAD CARRY ADDER CIRCUIT
45
Patent #:
6529386
Issue Dt:
03/04/2003
Application #:
10021555
Filing Dt:
12/12/2001
Publication #:
US20020109975
Pub Dt:
08/15/2002
Title:
APPARATUS AND METHOD FOR RETAINING A CIRCUIT BOARD
46
Patent #:
6472939
Issue Dt:
10/29/2002
Application #:
10021870
Filing Dt:
12/17/2001
Publication #:
US20020053949
Pub Dt:
05/09/2002
Title:
LOW POWER SUPPLY CMOS DIFFERENTIAL AMPLIFIER TOPOLOGY
47
Patent #:
6522570
Issue Dt:
02/18/2003
Application #:
10022036
Filing Dt:
12/13/2001
Title:
SYSTEM AND METHOD FOR INHIBITING IMPRINTING OF CAPACITOR STRUCTURES OF A MEMORY
48
Patent #:
6743641
Issue Dt:
06/01/2004
Application #:
10022721
Filing Dt:
12/20/2001
Publication #:
US20030119210
Pub Dt:
06/26/2003
Title:
METHOD OF IMPROVING SURFACE PLANARITY PRIOR TO MRAM BIT MATERIAL DEPOSITION
49
Patent #:
6873538
Issue Dt:
03/29/2005
Application #:
10022722
Filing Dt:
12/20/2001
Publication #:
US20030117831
Pub Dt:
06/26/2003
Title:
PROGRAMMABLE CONDUCTOR RANDOM ACCESS MEMORY AND A METHOD FOR WRITING THERETO
50
Patent #:
6391681
Issue Dt:
05/21/2002
Application #:
10023036
Filing Dt:
12/19/2001
Title:
SEMICONDUCTOR COMPONENT HAVING SELECTED TERMINAL CONTACTS WITH MULTIPLE ELECTRICAL PATHS
51
Patent #:
7202556
Issue Dt:
04/10/2007
Application #:
10023049
Filing Dt:
12/20/2001
Publication #:
US20030116866
Pub Dt:
06/26/2003
Title:
SEMICONDUCTOR PACKAGE HAVING SUBSTRATE WITH MULTI-LAYER METAL BUMPS
52
Patent #:
6839292
Issue Dt:
01/04/2005
Application #:
10023280
Filing Dt:
12/14/2001
Publication #:
US20030112693
Pub Dt:
06/19/2003
Title:
APPARATUS AND METHOD FOR PARALLEL PROGRAMMING OF ANTIFUSES
53
Patent #:
6522001
Issue Dt:
02/18/2003
Application #:
10024256
Filing Dt:
12/17/2001
Publication #:
US20020068429
Pub Dt:
06/06/2002
Title:
LOCAL INTERCONNECT STRUCTURES AND METHODS FOR MAKING THE SAME
54
Patent #:
6972587
Issue Dt:
12/06/2005
Application #:
10025395
Filing Dt:
12/19/2001
Publication #:
US20030112029
Pub Dt:
06/19/2003
Title:
BUILT-IN SELF REPAIR FOR AN INTEGRATED CIRCUIT
55
Patent #:
6900122
Issue Dt:
05/31/2005
Application #:
10027315
Filing Dt:
12/20/2001
Publication #:
US20030119291
Pub Dt:
06/26/2003
Title:
LOW-TEMPERATURE GROWN HIGH-QUALITY ULTRA-THIN PRASEODYMIUM GATE DIELECTRICS
56
Patent #:
6896740
Issue Dt:
05/24/2005
Application #:
10027951
Filing Dt:
12/19/2001
Publication #:
US20020050483
Pub Dt:
05/02/2002
Title:
METHOD OF REDUCING WATER SPOTTING AND OXIDE GROWTH ON A SEMICONDUCTOR STRUCTURE
57
Patent #:
7132711
Issue Dt:
11/07/2006
Application #:
10028001
Filing Dt:
12/20/2001
Publication #:
US20030043633
Pub Dt:
03/06/2003
Title:
PROGRAMMABLE ARRAY LOGIC OR MEMORY WITH P-CHANNEL DEVICES AND ASYMMETRICAL TUNNEL BARRIERS
58
Patent #:
6884723
Issue Dt:
04/26/2005
Application #:
10028040
Filing Dt:
12/21/2001
Publication #:
US20030119319
Pub Dt:
06/26/2003
Title:
METHODS FOR PLANARIZATION OF GROUP VIII METAL-CONTAINING SURFACES USING COMPLEXING AGENTS
59
Patent #:
6649278
Issue Dt:
11/18/2003
Application #:
10028454
Filing Dt:
12/20/2001
Publication #:
US20020068178
Pub Dt:
06/06/2002
Title:
PROCESS FOR FABRICATING FILMS OF UNIFORM PROPERTIES ON SEMICONDUCTOR DEVICES
60
Patent #:
6577274
Issue Dt:
06/10/2003
Application #:
10028472
Filing Dt:
12/19/2001
Publication #:
US20030112182
Pub Dt:
06/19/2003
Title:
METHOD AND APPARATUS FOR CONTROLLING ACCESS TO MOBILE DEVICES
61
Patent #:
7121926
Issue Dt:
10/17/2006
Application #:
10028616
Filing Dt:
12/21/2001
Publication #:
US20030119426
Pub Dt:
06/26/2003
Title:
METHODS FOR PLANARIZATION OF GROUP VIII METAL-CONTAINING SURFACES USING A FIXED ABRASIVE ARTICLE
62
Patent #:
6953730
Issue Dt:
10/11/2005
Application #:
10028643
Filing Dt:
12/20/2001
Publication #:
US20030119246
Pub Dt:
06/26/2003
Title:
LOW-TEMPERATURE GROWN HIGH QUALITY ULTRA-THIN COTIO3 GATE DIELECTRICS
63
Patent #:
6599805
Issue Dt:
07/29/2003
Application #:
10029573
Filing Dt:
12/20/2001
Publication #:
US20020064920
Pub Dt:
05/30/2002
Title:
METHODS OF FORMING TRANSISTORS AND SEMICONDUCTOR PROCESSING METHODS OF FORMING TRANSISTOR GATES
64
Patent #:
6703299
Issue Dt:
03/09/2004
Application #:
10032115
Filing Dt:
12/21/2001
Publication #:
US20030116864
Pub Dt:
06/26/2003
Title:
UNDERFILL PROCESS FOR FLIP-CHIP DEVICE
65
Patent #:
6652799
Issue Dt:
11/25/2003
Application #:
10032129
Filing Dt:
12/31/2001
Publication #:
US20020056942
Pub Dt:
05/16/2002
Title:
METHOD FOR MOLDING SEMICONDUCTOR COMPONENTS
66
Patent #:
6643192
Issue Dt:
11/04/2003
Application #:
10032277
Filing Dt:
12/21/2001
Publication #:
US20030012058
Pub Dt:
01/16/2003
Title:
VOLTAGE AND TEMPERATURE COMPENSATED PULSE GENERATOR
67
Patent #:
6584035
Issue Dt:
06/24/2003
Application #:
10032375
Filing Dt:
12/21/2001
Publication #:
US20020172088
Pub Dt:
11/21/2002
Title:
SUPPLY NOISE REDUCTION IN MEMORY DEVICE COLUMN SELECTION
68
Patent #:
6525983
Issue Dt:
02/25/2003
Application #:
10032643
Filing Dt:
12/28/2001
Publication #:
US20020093866
Pub Dt:
07/18/2002
Title:
DEVICE AND METHOD FOR REDUCING STANDBY CURRENT IN A MEMORY DEVICE BY DISCONNECTING BIT LINE LOAD DEVICES IN UNUSED COLUMNS OF THE MEMORY DEVICE FROM A SUPPLY VOLTAGE
69
Patent #:
6531192
Issue Dt:
03/11/2003
Application #:
10032655
Filing Dt:
10/28/2001
Publication #:
US20020051847
Pub Dt:
05/02/2002
Title:
CHEMICAL VAPOR DEPOSITION PROCESS FOR DEPOSITING TITANIUM NITRIDE FILMS FROM AN ORGANO-METALLIC COMPOUND
70
Patent #:
6555463
Issue Dt:
04/29/2003
Application #:
10032730
Filing Dt:
12/28/2001
Publication #:
US20020068440
Pub Dt:
06/06/2002
Title:
METHODS OF FABRICATING BURIED DIGIT LINES
71
Patent #:
6777813
Issue Dt:
08/17/2004
Application #:
10032877
Filing Dt:
10/24/2001
Publication #:
US20030168741
Pub Dt:
09/11/2003
Title:
FILL PATTERN GENERATION FOR SPIN-ON GLASS AND RELATED SELF-PLANARIZATION DEPOSITION
72
Patent #:
6919220
Issue Dt:
07/19/2005
Application #:
10033233
Filing Dt:
12/28/2001
Publication #:
US20020052105
Pub Dt:
05/02/2002
Title:
METHOD OF MAKING CHIP PACKAGE WITH GREASE HEAT SINK
73
Patent #:
6750547
Issue Dt:
06/15/2004
Application #:
10033340
Filing Dt:
12/26/2001
Publication #:
US20030116861
Pub Dt:
06/26/2003
Title:
MULTI-SUBSTRATE MICROELECTRONIC PACKAGES AND METHODS FOR MANUFACTURE
74
Patent #:
6555473
Issue Dt:
04/29/2003
Application #:
10033428
Filing Dt:
12/27/2001
Publication #:
US20020052101
Pub Dt:
05/02/2002
Title:
FIELD EFFECT TRANSISTORS
75
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6835995
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Assignor
1
U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Exec Dt:
06/29/2018
Assignee
1
MICRON TECHNOLOGY, INC.
8000 S. FEDERAL WAY
BOISE, IDAHO 83707
Correspondence name and address
WSGR, C/O QUI LU FLOOD, SENIOR PARALEGAL
ONE MARKET, SPEAR TOWER, SUITE 3300
SAN FRANCISCO, CA 94105

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