USPTO Assignments on the Web

	United States Patent and Trademark Office
	Home\|Site Index\|Search\|Guides\|Contacts\|eBusiness\|eBiz alerts\|News\|Help

Assignments on the Web > Patent Query

Patent Assignment Details

NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:	047243/0001			Pages:	959
		Recorded:	08/23/2018
Attorney Dkt #:	4816.238
Conveyance:	RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).

Total properties: 17987
Page 61 of 180
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180

Patent #:	6781192	Issue Dt:	08/24/2004	Application #:	10184601	Filing Dt:	06/27/2002
Publication #:	US20020163045	Pub Dt:	11/07/2002
Title:	LOW DIELECTRIC CONSTANT SHALLOW TRENCH ISOLATION

Patent #:	6785161	Issue Dt:	08/31/2004	Application #:	10184756	Filing Dt:	06/28/2002
Publication #:	US20040001357	Pub Dt:	01/01/2004
Title:	HIGH VOLTAGE REGULATOR FOR LOW VOLTAGE INTEGRATED CIRCUIT PROCESSES

Patent #:	7159141	Issue Dt:	01/02/2007	Application #:	10184961	Filing Dt:	07/01/2002
Publication #:	US20040003315	Pub Dt:	01/01/2004
Title:	REPAIRABLE BLOCK REDUNDANCY SCHEME

Patent #:	6664159	Issue Dt:	12/16/2003	Application #:	10185009	Filing Dt:	07/01/2002
Publication #:	US20020163025	Pub Dt:	11/07/2002
Title:	METHOD OF FORMING BARRIER LAYERS

Patent #:	6794246	Issue Dt:	09/21/2004	Application #:	10185155	Filing Dt:	06/28/2002
Publication #:	US20020164853	Pub Dt:	11/07/2002
Title:	METHOD FOR FORMING PROGRAMMABLE LOGIC ARRAYS USING VERTICAL GATE TRANSISTORS

Patent #:	6836176	Issue Dt:	12/28/2004	Application #:	10185419	Filing Dt:	06/27/2002
Publication #:	US20030122610	Pub Dt:	07/03/2003
Title:	CHARGE PUMP RIPPLE REDUCTION

Patent #:	6801143	Issue Dt:	10/05/2004	Application #:	10186564	Filing Dt:	06/28/2002
Publication #:	US20040001014	Pub Dt:	01/01/2004
Title:	METHOD AND APPARATUS FOR GENERATING GRAY CODE FOR ANY EVEN COUNT VALUE TO ENABLE EFFICIENT POINTER EXCHANGE MECHANISMS IN ASYNCHRONOUS FIFO'S

Patent #:	7135444	Issue Dt:	11/14/2006	Application #:	10186778	Filing Dt:	07/01/2002
Publication #:	US20020165106	Pub Dt:	11/07/2002
Title:	CLEANING COMPOSITION USEFUL IN SEMICONDUCTOR INTEGRATED CIRCUIT FABRICATION

Patent #:	7087561	Issue Dt:	08/08/2006	Application #:	10187163	Filing Dt:	07/01/2002
Publication #:	US20020169089	Pub Dt:	11/14/2002
Title:	CLEANING COMPOSITION USEFUL IN SEMICONDUCTOR INTEGRATED CIRCUIT FABRICATION

Patent #:	6678196	Issue Dt:	01/13/2004	Application #:	10188144	Filing Dt:	07/03/2002
Publication #:	US20030007381	Pub Dt:	01/09/2003
Title:	WRITING TO AND READING FROM A RAM OR A CAM USING CURRENT DRIVERS AND CURRENT SENSING LOGIC

Patent #:	6847085	Issue Dt:	01/25/2005	Application #:	10188147	Filing Dt:	07/03/2002
Publication #:	US20020192960	Pub Dt:	12/19/2002
Title:	HIGH ASPECT RATIO CONTACT SURFACES HAVING REDUCED CONTAMINANTS

Patent #:	6777268	Issue Dt:	08/17/2004	Application #:	10188436	Filing Dt:	07/02/2002
Publication #:	US20020173082	Pub Dt:	11/21/2002
Title:	METHOD OF FABRICATING TAPE ATTACHMENT CHIP-ON-BOARD ASSEMBLIES

Patent #:	6787429	Issue Dt:	09/07/2004	Application #:	10188682	Filing Dt:	07/02/2002
Publication #:	US20020177268	Pub Dt:	11/28/2002
Title:	NOVEL HIGH-K DIELECTRIC MATERIALS AND PROCESSES FOR MANUFACTURING THEM

Patent #:	7058849	Issue Dt:	06/06/2006	Application #:	10188724	Filing Dt:	07/02/2002
Publication #:	US20040006723	Pub Dt:	01/08/2004
Title:	USE OF NON-VOLATILE MEMORY TO PERFORM ROLLBACK FUNCTION

Patent #:	6630371	Issue Dt:	10/07/2003	Application #:	10189097	Filing Dt:	07/02/2002
Publication #:	US20020177258	Pub Dt:	11/28/2002
Title:	CHIP ON BOARD AND HEAT SINK ATTACHMENT METHODS

Patent #:	6538949	Issue Dt:	03/25/2003	Application #:	10189138	Filing Dt:	07/02/2002
Publication #:	US20020176303	Pub Dt:	11/28/2002
Title:	DEVICE AND METHOD FOR REPAIRING A MEMORY ARRAY BY STORING EACH BIT IN MULTIPLE MEMORY CELLS IN THE ARRAY

Patent #:	6720271	Issue Dt:	04/13/2004	Application #:	10189152	Filing Dt:	07/02/2002
Publication #:	US20030027429	Pub Dt:	02/06/2003
Title:	PROCESS FOR REMOVING POLYMERS DURING THE FABRICATION OF SEMICONDUCTOR DEVICES

Patent #:	6673649	Issue Dt:	01/06/2004	Application #:	10190019	Filing Dt:	07/05/2002
Publication #:	US20040005732	Pub Dt:	01/08/2004
Title:	MICROELECTRONIC DEVICE PACKAGES AND METHODS FOR CONTROLLING THE DISPOSITION OF NON-CONDUCTIVE MATERIALS IN SUCH PACKAGES

Patent #:	6803624	Issue Dt:	10/12/2004	Application #:	10190422	Filing Dt:	07/03/2002
Publication #:	US20040004243	Pub Dt:	01/08/2004
Title:	PROGRAMMABLE MEMORY DEVICES SUPPORTED BY SEMICONDUCTIVE SUBSTRATES

Patent #:	6861695	Issue Dt:	03/01/2005	Application #:	10190428	Filing Dt:	07/03/2002
Publication #:	US20020167038	Pub Dt:	11/14/2002
Title:	NOVEL HIGH-K DIELECTRIC MATERIALS AND PROCESSES FOR MANUFACTURING THEM

Patent #:	7280549	Issue Dt:	10/09/2007	Application #:	10190554	Filing Dt:	07/09/2002
Publication #:	US20030031209	Pub Dt:	02/13/2003
Title:	HIGH SPEED RING/BUS

Patent #:	6735108	Issue Dt:	05/11/2004	Application #:	10190631	Filing Dt:	07/08/2002
Publication #:	US20040004855	Pub Dt:	01/08/2004
Title:	ROM EMBEDDED DRAM WITH ANTI-FUSE PROGRAMMING

Patent #:	6707747	Issue Dt:	03/16/2004	Application #:	10190648	Filing Dt:	07/08/2002
Publication #:	US20040004896	Pub Dt:	01/08/2004
Title:	DYNAMIC INPUT THRESHOLDS FOR SEMICONDUCTOR DEVICES

Patent #:	6747898	Issue Dt:	06/08/2004	Application #:	10190650	Filing Dt:	07/08/2002
Publication #:	US20040004860	Pub Dt:	01/08/2004
Title:	COLUMN DECODE CIRCUIT FOR HIGH DENSITY/HIGH PERFORMANCE MEMORIES

Patent #:	7847344	Issue Dt:	12/07/2010	Application #:	10190689	Filing Dt:	07/08/2002
Publication #:	US20040004247	Pub Dt:	01/08/2004
Title:	MEMORY UTILIZING OXIDE-NITRIDE NANOLAMINATES

Patent #:	7221586	Issue Dt:	05/22/2007	Application #:	10190717	Filing Dt:	07/08/2002
Publication #:	US20040004859	Pub Dt:	01/08/2004
Title:	MEMORY UTILIZING OXIDE NANOLAMINATES

Patent #:	7162564	Issue Dt:	01/09/2007	Application #:	10190851	Filing Dt:	07/09/2002
Publication #:	US20040010650	Pub Dt:	01/15/2004
Title:	CONFIGURABLE MULTI-PORT MULTI-PROTOCOL NETWORK INTERFACE TO SUPPORT PACKET PROCESSING

Patent #:	6822919	Issue Dt:	11/23/2004	Application #:	10190917	Filing Dt:	07/08/2002
Publication #:	US20040004881	Pub Dt:	01/08/2004
Title:	SINGLE ENDED OUTPUT SENSE AMPLIFIER CIRCUIT WITH REDUCED POWER CONSUMPTION AND NOISE

Patent #:	6865086	Issue Dt:	03/08/2005	Application #:	10191139	Filing Dt:	07/09/2002
Publication #:	US20040009708	Pub Dt:	01/15/2004
Title:	APPARATUS AND METHOD TO SECURE AN ADAPTOR TO A REDUCED-SIZED MEMORY CARD

Patent #:	7049664	Issue Dt:	05/23/2006	Application #:	10191186	Filing Dt:	07/08/2002
Publication #:	US20020175382	Pub Dt:	11/28/2002
Title:	SEMICONDUCTOR DEVICE STRUCTURES FORMED BY ION-ASSISTED OXIDATION

Patent #:	7221017	Issue Dt:	05/22/2007	Application #:	10191336	Filing Dt:	07/08/2002
Publication #:	US20040004245	Pub Dt:	01/08/2004
Title:	MEMORY UTILIZING OXIDE-CONDUCTOR NANOLAMINATES

Patent #:	6998334	Issue Dt:	02/14/2006	Application #:	10191424	Filing Dt:	07/08/2002
Publication #:	US20040005770	Pub Dt:	01/08/2004
Title:	SEMICONDUCTOR DEVICES WITH PERMANENT POLYMER STENCIL AND METHOD FOR MANUFACTURING THE SAME

Patent #:	7262074	Issue Dt:	08/28/2007	Application #:	10191655	Filing Dt:	07/08/2002
Publication #:	US20040004294	Pub Dt:	01/08/2004
Title:	METHODS OF FABRICATING UNDERFILLED, ENCAPSULATED SEMICONDUCTOR DIE ASSEMBLIES

Patent #:	6700205	Issue Dt:	03/02/2004	Application #:	10191695	Filing Dt:	07/08/2002
Publication #:	US20020182846	Pub Dt:	12/05/2002
Title:	SEMICONDUCTOR DEVICES HAVING CONTACT PLUGS AND LOCAL INTERCONNECTS

Patent #:	6723597	Issue Dt:	04/20/2004	Application #:	10191833	Filing Dt:	07/09/2002
Publication #:	US20040009633	Pub Dt:	01/15/2004
Title:	METHOD OF USING HIGH-K DIELECTRIC MATERIALS TO REDUCE SOFT ERRORS IN SRAM MEMORY CELLS, AND A DEVICE COMPRISING SAME

Patent #:	6869335	Issue Dt:	03/22/2005	Application #:	10191895	Filing Dt:	07/08/2002
Publication #:	US20040018804	Pub Dt:	01/29/2004
Title:	RETAINING RINGS, PLANARIZING APPARATUSES INCLUDING RETAINING RINGS, AND METHODS FOR PLANARIZING MICRO-DEVICE WORKPIECES

Patent #:	6560150	Issue Dt:	05/06/2003	Application #:	10192328	Filing Dt:	07/10/2002
Publication #:	US20020172086	Pub Dt:	11/21/2002
Title:	MEMORY DEVICE TESTING

Patent #:	6785162	Issue Dt:	08/31/2004	Application #:	10192334	Filing Dt:	07/10/2002
Publication #:	US20030048673	Pub Dt:	03/13/2003
Title:	TEST MODE DECODER IN A FLASH MEMORY

Patent #:	6731551	Issue Dt:	05/04/2004	Application #:	10192390	Filing Dt:	07/10/2002
Publication #:	US20040008553	Pub Dt:	01/15/2004
Title:	TESTING MEMORY USING A STRESS SIGNAL

Patent #:	6525965	Issue Dt:	02/25/2003	Application #:	10192601	Filing Dt:	07/10/2002
Publication #:	US20020181283	Pub Dt:	12/05/2002
Title:	ONE-SIDED FLOATING-GATE MEMORY CELL

Patent #:	6791168	Issue Dt:	09/14/2004	Application #:	10192736	Filing Dt:	07/10/2002
Title:	SEMICONDUCTOR PACKAGE WITH CIRCUIT SIDE POLYMER LAYER AND WAFER LEVEL FABRICATION METHOD

Patent #:	7024663	Issue Dt:	04/04/2006	Application #:	10192923	Filing Dt:	07/10/2002
Publication #:	US20040010777	Pub Dt:	01/15/2004
Title:	METHOD AND SYSTEM FOR GENERATING OBJECT CODE TO FACILITATE PREDICTIVE MEMORY RETRIEVAL

Patent #:	6954836	Issue Dt:	10/11/2005	Application #:	10192957	Filing Dt:	07/11/2002
Publication #:	US20040010672	Pub Dt:	01/15/2004
Title:	SYSTEM AND METHOD FOR PROCESSOR WITH PREDICTIVE MEMORY RETRIEVAL ASSIST

Patent #:	6587386	Issue Dt:	07/01/2003	Application #:	10193170	Filing Dt:	07/12/2002
Publication #:	US20030026140	Pub Dt:	02/06/2003
Title:	SEMICONDUCTOR MEMORY HAVING MULTIPLE REDUNDANT COLUMNS WITH OFFSET SEGMENTATION BOUNDARIES

Patent #:	6803303	Issue Dt:	10/12/2004	Application #:	10193567	Filing Dt:	07/11/2002
Title:	Method of fabricating semiconductor component having encapsulated, bonded, interconnect contacts

Patent #:	6596648	Issue Dt:	07/22/2003	Application #:	10193850	Filing Dt:	07/11/2002
Publication #:	US20020187648	Pub Dt:	12/12/2002
Title:	MATERIAL REMOVAL METHOD FOR FORMING A STRUCTURE

Patent #:	6781867	Issue Dt:	08/24/2004	Application #:	10194549	Filing Dt:	07/11/2002
Publication #:	US20040008534	Pub Dt:	01/15/2004
Title:	EMBEDDED ROM DEVICE USING SUBSTRATE LEAKAGE

Patent #:	6599840	Issue Dt:	07/29/2003	Application #:	10194833	Filing Dt:	07/11/2002
Publication #:	US20020182872	Pub Dt:	12/05/2002
Title:	MATERIAL REMOVAL METHOD FOR FORMING A STRUCTURE

Patent #:	7301190	Issue Dt:	11/27/2007	Application #:	10195965	Filing Dt:	07/16/2002
Publication #:	US20020177302	Pub Dt:	11/28/2002
Title:	STRUCTURES AND METHODS TO ENHANCE COPPER METALLIZATION

Patent #:	6563568	Issue Dt:	05/13/2003	Application #:	10196072	Filing Dt:	07/16/2002
Publication #:	US20020180947	Pub Dt:	12/05/2002
Title:	MULTIPLE IMAGE RETICLE FOR FORMING LAYERS

Patent #:	6743716	Issue Dt:	06/01/2004	Application #:	10196078	Filing Dt:	07/16/2002
Publication #:	US20020182858	Pub Dt:	12/05/2002
Title:	STRUCTURES AND METHODS TO ENHANCE COPPER METALLIZATION

Patent #:	7378737	Issue Dt:	05/27/2008	Application #:	10196081	Filing Dt:	07/16/2002
Publication #:	US20020182859	Pub Dt:	12/05/2002
Title:	STRUCTURES AND METHODS TO ENHANCE COPPER METALLIZATION

Patent #:	6646722	Issue Dt:	11/11/2003	Application #:	10196086	Filing Dt:	07/16/2002
Publication #:	US20020176065	Pub Dt:	11/28/2002
Title:	MULTIPLE IMAGE RETICLE FOR FORMING LAYERS

Patent #:	6690610	Issue Dt:	02/10/2004	Application #:	10196099	Filing Dt:	07/15/2002
Publication #:	US20020175742	Pub Dt:	11/28/2002
Title:	ENHANCED FUSE CONFIGURATIONS FOR LOW-VOLTAGE FLASH MEMORIES

Patent #:	6537100	Issue Dt:	03/25/2003	Application #:	10196103	Filing Dt:	07/15/2002
Publication #:	US20020182926	Pub Dt:	12/05/2002
Title:	APPARATUS AND METHOD FOR PACKAGING CIRCUITS

Patent #:	6614003	Issue Dt:	09/02/2003	Application #:	10196396	Filing Dt:	07/15/2002
Publication #:	US20020179584	Pub Dt:	12/05/2002
Title:	METHOD AND PROCESS OF CONTACT TO A HEAT SOFTENED SOLDER BALL ARRAY

Patent #:	6909645	Issue Dt:	06/21/2005	Application #:	10196401	Filing Dt:	07/16/2002
Publication #:	US20040013007	Pub Dt:	01/22/2004
Title:	CLUSTER BASED REDUNDANCY SCHEME FOR SEMICONDUCTOR MEMORIES

Patent #:	6806523	Issue Dt:	10/19/2004	Application #:	10196484	Filing Dt:	07/15/2002
Publication #:	US20040007751	Pub Dt:	01/15/2004
Title:	MAGNETORESISTIVE MEMORY DEVICES

Patent #:	6847574	Issue Dt:	01/25/2005	Application #:	10196602	Filing Dt:	07/15/2002
Publication #:	US20020181309	Pub Dt:	12/05/2002
Title:	ENHANCED FUSE CONFIGURATIONS FOR LOW-VOLTAGE FLASH MEMORIES

Patent #:	6619532	Issue Dt:	09/16/2003	Application #:	10196666	Filing Dt:	07/15/2002
Publication #:	US20020179681	Pub Dt:	12/05/2002
Title:	METHODS TO UTILIZE ULTRASONIC ENERGY TO REDUCE THE INITIAL CONTRACT FORCES IN KNOWN-GOOD DIE OR PERMANENT CONTACT SYSTEMS

Patent #:	6680502	Issue Dt:	01/20/2004	Application #:	10197550	Filing Dt:	07/18/2002
Publication #:	US20020182777	Pub Dt:	12/05/2002
Title:	BURIED DIGIT SPACER SEPARATED CAPACITOR ARRAY

Patent #:	6828632	Issue Dt:	12/07/2004	Application #:	10197978	Filing Dt:	07/18/2002
Publication #:	US20040014304	Pub Dt:	01/22/2004
Title:	STABLE PD-SOI DEVICES AND METHODS

Patent #:	6818977	Issue Dt:	11/16/2004	Application #:	10197986	Filing Dt:	07/17/2002
Publication #:	US20030230802	Pub Dt:	12/18/2003
Title:	SEMICONDUCTOR DEVICES AND SEMICONDUCTOR DEVICE COMPONENTS WITH PERIPHERALLY LOCATED, CASTELLATED CONTACTS, ASSEMBLIES AND PACKAGES INCLUDING SUCH SEMICONDUCTOR DEVICES OR PACKAGES AND ASSOCIATED METHODS

Patent #:	6828639	Issue Dt:	12/07/2004	Application #:	10198194	Filing Dt:	07/17/2002
Publication #:	US20040012056	Pub Dt:	01/22/2004
Title:	PROCESS FLOW FOR BUILDING MRAM STRUCTURES

Patent #:	6636415	Issue Dt:	10/21/2003	Application #:	10198401	Filing Dt:	07/17/2002
Publication #:	US20020176220	Pub Dt:	11/28/2002
Title:	CAPACITOR CONSTRUCTIONS, METHODS OF FORMING BITLINES, AND METHODS OF FORMING CAPACITOR AND BITLINE STRUCTURES

Patent #:	6903001	Issue Dt:	06/07/2005	Application #:	10198586	Filing Dt:	07/18/2002
Publication #:	US20040014273	Pub Dt:	01/22/2004
Title:	TECHNIQUES TO CREATE LOW K ILD FOR BEOL

Patent #:	6853210	Issue Dt:	02/08/2005	Application #:	10198895	Filing Dt:	07/18/2002
Title:	TEST INTERCONNECT FOR BUMPED SEMICONDUCTOR COMPONENTS AND METHOD OF FABRICATION

Patent #:	6879530	Issue Dt:	04/12/2005	Application #:	10199151	Filing Dt:	07/18/2002
Publication #:	US20040015754	Pub Dt:	01/22/2004
Title:	APPARATUS AND METHOD FOR DYNAMICALLY REPAIRING A SEMICONDUCTOR MEMORY

Patent #:	6983080	Issue Dt:	01/03/2006	Application #:	10199376	Filing Dt:	07/19/2002
Publication #:	US20040013319	Pub Dt:	01/22/2004
Title:	RESOLUTION AND IMAGE QUALITY IMPROVEMENTS FOR SMALL IMAGE SENSORS

Patent #:	6741504	Issue Dt:	05/25/2004	Application #:	10199409	Filing Dt:	07/19/2002
Publication #:	US20040013005	Pub Dt:	01/22/2004
Title:	METHOD AND APPARATUS FOR REDUCING GATE-INDUCED DIODE LEAKAGE IN SEMICONDUCTOR DEVICES

Patent #:	6781880	Issue Dt:	08/24/2004	Application #:	10199718	Filing Dt:	07/19/2002
Publication #:	US20040012999	Pub Dt:	01/22/2004
Title:	NON-VOLATILE MEMORY ERASE CIRCUITRY

Patent #:	6711056	Issue Dt:	03/23/2004	Application #:	10199728	Filing Dt:	07/19/2002
Publication #:	US20020181281	Pub Dt:	12/05/2002
Title:	MEMORY WITH ROW REDUNDANCY

Patent #:	7239999	Issue Dt:	07/03/2007	Application #:	10200328	Filing Dt:	07/23/2002
Publication #:	US20040019491	Pub Dt:	01/29/2004
Title:	SPEED CONTROL PLAYBACK OF PARAMETRIC SPEECH ENCODED DIGITAL AUDIO

Patent #:	6900515	Issue Dt:	05/31/2005	Application #:	10200413	Filing Dt:	07/22/2002
Publication #:	US20020179990	Pub Dt:	12/05/2002
Title:	USE OF DAR COATING TO MODULATE THE EFFICIENCY OF LASER FUSE BLOWS

Patent #:	6638399	Issue Dt:	10/28/2003	Application #:	10200472	Filing Dt:	07/19/2002
Publication #:	US20020195924	Pub Dt:	12/26/2002
Title:	DEPOSITION OF SMOOTH ALUMINUM FILMS

Patent #:	7196882	Issue Dt:	03/27/2007	Application #:	10200512	Filing Dt:	07/23/2002
Publication #:	US20040017639	Pub Dt:	01/29/2004
Title:	A MAGNETIC TUNNEL JUNCTION DEVICE AND ITS METHOD OF FABRICATION

Patent #:	6819578	Issue Dt:	11/16/2004	Application #:	10200775	Filing Dt:	07/24/2002
Publication #:	US20030058674	Pub Dt:	03/27/2003
Title:	REDUCED SIGNAL SWING IN BIT LINES IN A CAM

Patent #:	6773955	Issue Dt:	08/10/2004	Application #:	10200792	Filing Dt:	07/22/2002
Publication #:	US20020182772	Pub Dt:	12/05/2002
Title:	LOW PROFILE MULTI-IC CHIP PACKAGE CONNECTOR

Patent #:	7517797	Issue Dt:	04/14/2009	Application #:	10200793	Filing Dt:	07/22/2002
Publication #:	US20020182771	Pub Dt:	12/05/2002
Title:	CARRIER FOR WAFER-SCALE PACKAGE, WAFER-SCALE PACKAGE INCLUDING THE CARRIER, AND METHODS

Patent #:	6576570	Issue Dt:	06/10/2003	Application #:	10200845	Filing Dt:	07/22/2002
Publication #:	US20020182825	Pub Dt:	12/05/2002
Title:	METHOD FOR IMPROVING THICKNESS UNIFORMITY OF DEPOSITED OZONE-TEOS SILICATE GLASS LAYERS

Patent #:	6631091	Issue Dt:	10/07/2003	Application #:	10200869	Filing Dt:	07/22/2002
Publication #:	US20020181300	Pub Dt:	12/05/2002
Title:	METHOD AND APPARATUS FOR REDUCING BLEED CURRENTS WITHIN A DRAM ARRAY HAVING ROW-TO-COLUMN SHORTS

Patent #:	6625048	Issue Dt:	09/23/2003	Application #:	10200921	Filing Dt:	07/23/2002
Publication #:	US20020181314	Pub Dt:	12/05/2002
Title:	ARCHITECTURE, PACKAGE ORIENTATION AND ASSEMBLY OF MEMORY DEVICES

Patent #:	6778455	Issue Dt:	08/17/2004	Application #:	10201306	Filing Dt:	07/24/2002
Publication #:	US20040017719	Pub Dt:	01/29/2004
Title:	METHOD AND APPARATUS FOR SAVING REFRESH CURRENT

Patent #:	6707722	Issue Dt:	03/16/2004	Application #:	10202556	Filing Dt:	07/23/2002
Publication #:	US20040017696	Pub Dt:	01/29/2004
Title:	METHOD AND APPARATUS FOR REGULATING PREDRIVER FOR OUTPUT BUFFER

Patent #:	6660658	Issue Dt:	12/09/2003	Application #:	10205235	Filing Dt:	07/26/2002
Publication #:	US20020182812	Pub Dt:	12/05/2002
Title:	TRANSISTOR STRUCTURES, METHODS OF INCORPORATING NITROGEN INTO SILICON-OXIDE-CONTAINING LAYERS; AND METHODS OF FORMING TRANSISTORS

Patent #:	6807600	Issue Dt:	10/19/2004	Application #:	10205546	Filing Dt:	07/24/2002
Publication #:	US20040019707	Pub Dt:	01/29/2004
Title:	METHOD, SYSTEM, AND PROGRAM FOR MEMORY BASED DATA TRANSFER

Patent #:	6577537	Issue Dt:	06/10/2003	Application #:	10205700	Filing Dt:	07/26/2002
Publication #:	US20030031055	Pub Dt:	02/13/2003
Title:	FLASH MEMORY CELL FOR HIGH EFFICIENCY PROGRAMMING

Patent #:	6696669	Issue Dt:	02/24/2004	Application #:	10205826	Filing Dt:	07/25/2002
Publication #:	US20020175153	Pub Dt:	11/28/2002
Title:	CIRCUIT AND METHOD FOR HEATING AN ADHESIVE TO PACKAGE OR REWORK A SEMICONDUCTOR DIE

Patent #:	7555358	Issue Dt:	06/30/2009	Application #:	10205918	Filing Dt:	07/25/2002
Publication #:	US20020183884	Pub Dt:	12/05/2002
Title:	PROCESS AND METHOD FOR CONTINUOUS, NON LOT-BASED INTEGRATED CIRCUIT MANUFACTURING

Patent #:	7067415	Issue Dt:	06/27/2006	Application #:	10205930	Filing Dt:	07/25/2002
Publication #:	US20020187628	Pub Dt:	12/12/2002
Title:	LOW K INTERLEVEL DIELECTRIC LAYER FABRICATION METHODS

Patent #:	6604671	Issue Dt:	08/12/2003	Application #:	10205943	Filing Dt:	07/25/2002
Publication #:	US20020179687	Pub Dt:	12/05/2002
Title:	BONDHEAD LEAD CLAMP APPARATUS AND METHOD

Patent #:	6665206	Issue Dt:	12/16/2003	Application #:	10205989	Filing Dt:	07/26/2002
Publication #:	US20020196655	Pub Dt:	12/26/2002
Title:	ARRAY ARCHITECTURE FOR DEPLETION MODE FERROELECTRIC MEMORY DEVICES

Patent #:	6707673	Issue Dt:	03/16/2004	Application #:	10206043	Filing Dt:	07/29/2002
Publication #:	US20020186539	Pub Dt:	12/12/2002
Title:	HEAT SINK FOR CHIP STACKING APPLICATIONS

Patent #:	7120068	Issue Dt:	10/10/2006	Application #:	10206044	Filing Dt:	07/29/2002
Publication #:	US20040019763	Pub Dt:	01/29/2004
Title:	COLUMN/ROW REDUNDANCY ARCHITECTURE USING LATCHES PROGRAMMED FROM A LOOK UP TABLE

Patent #:	6727150	Issue Dt:	04/27/2004	Application #:	10206171	Filing Dt:	07/26/2002
Publication #:	US20040018695	Pub Dt:	01/29/2004
Title:	METHODS OF FORMING TRENCH ISOLATION WITHIN A SEMICONDUCTOR SUBSTRATE

Patent #:	6625068	Issue Dt:	09/23/2003	Application #:	10206174	Filing Dt:	07/25/2002
Title:	METHOD AND APPARATUS FOR REDUCING BLEED CURRENTS WITHIN A DRAM ARRAY HAVING ROW-TO-COLUMN SHORTS

Patent #:	6686655	Issue Dt:	02/03/2004	Application #:	10206175	Filing Dt:	07/25/2002
Publication #:	US20020185725	Pub Dt:	12/12/2002
Title:	LOW PROFILE MULTI-IC CHIP PACKAGE CONNECTOR

Patent #:	6855623	Issue Dt:	02/15/2005	Application #:	10206518	Filing Dt:	07/26/2002
Publication #:	US20020192936	Pub Dt:	12/19/2002
Title:	RECESSED TAPE AND METHOD FOR FORMING A BGA ASSEMBLY

Patent #:	6723618	Issue Dt:	04/20/2004	Application #:	10206602	Filing Dt:	07/26/2002
Publication #:	US20040016986	Pub Dt:	01/29/2004
Title:	FIELD ISOLATION STRUCTURES AND METHODS OF FORMING FIELD ISOLATION STRUCTURES

100

Patent #:	6788587	Issue Dt:	09/07/2004	Application #:	10207072	Filing Dt:	07/30/2002
Publication #:	US20030043649	Pub Dt:	03/06/2003
Title:	SMALL ANTI-FUSE CIRCUIT TO FACILITATE PARALLEL FUSE BLOWING

Assignor

U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT

Exec Dt:

06/29/2018

Assignee

MICRON TECHNOLOGY, INC.

8000 S. FEDERAL WAY

BOISE, IDAHO 83707

Correspondence name and address
	WSGR, C/O QUI LU FLOOD, SENIOR PARALEGAL
	ONE MARKET, SPEAR TOWER, SUITE 3300
	SAN FRANCISCO, CA 94105

Search Results as of: 05/13/2024 11:10 PM

If you have any comments or questions concerning the data displayed, contact PRD / Assignments at 571-272-3350. v.2.6

Web interface last modified: August 25, 2017 v.2.6